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Add Alistair as a RISC-V Maintainer
authorPalmer Dabbelt <palmer@sifive.com>
Mon, 29 Oct 2018 16:06:44 +0000 (09:06 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 30 Oct 2018 18:04:29 +0000 (11:04 -0700)
commita17a61f306c12690d541515798b2d227049aa35b
tree63edec7bbdc958f5b622fbc8257af55713d25ca9tree
parent4a9b31b82bcd2cafe85137334f1c07afe56cc224commit | diff
Add Alistair as a RISC-V Maintainer

Alistair has been contributing to the RISC-V QEMU port for a while now
so I'd like him to be officially listed as a maintainer.  I've checked
with the other RISC-V maintainers and there are no objections, and I've
also checked with Alistair so he knows I'm volunteering him.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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