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PPC: Add L1CFG1 SPR emulation
authorAlexander Graf <agraf@suse.de>
Sun, 19 Jan 2014 16:47:43 +0000 (17:47 +0100)
committerAlexander Graf <agraf@suse.de>
Mon, 16 Jun 2014 11:24:34 +0000 (13:24 +0200)
commitd2ea2bf740c515de41f45e4d6f36683db3458881
treead7e50ba8cda7d373f831e95ec56842c41ac46c7tree
parentdeb05c4c4c2b7bfeccddb8494164cc858a8652eccommit | diff
PPC: Add L1CFG1 SPR emulation

In addition to the L1 data cache configuration register L1CFG0 there is
also another one for the L1 instruction cache called L1CFG1.

Emulate that one with the same values as the data one.

Signed-off-by: Alexander Graf <agraf@suse.de>
target-ppc/cpu.h diff | blob | blame | history
target-ppc/translate_init.c diff | blob | blame | history
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