* remotes/pmaydell/tags/pull-target-arm-20200430-1: (30 commits)
hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes
hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102
device_tree: Constify compat in qemu_fdt_node_path()
device_tree: Allow name wildcards in qemu_fdt_node_path()
target/arm/cpu: Update coding style to make checkpatch.pl happy
target/arm: Make cpu_register() available for other files
target/arm: Restrict the Address Translate write operation to TCG accel
hw/arm/virt: dt: add kaslr-seed property
hw/arm/virt: dt: move creation of /secure-chosen to create_fdt()
target/arm: Vectorize integer comparison vs zero
net: cadence_gem: clear RX control descriptor
Cadence: gem: fix wraparound in 64bit descriptors
hw/arm: versal: Setup the ADMA with 128bit bus-width
qdev-monitor: print the device's clock with info qtree
hw/arm/xilinx_zynq: connect uart clocks to slcr
hw/char/cadence_uart: add clock support
hw/misc/zynq_slcr: add clock generation for uarts
docs/clocks: add device's clock documentation
qdev-clock: introduce an init array to ease the device construction
qdev: add clock input&output support to devices.
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Disable unsupported FDT firmware nodes if a user passes us
a DTB with nodes enabled that the machine cannot support
due to lack of EL3 or EL2 support.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200423121114.4274-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102
Move arm_boot_info into XlnxZCU102.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200423121114.4274-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
device_tree: Constify compat in qemu_fdt_node_path()
Make compat in qemu_fdt_node_path() const char *.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200423121114.4274-3-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
device_tree: Allow name wildcards in qemu_fdt_node_path()
Allow name wildcards in qemu_fdt_node_path(). This is useful
to find all nodes with a given compatibility string.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200423121114.4274-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu: Update coding style to make checkpatch.pl happy
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200423073358.27155-5-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Thomas Huth [Thu, 23 Apr 2020 07:33:55 +0000 (09:33 +0200)]
target/arm: Make cpu_register() available for other files
Make cpu_register() (renamed to arm_cpu_register()) available
from internals.h so we can register CPUs also from other files
in the future.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200423073358.27155-3-philmd@redhat.com
Message-ID: <20190921150420.30743-2-thuth@redhat.com>
[PMD: Only take cpu_register() from Thomas's patch] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm: Restrict the Address Translate write operation to TCG accel
Under KVM these registers are written by the hardware.
Restrict the writefn handlers to TCG to avoid when building
without TCG:
LINK aarch64-softmmu/qemu-system-aarch64
target/arm/helper.o: In function `do_ats_write':
target/arm/helper.c:3524: undefined reference to `raise_exception'
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200423073358.27155-2-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Generate random seeds to be used by the non-secure and/or secure OSes
for ASLR. The seeds are 64-bit random values exported via the DT
properties /chosen/kaslr-seed [1] and /secure-chosen/kaslr-seed, the
latter being used by OP-TEE [2].
These instructions are often used in glibc's string routines.
They were the final uses of the 32-bit at a time neon helpers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200418162808.4680-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Ramon Fried [Sat, 18 Apr 2020 08:51:45 +0000 (11:51 +0300)]
net: cadence_gem: clear RX control descriptor
The RX ring descriptors control field is used for setting
SOF and EOF (start of frame and end of frame).
The SOF and EOF weren't cleared from the previous descriptors,
causing inconsistencies in ring buffer.
Fix that by clearing the control field of every descriptors we're
processing.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200418085145.489726-1-rfried.dev@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Ramon Fried [Fri, 17 Apr 2020 17:17:36 +0000 (20:17 +0300)]
Cadence: gem: fix wraparound in 64bit descriptors
Wraparound of TX descriptor cyclic buffer only updated
the low 32 bits of the descriptor.
Fix that by checking if we're working with 64bit descriptors.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200417171736.441607-1-rfried.dev@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm: versal: Setup the ADMA with 128bit bus-width
Setup the ADMA with 128bit bus-width. This matters when
FIXED BURST mode is used.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20200417153800.27399-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
qdev-monitor: print the device's clock with info qtree
This prints the clocks attached to a DeviceState when using
"info qtree" monitor command. For every clock, it displays the
direction, the name and if the clock is forwarded. For input clock,
it displays also the frequency.
This is based on the original work of Frederic Konrad.
Here follows a sample of `info qtree` output on xilinx_zynq machine
after linux boot with only one uart clocked:
> bus: main-system-bus
> type System
> [...]
> dev: cadence_uart, id ""
> gpio-out "sysbus-irq" 1
> clock-in "refclk" freq_hz=0.000000e+00
> chardev = ""
> mmio 00000000e0001000/0000000000001000
> dev: cadence_uart, id ""
> gpio-out "sysbus-irq" 1
> clock-in "refclk" freq_hz=1.375661e+07
> chardev = "serial0"
> mmio 00000000e0000000/0000000000001000
> [...]
> dev: xilinx,zynq_slcr, id ""
> clock-out "uart1_ref_clk" freq_hz=0.000000e+00
> clock-out "uart0_ref_clk" freq_hz=1.375661e+07
> clock-in "ps_clk" freq_hz=3.333333e+07
> mmio 00000000f8000000/0000000000001000
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-10-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Add the connection between the slcr's output clocks and the uarts inputs.
Also add the main board clock 'ps_clk', which is hard-coded to 33.33MHz
(the default frequency). This clock is used to feed the slcr's input
clock.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-9-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Switch the cadence uart to multi-phase reset and add the
reference clock input.
The input clock frequency is added to the migration structure.
The reference clock controls the baudrate generation. If it disabled,
any input characters and events are ignored.
If this clock remains unconnected, the uart behaves as before
(it default to a 50MHz ref clock).
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200406135251.157596-8-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Add some clocks to zynq_slcr
+ the main input clock (ps_clk)
+ the reference clock outputs for each uart (uart0 & 1)
This commit also transitional the slcr to multi-phase reset as it is
required to initialize the clocks correctly.
The clock frequencies are computed using the internal pll & uart configuration
registers and the input ps_clk frequency.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200406135251.157596-7-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 17 Apr 2020 15:56:33 +0000 (16:56 +0100)]
docs/clocks: add device's clock documentation
Add the documentation about the clock inputs and outputs in devices.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-6-damien.hedde@greensocs.com
[PMM: Editing pass for minor grammar, style and Sphinx
formatting fixes] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
qdev-clock: introduce an init array to ease the device construction
Introduce a function and macro helpers to setup several clocks
in a device from a static array description.
An element of the array describes the clock (name and direction) as
well as the related callback and an optional offset to store the
created object pointer in the device state structure.
The array must be terminated by a special element QDEV_CLOCK_END.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-5-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Add functions to easily handle clocks with devices.
Clock inputs and outputs should be used to handle clock propagation
between devices.
The API is very similar the GPIO API.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200406135251.157596-4-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/core/clock-vmstate: define a vmstate entry for clock state
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-3-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* remotes/armbru/tags/pull-qapi-2020-04-30:
qapi: Generate simpler marshalling code when no arguments
qapi: Disallow qmp_marshal_FOO(NULL, ...)
qom: Simplify object_property_get_enum()
qapi: Only input visitors can actually fail
qapi: Assert non-input visitors see only valid alternate tags
qapi: Clean up visitor's recovery from input with invalid type
qapi: Assert non-input visitors see only valid narrow integers
qapi: Assert output visitors see only valid enum values
qapi: Fix Visitor contract for start_alternate()
qapi: Assert incomplete object occurs only in dealloc visitor
qapi: Polish prose in visitor.h
qapi: Document @errp usage more thoroughly in visitor.h
qapi: Fix typo in visit_start_list()'s contract
qapi: Fix the virtual walk example in visitor.h's big comment
qapi: Belatedly update visitor.h's big comment for QAPI modules
qemu-option: Clean up after the previous commit
qobject: Eliminate qdict_iter(), use qdict_first(), qdict_next()
qobject: Eliminate qlist_iter(), use QLIST_FOREACH_ENTRY() instead
qobject: Factor out helper json_pretty_newline()
qobject: Clean up QLIST_FOREACH_ENTRY()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 17 Apr 2020 15:54:28 +0000 (16:54 +0100)]
hw/core/clock: introduce clock object
This object may be used to represent a clock inside a clock tree.
A clock may be connected to another clock so that it receives update,
through a callback, whenever the source/parent clock is updated.
Although only the root clock of a clock tree controls the values
(represented as periods) of all clocks in tree, each clock holds
a local state containing the current value so that it can be fetched
independently. It will allows us to fullfill migration requirements
by migrating each clock independently of others.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200406135251.157596-2-damien.hedde@greensocs.com
[PMM: Use uint64_t rather than unsigned long long in trace events;
the dtrace backend can't handle the latter] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The KVM_VGIC_ATTR macro expect the second parameter as gicr_typer,
of which high 32bit is constructed by mp_affinity. For most case,
the high 32bit of mp_affinity is zero, so it will always access the
ICC_CTLR_EL1 of CPU0.
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
Message-id: 20200413091552.62748-2-zhukeqian1@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
NRF51_GPIO_REG_CNF_END doesn't actually refer to the start of the last
valid CNF register: it's referring to the last byte of the last valid
CNF register.
This hasn't been a problem up to now, as current implementation in
memory.c turns an unaligned 4-byte read from 0x77f to a single byte read
and the qtest only looks at the least-significant byte of the register.
But when running with patches which fix unaligned accesses in memory.c,
the qtest breaks.
Considering NRF51 doesn't support unaligned accesses, the simplest fix
is to actually set NRF51_GPIO_REG_CNF_END to the start of the last valid
CNF register: 0x77c.
Now, qtests work with or without the unaligned access patches.
Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cameron Esfahani <dirty@apple.com>
Message-id: 51b427f06838622da783d38ba56e3630d6d85c60.1586925392.git.dirty@apple.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fix descriptor loading from registers wrt host endianness.
Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-id: 20200404122718.25111-3-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fix descriptor loading from memory wrt host endianness.
Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200404122718.25111-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424084338.26803-16-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
For QMP commands without arguments, gen_marshal() laboriously
generates a qmp_marshal_FOO() that copes with null @args. Turns
there's just one caller that passes null instead of an empty QDict.
Adjust that caller, and simplify gen_marshal().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424084338.26803-15-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-14-armbru@redhat.com>
The previous few commits have made this more obvious, and removed the
one exception. Time to clarify the documentation, and drop dead error
checking.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-13-armbru@redhat.com>
qapi: Assert non-input visitors see only valid alternate tags
An alternate type's visit_type_FOO() fails when it runs into an
invalid ->type.
This is appropriate with an input visitor: visit_start_alternate()
sets ->type according to the input, and bad input can lead to bad
->type.
It should never happen with an output, clone or dealloc visitor: if it
did, the alternate being output, cloned or deallocated would be messed
up beyond repair. Assert that.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-12-armbru@redhat.com>
qapi: Clean up visitor's recovery from input with invalid type
An alternate type's visit_type_FOO() fails when it runs into an
invalid ->type. If it's an input visit, we then need to free the the
object we got from visit_start_alternate(). We do that with
qapi_free_FOO(), which uses the dealloc visitor.
Trouble is that object is in a bad state: its ->type is invalid. So
the dealloc visitor will run into the same error again, and the error
recovery skips deallocating the alternate's (invalid) alternative.
Works, because qapi_free_FOO() ignores the error.
Avoid it instead: free the messed up object with by g_free().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424084338.26803-11-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
qapi: Assert non-input visitors see only valid narrow integers
visit_type_intN() and visit_type_uintN() fail when the value is out of
bounds.
This is appropriate with an input visitor: the value comes from input,
and input may be bad.
It should never happen with the other visitors: the value comes from
the caller, and callers must keep it within bounds. Assert that.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-10-armbru@redhat.com>
qapi: Assert output visitors see only valid enum values
output_type_enum() fails when *obj is not a valid value of the enum
type. Should not happen. Drop the check, along with its unit tests.
This unmasks qapi_enum_lookup()'s assertion.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-9-armbru@redhat.com>
[Commit message tweaked]
The contract demands v->start_alternate() for input and dealloc
visitors, but visit_start_alternate() actually requires it for input
and clone visitors. Fix the contract, and delete superfluous
qapi_dealloc_start_alternate().
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-8-armbru@redhat.com>
qapi: Assert incomplete object occurs only in dealloc visitor
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-7-armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-6-armbru@redhat.com>
qapi: Document @errp usage more thoroughly in visitor.h
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-5-armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-4-armbru@redhat.com>
qapi: Fix the virtual walk example in visitor.h's big comment
Call visit_check_list(). Missed in commit a4a1c70dc7 "qapi: Make
input visitors detect unvisited list tails".
Drop an irrelevant error_propagate() while there.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-3-armbru@redhat.com>
qapi: Belatedly update visitor.h's big comment for QAPI modules
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200424084338.26803-2-armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200415083048.14339-6-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
qobject: Eliminate qdict_iter(), use qdict_first(), qdict_next()
qdict_iter() has just three uses and no test coverage. Replace by
qdict_first(), qdict_next() for more concise code and less type
punning.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200415083048.14339-5-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
qobject: Eliminate qlist_iter(), use QLIST_FOREACH_ENTRY() instead
qlist_iter() has just three uses outside tests/. Replace by
QLIST_FOREACH_ENTRY() for more concise code and less type punning.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200415083048.14339-4-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200415083048.14339-3-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
[Coding style in moved code tidied up]
QLIST_FOREACH_ENTRY() traverses a tail queue manually. Use
QTAILQ_FIRST() and QTAILQ_NEXT() instead.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200415083048.14339-2-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
Peter Maydell [Wed, 29 Apr 2020 20:43:03 +0000 (21:43 +0100)]
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200429-2' into staging
RISC-V pull request for 5.1
This is the first pull request for the 5.1 development period. It
contains all of the patches that were sent during the 5.0 timeframe.
This is an assortment of fixes for RISC-V, including fixes for the
Hypervisor extension, the Spike machine and an update to OpenSBI.
# gpg: Signature made Wed 29 Apr 2020 21:17:17 BST
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-20200429-2:
hw/riscv/spike: Allow more than one CPUs
hw/riscv/spike: Allow loading firmware separately using -bios option
hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()
roms: opensbi: Upgrade from v0.6 to v0.7
linux-user/riscv: fix up struct target_ucontext definition
target/riscv: Add a sifive-e34 cpu type
riscv: sifive_e: Support changing CPU type
hw/riscv: Generate correct "mmu-type" for 32-bit machines
riscv: Fix Stage2 SV32 page table walk
riscv: AND stage-1 and stage-2 protection flags
riscv: Don't use stage-2 PTE lookup protection flags
riscv/sifive_u: Add a serial property to the sifive_u machine
riscv/sifive_u: Add a serial property to the sifive_u SoC
riscv/sifive_u: Fix up file ordering
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()
This patch adds an optional function pointer, "sym_cb", to
riscv_load_firmware() which provides the possibility to access
the symbol table during kernel loading.
The pointer is ignored, if supplied with flat (non-elf) firmware image.
The Spike board requires it locate the HTIF symbols from firmware ELF
passed via "-bios" option.
Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200427080644.168461-2-anup.patel@wdc.com
Message-Id: <20200427080644.168461-2-anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Bin Meng [Mon, 20 Apr 2020 13:18:44 +0000 (21:18 +0800)]
roms: opensbi: Upgrade from v0.6 to v0.7
Upgrade OpenSBI from v0.6 to v0.7 and the pre-built bios images.
The v0.7 release includes the following commits:
f64f4b9 lib: Add a new platform feature to bringup secondary harts b677a9b lib: Implement hart hotplug 5b48240 lib: Add possible hart status values e3f69fc lib: Implement Hart State Management (HSM) SBI extension 6704216 lib: Check MSIP bit after returning from WFI 82ae8e8 makefile: Do setup of the install target more flexible e1a5b73 platform: sifive: fu540: allow sv32 as an mmu-type 8c83fb2 lib: Fix return type of sbi_hsm_hart_started() 00d332b include: Move bits related defines and macros to sbi_bitops.h a148996 include: sbi_bitops: More useful bit operations 4a603eb platform: kendryte/k210: Set per-HART stack size to 8KB 678c3c3 include: sbi_scratch: Set per-HART scratch size to 4KB 2abc55b lib: Sort build objects in alphabetical order 6e87507 platform: ae350: Sort build objects in alphabetical order 650c0e5 lib: sbi: Fix coding style issues 078686d lib: serial: Fix coding style issues 3226bd9 lib: Simple bitmap library c741abc include: Simple hartmask library d6d7e18 lib: sbi_init: Don't allow HARTID greater than SBI_HARTMASK_MAX_BITS a4a6a81 lib: Introduce SBI_TLB_INFO_INIT() helper macro d963164 lib: sbi_tlb: Use sbi_hartmask in sbi_tlb_info 71d2b83 lib: Move all coldboot wait APIs to sbi_init.c 2b945fc lib: sbi_init: Use hartmask for coldboot wait 44ce5b9 include: Remove disabled_hart_mask from sbi_platform 2db381f lib: Introduce sbi_hsm_hart_started_mask() API 61f7768 lib: sbi_ecall_legacy: Use sbi_hsm_hart_started_mask() API 466fecb lib: sbi_system: Use sbi_hsm_hart_started_mask() API 9aad831 lib: sbi_ipi: Use sbi_hsm_hart_started_mask() API eede1aa lib: sbi_hart: Remove HART available mask and related APIs 757bb44 docs: Remove out-of-date documentation 86d37bb lib: sbi: Fix misaligned trap handling ffdc858 platform: ariane-fpga: Change license for ariane-fpga from GPL-2.0 to BSD-2 4b2f594 sbi: Add definitions for true/false 0cfe49a libfdt: Add INT32_MAX and UINT32_MAX in libfdt_env.h baac7e0 libfdt: Upgrade to v1.5.1 release f92147c include: Make sbi_hart_id_to_scratch() as macro eeae3d9 firmware: fw_base: Optimize _hartid_to_scratch() implementation 16e7071 lib: sbi_hsm: Optimize sbi_hsm_hart_get_state() implementation 823345e include: Make sbi_current_hartid() as macro in riscv_asm.h 9aabba2 Makefile: Fix distclean make target 9275ed3 platform: ariane-fpga: Set per-HART stack size to 8KB 2343efd platform: Set per-HART stack size to 8KB in the template platform codes 72a0628 platform: Use one unified per-HART stack size macro for all platforms 327ba36 scripts: Cover sifive/fu540 in the 32-bit build 5fbcd62 lib: sbi: Update pmp_get() to return decoded size directly dce8846 libfdt: Compile fdt_addresses.c fcb1ded lib: utils: Add a fdt_reserved_memory_fixup() helper 666be6d platform: Clean up include header files 6af5576 lib: utils: Move PLIC DT fix up codes to fdt_helper.c e846ce1 platform: andes/ae350: Fix up DT for reserved memory 8135520 platform: ariane-fpga: Fix up DT for reserved memory c9a5268 platform: qemu/virt: Fix up DT for reserved memory 6f9bb83 platform: sifive/fu540: Fix up DT for reserved memory 1071f05 platform: sifive/fu540: Remove "stdout-path" fix-up dd9439f lib: utils: Add a fdt_cpu_fixup() helper 3f1c847 platform: sifive/fu540: Replace cpu0 node fix-up with the new helper db6a2b5 lib: utils: Add a general device tree fix-up helper 3f8d754 platform: Update to call general DT fix-up helper 87a7ef7 lib: sbi_scratch: Introduce HART id to scratch table e23d3ba include: Simplify HART id to scratch macro 19bd531 lib: sbi_hsm: Simplify hart_get_state() and hart_started() APIs 3ebfe0e lib: sbi_tlb: Simplify sbi_tlb_entry_process() function 209134d lib: Handle failure of sbi_hartid_to_scratch() API bd6ef02 include: sbi_platform: Improve sbi_platform_hart_disabled() API c9f60fc lib: sbi_scratch: Don't set hartid_to_scratch table for disabled HART 680b098 lib: sbi_hsm: Don't use sbi_platform_hart_count() API db187d6 lib: sbi_hsm: Remove scratch parameter from hart_started_mask() API 814f38d lib: sbi_hsm: Don't use sbi_platform_hart_disabled() API 75eec9d lib: Don't use sbi_platform_hart_count() API c51f02c include: sbi_platform: Introduce HART index to HART id table 315a877 platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK option a0c88dd lib: Fix sbi_ecall_register_extension to prevent extension IDs overlap 9a74a64 lib: Check MSIP bit after returning from WFI 5968894 platform: Move ariane standalone fpga project to its own project ed265b4 platform: fpga/ariane: Remove redundant plic address macros fb84879 platform: Add OpenPiton platform support d1d6560 platform: fpga/common: Add a fdt parsing helper functions 040e4e2 lib: utils: Move fdt fixup helper routines to a different file 4c37451 platform: openpiton: Read the device configurations from device tree 4d93586 lib: prevent coldboot_lottery from overflowing 550ba88 scripts: Extend create-binary-archive.sh for unified binary tar ball 160c885 lib: utils: Improve fdt_cpu_fixup() implementation 1de66d1 lib: Optimize unpriv load/store implementation 626467c lib: Remove scratch parameter from unpriv load/store functions cb78a48 lib: sbi_trap: Remove scratch parameter from sbi_trap_redirect() d11c79c lib: sbi_emulate_csr: Remove scratch and hartid parameter 5a7bd0c lib: sbi_illegal_insn: Remove mcause, scratch and hartid parameters fe37d7d lib: sbi_misaligned_ldst: Remove mcause, scratch and hartid parameters 7487116 lib: sbi_ecall: Remove mcause, scratch and hartid parameters 40b221b lib: sbi_trap: Simplify sbi_trap_handler() API 7b211ff include: sbi_platform: Remove priv parameter from hart_start() callback 5b6957e include: Use more consistent name for atomic xchg() and cmpxchg() dd0f21c lib: sbi_scratch: Introduce sbi_scratch_last_hartid() API 54b2779 include: sbi_tlb: Remove scratch parameter from sbi_tlb_request() 9e52a45 include: sbi_ipi: Remove scratch parameter from most functions ec0d80f include: sbi_system: Remove scratch parameter and redundant functions 0a28ea5 include: sbi_timer: Remove scratch parameter from most funcitons 648507a include: sbi_console: Remove scratch parameter from sbi_dprintf() e5a7f55 platform: thead/c910: Use HSM extension to boot secondary cores f281de8 lib: irqchip/plic: Fix maximum priority threshold value 6c7922e lib: Support vector extension 615587c docs: Update README about supported SBI versions 66d0184 lib: Allow overriding SBI implementation ID 9f1b72c include: Bump-up version to 0.7
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Corey Wharton [Fri, 13 Mar 2020 19:34:28 +0000 (12:34 -0700)]
riscv: sifive_e: Support changing CPU type
Allows the CPU to be changed from the default via the -cpu command
line option.
Signed-off-by: Corey Wharton <coreyw7@fb.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200313193429.8035-2-coreyw7@fb.com
Message-Id: <20200313193429.8035-2-coreyw7@fb.com>
[ Changes by AF:
- Set "cpu-type" from the machine and not SoC
] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Anup Patel [Mon, 30 Mar 2020 08:27:24 +0000 (13:57 +0530)]
riscv: Fix Stage2 SV32 page table walk
As-per RISC-V H-Extension v0.5 draft, the Stage2 SV32 page table has
12bits of VPN[1] and 10bits of VPN[0]. The additional 2bits in VPN[1]
is required to handle the 34bit intermediate physical address coming
from Stage1 SV32 page table. The 12bits of VPN[1] implies that Stage2
SV32 level-0 page table will be 16KB in size with total 4096 enteries
where each entry maps 4MB of memory (same as Stage1 SV32 page table).
The get_physical_address() function is broken for Stage2 SV32 level-0
page table because it incorrectly computes output physical address for
Stage2 SV32 level-0 page table entry.
The root cause of the issue is that get_physical_address() uses the
"widened" variable to compute level-0 physical address mapping which
changes level-0 mapping size (instead of 4MB). We should use the
"widened" variable only for computing index of Stage2 SV32 level-0
page table.
Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200330082724.120444-1-anup.patel@wdc.com
Message-Id: <20200330082724.120444-1-anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Alistair Francis [Thu, 26 Mar 2020 22:44:09 +0000 (15:44 -0700)]
riscv: AND stage-1 and stage-2 protection flags
Take the result of stage-1 and stage-2 page table walks and AND the two
protection flags together. This way we require both to set permissions
instead of just stage-2.
Alistair Francis [Thu, 26 Mar 2020 22:44:07 +0000 (15:44 -0700)]
riscv: Don't use stage-2 PTE lookup protection flags
When doing the fist of a two stage lookup (Hypervisor extensions) don't
set the current protection flags from the second stage lookup of the
base address PTE.
Bin Meng [Sat, 16 Nov 2019 15:08:50 +0000 (07:08 -0800)]
riscv/sifive_u: Add a serial property to the sifive_u machine
At present the board serial number is hard-coded to 1, and passed
to OTP model during initialization. Firmware (FSBL, U-Boot) uses
the serial number to generate a unique MAC address for the on-chip
ethernet controller. When multiple QEMU 'sifive_u' instances are
created and connected to the same subnet, they all have the same
MAC address hence it creates a unusable network.
A new "serial" property is introduced to specify the board serial
number. When not given, the default serial number 1 is used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1573916930-19068-1-git-send-email-bmeng.cn@gmail.com>
[ Changed by AF:
- Use the SoC's serial property to pass the info to the SoC
- Fixup commit title
- Rebase on file restructuring
] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
riscv/sifive_u: Add a serial property to the sifive_u SoC
At present the board serial number is hard-coded to 1, and passed
to OTP model during initialization. Firmware (FSBL, U-Boot) uses
the serial number to generate a unique MAC address for the on-chip
ethernet controller. When multiple QEMU 'sifive_u' instances are
created and connected to the same subnet, they all have the same
MAC address hence it creates a unusable network.
A new "serial" property is introduced to the sifive_u SoC to specify
the board serial number. When not given, the default serial number
1 is used.
Suggested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
s390x/s390-virtio-ccw: Fix build on systems without KVM
linux/kvm.h is not available on all platforms. Let us move
s390_machine_inject_pv_error into pv.c as it uses KVM structures.
Also rename the function to s390_pv_inject_reset_error.
While at it, ipl.h needs an include for "exec/address-spaces.h"
as it uses address_space_memory.
Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facility") Reported-by: Bruce Rogers <brogers@suse.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20200406100158.5940-2-borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
PV_ENABLE (and maybe others) might return -EINTR when a signal is
pending. See the Linux kernel patch "s390/gmap: return proper error code
on ksm unsharing" for details. Let us retry the ioctl in that case.
Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facility") Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com> Acked-by: Janosch Frank <frankja@linux.vnet.ibm.com> Tested-by: Marc Hartmayer <mhartmay@linux.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20200327124616.34866-1-borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Thu, 26 Mar 2020 14:05:05 +0000 (10:05 -0400)]
s390x: protvirt: Fix stray error_report_err in s390_machine_protect
In case the protection of the machine fails at s390_pv_vm_enable(),
we'll currently report the local_error variable. Problem is that
there's no migration blocker error that we can report at this point so
the pointer is always NULL which leads to a SEGFAULT.
Let's remove the error report.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com> Fixes: 0141e1b47707 ("s390x: protvirt: Add migration blocker")
Message-Id: <20200326140505.2432-1-frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
The unpack facility is an indication that diagnose 308 subcodes 8-10
are available to the guest. That means, that the guest can put itself
into protected mode.
Once it is in protected mode, the hardware stops any attempt of VM
introspection by the hypervisor.
Some features are currently not supported in protected mode:
* vfio devices
* Migration
* Huge page backings
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200319131921.2367-17-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Thu, 19 Mar 2020 13:19:17 +0000 (09:19 -0400)]
s390x: protvirt: Disable address checks for PV guest IO emulation
IO instruction data is routed through SIDAD for protected guests, so
adresses do not need to be checked, as this is kernel memory which is
always available.
Also the instruction data always starts at offset 0 of the SIDAD.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200319131921.2367-13-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Thu, 19 Mar 2020 13:19:14 +0000 (09:19 -0400)]
s390x: protvirt: SCLP interpretation
SCLP for a protected guest is done over the SIDAD, so we need to use
the s390_cpu_pv_mem_* functions to access the SIDAD instead of guest
memory when reading/writing SCBs.
To not confuse the sclp emulation, we set 0x4000 as the SCCB address,
since the function that injects the sclp external interrupt would
reject a zero sccb address.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20200319131921.2367-10-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Thu, 19 Mar 2020 13:19:11 +0000 (09:19 -0400)]
s390x: protvirt: KVM intercept changes
Protected VMs no longer intercept with code 4 for an instruction
interception. Instead they have codes 104 and 108 for protected
instruction interception and protected instruction notification
respectively.
The 104 mirrors the 4 interception.
The 108 is a notification interception to let KVM and QEMU know that
something changed and we need to update tracking information or
perform specific tasks. It's currently taken for the following
instructions:
* spx (To inform about the changed prefix location)
* sclp (On incorrect SCCB values, so we can inject a IRQ)
* sigp (All but "stop and store status")
* diag308 (Subcodes 0/1)
Of these exits only sclp errors, state changing sigps and diag308 will
reach QEMU. QEMU will do its parts of the job, while the ultravisor
has done the instruction part of the job.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200319131921.2367-7-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Thu, 19 Mar 2020 13:19:10 +0000 (09:19 -0400)]
s390x: protvirt: Inhibit balloon when switching to protected mode
Ballooning in protected VMs can only be done when the guest shares the
pages it gives to the host. If pages are not shared, the integrity
checks will fail once those pages have been altered and are given back
to the guest.
As we currently do not yet have a solution for this we will continue
like this:
1. We block ballooning now in QEMU (with this patch).
2. Later we will provide a change to virtio that removes the blocker
and adds VIRTIO_F_IOMMU_PLATFORM automatically by QEMU when doing the
protvirt switch. This is OK, as the balloon driver in Linux (the only
supported guest) will refuse to work with the IOMMU_PLATFORM feature
bit set.
3. Later, we can fix the guest balloon driver to accept the IOMMU
feature bit and correctly exercise sharing and unsharing of balloon
pages.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200319131921.2367-6-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Janosch Frank [Mon, 23 Mar 2020 08:36:06 +0000 (04:36 -0400)]
s390x: protvirt: Support unpack facility
The unpack facility provides the means to setup a protected guest. A
protected guest cannot be introspected by the hypervisor or any
user/administrator of the machine it is running on.
Protected guests are encrypted at rest and need a special boot
mechanism via diag308 subcode 8 and 10.
Code 8 sets the PV specific IPLB which is retained separately from
those set via code 5.
Code 10 is used to unpack the VM into protected memory, verify its
integrity and start it.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Co-developed-by: Christian Borntraeger <borntraeger@de.ibm.com> [Changes
to machine] Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20200323083606.24520-1-frankja@linux.ibm.com>
[CH: fixed up KVM_PV_VM_ -> KVM_PV_] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
libqos: Give get_machine_allocator() internal linkage
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424071142.3525-4-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
fuzz: Simplify how we compute available machines and types
apply_to_qlist(), apply_to_node() work with QObjects. This is
designed for use by tests/qtest/qos-test.c, which gets the data in
that form via QMP. Goes back to commit fc281c8020 "tests: qgraph API
for the qtest driver framework".
Commit 275ab39d86 "fuzz: add support for qos-assisted fuzz targets"
added another user: qtest/fuzz/qos_fuzz.c. To get the data as
QObjects, it uses qmp_marshal_query_machines() and
qmp_marshal_qom_list_types().
All this code is rather cumbersome. Switch to working with generated
QAPI types instead:
* Replace apply_to_qlist() & friends by machines_apply_to_node() and
types_apply_to_node().
* Have qos_fuzz.c use qmp_query_machines() and qmp_qom_list_types()
instead.
* Have qos_test.c convert from QObject to the QAPI types.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424071142.3525-3-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Target recurse-fuzz depends on pc-bios/optionrom/fuzz, which can't be
made. It's not used anywhere. Added in commit c621dc3e01c, looks
like cargo cult. Delete.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200424071142.3525-2-armbru@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Apply the obvious, minimal fix. I admit I'm tempted to rip out the
unused (and obviously untested) feature instead, because YAGNI.
Note that this is not the final result, as spd_data_generate() next
increases #banks from 1 to 2 if possible. This is done "to avoid a
bug in MIPS Malta firmware". We don't even use this function with
machine type malta. *Shrug*
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200422134815.1584-5-armbru@redhat.com>
smbus: Fix spd_data_generate() error API violation
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
spd_data_generate() can pass @errp to error_setg() more than once when
it adjusts both memory size and type. Harmless, because no caller
passes anything that needs adjusting. Until the previous commit,
sam460ex passed types that needed adjusting, but not sizes.
spd_data_generate()'s contract is rather awkward:
If everything's fine, return non-null and don't set an error.
Else, if memory size or type need adjusting, return non-null and
set an error describing the adjustment.
Else, return null and set an error reporting why no data can be
generated.
Its callers treat the error as a warning even when null is returned.
They don't create the "smbus-eeprom" device then. Suspicious.
Since the previous commit, only "everything's fine" can actually
happen. Drop the unused code and simplify the callers. This gets rid
of the error API violation.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200422134815.1584-3-armbru@redhat.com>
sam460ex: Suppress useless warning on -m 32 and -m 64
Requesting 32 or 64 MiB of RAM with the sam460ex machine type produces
a useless warning:
qemu-system-ppc: warning: Memory size is too small for SDRAM type, adjusting type
This is because sam460ex_init() asks spd_data_generate() for DDR2,
which is impossible, so spd_data_generate() corrects it to DDR.
The warning goes back to commit 08fd99179a "sam460ex: Clean up SPD
EEPROM creation".
Make sam460ex_init() pass the correct SDRAM type to get rid of the
warning.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200422134815.1584-2-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
qmp_guest_suspend_disk() and qmp_guest_suspend_ram() pass @local_err
first to check_suspend_mode(), then to acquire_privilege(), then to
execute_async(). Continuing after errors here can only end in tears.
For instance, we risk tripping error_setv()'s assertion.
Fixes: aa59637ea1c6a4c83430933f9c44c43e6c3f1b69 Fixes: f54603b6aa765514b2519e74114a2f417759d727 Cc: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200422130719.28225-15-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
qmp_guest_get_memory_blocks() passes &local_err to
transfer_memory_block() in a loop. If this fails in more than one
iteration, it can trip error_setv()'s assertion.
Fix it to break the loop.
Cc: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200422130719.28225-14-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
qmp_xen_colo_do_checkpoint() passes @errp first to
replication_do_checkpoint_all(), and then to
colo_notify_filters_event(). If both fail, this will trip the
assertion in error_setv().
Similar code in secondary_vm_do_failover() calls
colo_notify_filters_event() only after replication_do_checkpoint_all()
succeeded. Do the same here.
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
qio_channel_socket_close() passes @errp first to
socket_listen_cleanup(), and then, if closesocket() fails, to
error_setg_errno(). If socket_listen_cleanup() failed, this will trip
the assertion in error_setv().
Fix by ignoring a second error.
Fixes: 73564c407caedf992a1c688b5fea776a8b56ba2a Cc: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20200422130719.28225-11-armbru@redhat.com>
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