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4 months agobackends: Use g_autofree in HostMemoryBackendClass::alloc() handlers
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 11:59:15 +0000 (12:59 +0100)]
backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers

In preparation of having HostMemoryBackendClass::alloc() handlers
return a boolean, have them use g_autofree.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-15-philmd@linaro.org>

4 months agomemory: Have memory_region_init_ram_from_fd() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:46:06 +0000 (13:46 +0100)]
memory: Have memory_region_init_ram_from_fd() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_from_fd
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-14-philmd@linaro.org>

4 months agomemory: Have memory_region_init_ram_from_file() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:45:13 +0000 (13:45 +0100)]
memory: Have memory_region_init_ram_from_file() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_from_file
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-13-philmd@linaro.org>

4 months agomemory: Have memory_region_init_resizeable_ram() return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 11:12:03 +0000 (12:12 +0100)]
memory: Have memory_region_init_resizeable_ram() return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_resizeable_ram
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-12-philmd@linaro.org>

4 months agomemory: Have memory_region_init_rom_device() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:31:30 +0000 (11:31 +0100)]
memory: Have memory_region_init_rom_device() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_device
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-11-philmd@linaro.org>

4 months agomemory: Simplify memory_region_init_rom_device_nomigrate() calls
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:39:59 +0000 (13:39 +0100)]
memory: Simplify memory_region_init_rom_device_nomigrate() calls

Mechanical change using the following coccinelle script:

@@
expression mr, owner, arg3, arg4, arg5, arg6, errp;
@@
-   memory_region_init_rom_device_nomigrate(mr, owner, arg3, arg4, arg5, arg6, &errp);
    if (
-       errp
+       !memory_region_init_rom_device_nomigrate(mr, owner, arg3, arg4, arg5, arg6, &errp)
    ) {
        ...
        return;
    }

and removing the local Error variable.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-10-philmd@linaro.org>

4 months agomemory: Have memory_region_init_rom_device_nomigrate() return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:30:34 +0000 (11:30 +0100)]
memory: Have memory_region_init_rom_device_nomigrate() return a boolean

Following the example documented since commit e3fe3988d7
("error: Document Error API usage rules"), have
memory_region_init_rom_device_nomigrate() return a boolean
indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-9-philmd@linaro.org>

4 months agomemory: Have memory_region_init_rom() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:29:31 +0000 (11:29 +0100)]
memory: Have memory_region_init_rom() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom()
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-8-philmd@linaro.org>

4 months agomemory: Have memory_region_init_ram() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:28:36 +0000 (11:28 +0100)]
memory: Have memory_region_init_ram() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram()
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-7-philmd@linaro.org>

4 months agomemory: Simplify memory_region_init_ram_from_fd() calls
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:27:16 +0000 (13:27 +0100)]
memory: Simplify memory_region_init_ram_from_fd() calls

Mechanical change using the following coccinelle script:

@@
expression mr, owner, arg3, arg4, arg5, arg6, arg7, errp;
@@
-   memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp);
    if (
-       errp
+       !memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp)
    ) {
        ...
        return;
    }

and removing the local Error variable.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-6-philmd@linaro.org>

4 months agomemory: Simplify memory_region_init_rom_nomigrate() calls
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:26:39 +0000 (13:26 +0100)]
memory: Simplify memory_region_init_rom_nomigrate() calls

Mechanical change using the following coccinelle script:

@@
expression mr, owner, arg3, arg4, errp;
@@
-   memory_region_init_rom_nomigrate(mr, owner, arg3, arg4, &errp);
    if (
-       errp
+       !memory_region_init_rom_nomigrate(mr, owner, arg3, arg4, &errp)
    ) {
        ...
        return;
    }

and removing the local Error variable.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-5-philmd@linaro.org>

4 months agomemory: Have memory_region_init_rom_nomigrate() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:27:11 +0000 (11:27 +0100)]
memory: Have memory_region_init_rom_nomigrate() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_nomigrate
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-4-philmd@linaro.org>
[PMD: Only update 'readonly' field on success (Manos Pitsidianakis)]
Message-Id: <af352e7d-3346-4705-be77-6eed86858d18@linaro.org>

4 months agomemory: Have memory_region_init_ram_nomigrate() handler return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 12:21:56 +0000 (13:21 +0100)]
memory: Have memory_region_init_ram_nomigrate() handler return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_nomigrate
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-3-philmd@linaro.org>

4 months agomemory: Have memory_region_init_ram_flags_nomigrate() return a boolean
Philippe Mathieu-Daudé [Mon, 20 Nov 2023 10:24:45 +0000 (11:24 +0100)]
memory: Have memory_region_init_ram_flags_nomigrate() return a boolean

Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_nomigrate
return a boolean indicating whether an error is set or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-2-philmd@linaro.org>

4 months agohw/mips: Inline 'bios.h' definitions
Philippe Mathieu-Daudé [Wed, 22 Nov 2023 14:34:58 +0000 (15:34 +0100)]
hw/mips: Inline 'bios.h' definitions

There is no universal BIOS, each machine needs a specific one.

Move the machine-specific definitions to each machine code and
remove this bogus header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231122184334.18201-1-philmd@linaro.org>

4 months agohw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion
Philippe Mathieu-Daudé [Wed, 22 Nov 2023 14:21:02 +0000 (15:21 +0100)]
hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion

xive2_regs.h only requires declarations from "qemu/bswap.h".
Include it instead of the huge target-specific "cpu.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id:  <20231122183920.17905-1-philmd@linaro.org>

4 months agohw: Simplify accesses to the CPUState::'start-powered-off' property
Philippe Mathieu-Daudé [Wed, 22 Nov 2023 17:17:42 +0000 (18:17 +0100)]
hw: Simplify accesses to the CPUState::'start-powered-off' property

The 'start-powered-off' property has been added to ARM CPUs in
commit 5de164304a ("arm: Allow secondary KVM CPUs to be booted
via PSCI"), then eventually got generalized to all CPUs in commit
c1b701587e ("target/arm: Move start-powered-off property to generic
CPUState"). Since all CPUs have it, no need to check whether it is
available. Updating this property can't fail, so use &error_abort.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-5-philmd@linaro.org>

4 months agohw/ppc/spapr_cpu_core: Access QDev properties with proper API
Philippe Mathieu-Daudé [Thu, 23 Nov 2023 12:42:35 +0000 (13:42 +0100)]
hw/ppc/spapr_cpu_core: Access QDev properties with proper API

CPUState::start_powered_off field is part of the internal
implementation of a QDev CPU. It is exposed as the QDev
"start-powered-off" property. External components should
use the qdev properties API to access it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-Id: <20231123143813.42632-2-philmd@linaro.org>

4 months agohw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property
Philippe Mathieu-Daudé [Wed, 21 Dec 2022 18:51:25 +0000 (19:51 +0100)]
hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property

The 'mp-affinity' property is present since commit 15a21fe028
("target-arm: Add mp-affinity property for ARM CPU class").
Use it and remove a /* TODO */ comment. Since all ARM CPUs
have this property, use &error_abort, because this call can
not fail.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-4-philmd@linaro.org>

4 months agohw/arm/bcm2836: Simplify use of 'reset-cbar' property
Philippe Mathieu-Daudé [Wed, 22 Nov 2023 17:16:38 +0000 (18:16 +0100)]
hw/arm/bcm2836: Simplify use of 'reset-cbar' property

bcm2836_realize() is called by

 - bcm2836_class_init() which sets:

    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7")

 - bcm2837_class_init() which sets:

    bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53")

Both Cortex-A7 / A53 have the ARM_FEATURE_CBAR set. If it isn't,
then this is a programming error: use &error_abort.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-3-philmd@linaro.org>

4 months agohw/audio/sb16: Do not migrate qdev properties
Philippe Mathieu-Daudé [Fri, 24 Nov 2023 16:09:16 +0000 (17:09 +0100)]
hw/audio/sb16: Do not migrate qdev properties

Since commit f7b4f61f63 ("qdev/isa: convert soundblaster") these
fields have been converted to qdev properties, so don't need to
be migrated:

  static Property sb16_properties[] = {
      DEFINE_AUDIO_PROPERTIES(SB16State, card),
      DEFINE_PROP_UINT32 ("version", SB16State, ver,  0x0405), /* 4.5 */
      DEFINE_PROP_UINT32 ("iobase",  SB16State, port, 0x220),
      DEFINE_PROP_UINT32 ("irq",     SB16State, irq,  5),
      DEFINE_PROP_UINT32 ("dma",     SB16State, dma,  1),
      DEFINE_PROP_UINT32 ("dma16",   SB16State, hdma, 5),
      DEFINE_PROP_END_OF_LIST (),
  };

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20231124182615.94943-1-philmd@linaro.org>

4 months agohw/cpu/cluster: Cleanup unused included header in cluster.c
Zhao Liu [Mon, 27 Nov 2023 14:56:11 +0000 (22:56 +0800)]
hw/cpu/cluster: Cleanup unused included header in cluster.c

Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.

Tested by "./configure" and then "make".

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231127145611.925817-3-zhao1.liu@linux.intel.com>

4 months agohw/cpu/core: Cleanup unused included header in core.c
Zhao Liu [Mon, 27 Nov 2023 14:56:10 +0000 (22:56 +0800)]
hw/cpu/core: Cleanup unused included header in core.c

Remove unused header (qemu/module.h and sysemu/cpus.h) in core.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.

Tested by "./configure" and then "make".

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231127145611.925817-2-zhao1.liu@linux.intel.com>

4 months agohw/core/cpu: Update description of CPUState::node
Philippe Mathieu-Daudé [Wed, 29 Nov 2023 18:31:16 +0000 (19:31 +0100)]
hw/core/cpu: Update description of CPUState::node

'next_cpu' was converted to 'node' in commit bdc44640cb
("cpu: Use QTAILQ for CPU list").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231129183243.15859-1-philmd@linaro.org>

4 months agohw/core/cpu: Remove final vestiges of dynamic state tracing
Philippe Mathieu-Daudé [Wed, 29 Nov 2023 16:07:38 +0000 (17:07 +0100)]
hw/core/cpu: Remove final vestiges of dynamic state tracing

The dynamic state tracing was removed in commit d0aaf08bb9.

Fixes: d0aaf08bb9 ("tcg: remove the final vestiges of dstate")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231129182734.15565-1-philmd@linaro.org>

4 months agohw/riscv/shakti_c: Check CPU type in machine_run_board_init()
Gavin Shan [Mon, 4 Dec 2023 00:47:26 +0000 (10:47 +1000)]
hw/riscv/shakti_c: Check CPU type in machine_run_board_init()

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-10-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agohw/arm: Check CPU type in machine_run_board_init()
Gavin Shan [Mon, 4 Dec 2023 00:47:25 +0000 (10:47 +1000)]
hw/arm: Check CPU type in machine_run_board_init()

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-9-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agohw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
Gavin Shan [Mon, 4 Dec 2023 00:47:24 +0000 (10:47 +1000)]
hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231204004726.483558-8-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agohw/arm/virt: Check CPU type in machine_run_board_init()
Gavin Shan [Mon, 4 Dec 2023 00:47:23 +0000 (10:47 +1000)]
hw/arm/virt: Check CPU type in machine_run_board_init()

Set mc->valid_cpu_types so that the user specified CPU type can be
validated in machine_run_board_init(). We needn't to do the check
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231204004726.483558-7-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agohw/arm/virt: Hide host CPU model for tcg
Gavin Shan [Mon, 4 Dec 2023 00:47:22 +0000 (10:47 +1000)]
hw/arm/virt: Hide host CPU model for tcg

The 'host' CPU model isn't available until KVM or HVF is enabled.
For example, the following error messages are seen when the guest
is started with option '-cpu cortex-a8' on tcg after the next commit
is applied to check the CPU type in machine_run_board_init().

  ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
  assertion failed: (model != NULL)
  Bail out! ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
  assertion failed: (model != NULL)
  Aborted (core dumped)

Hide 'host' CPU model until KVM or HVF is enabled. With this applied,
the valid CPU models can be shown.

  qemu-system-aarch64: Invalid CPU type: cortex-a8
  The valid types are: cortex-a7, cortex-a15, cortex-a35, \
  cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \
  neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53,      \
  cortex-a57, max

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-6-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agomachine: Print CPU model name instead of CPU type
Gavin Shan [Mon, 4 Dec 2023 00:47:21 +0000 (10:47 +1000)]
machine: Print CPU model name instead of CPU type

The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.

Correct the error messages to print CPU model names instead of CPU
type names.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-5-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agomachine: Improve is_cpu_type_supported()
Gavin Shan [Mon, 4 Dec 2023 00:47:20 +0000 (10:47 +1000)]
machine: Improve is_cpu_type_supported()

It's no sense to check the CPU type when mc->valid_cpu_types[0] is
NULL, which is a program error. Raise an assert on this.

A precise hint for the error message is given when mc->valid_cpu_types[0]
is the only valid entry. Besides, enumeration on mc->valid_cpu_types[0]
when we have mutiple valid entries there is avoided to increase the code
readability, as suggested by Philippe Mathieu-Daudé.

Besides, @cc comes from machine->cpu_type or mc->default_cpu_type. For
the later case, it can be NULL and it's also a program error. We should
use assert() in this case.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231204004726.483558-4-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agomachine: Introduce helper is_cpu_type_supported()
Gavin Shan [Mon, 4 Dec 2023 00:47:19 +0000 (10:47 +1000)]
machine: Introduce helper is_cpu_type_supported()

The logic, to check if the specified CPU type is supported in
machine_run_board_init(), is independent enough. Factor it out into
helper is_cpu_type_supported(). machine_run_board_init() looks a bit
clean with this. Since we're here, @machine_class is renamed to @mc to
avoid multiple line spanning of code. The comments are tweaked a bit
either.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-3-gshan@redhat.com>
[PMD: Only call new helper if machine->cpu_type is not NULL]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agomachine: Use error handling when CPU type is checked
Gavin Shan [Mon, 4 Dec 2023 00:47:18 +0000 (10:47 +1000)]
machine: Use error handling when CPU type is checked

Functions that use an Error **errp parameter to return errors should
not also report them to the user, because reporting is the caller's
job. The principle is violated by machine_run_board_init() because
it calls error_report(), error_printf(), and exit(1) when the machine
doesn't support the requested CPU type.

Clean this up by using error_setg() and error_append_hint() instead.
No functional change, as the only caller passes &error_fatal.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-ID: <20231204004726.483558-2-gshan@redhat.com>
[PMD: Correct error_append_hint() argument]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agohw/core: Add machine_class_default_cpu_type()
Philippe Mathieu-Daudé [Thu, 16 Nov 2023 16:33:12 +0000 (17:33 +0100)]
hw/core: Add machine_class_default_cpu_type()

Add a helper to return a machine default CPU type.

If this machine is restricted to a single CPU type,
use it as default, obviously.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231116163726.28952-1-philmd@linaro.org>

4 months agotarget: Use generic cpu_model_from_type()
Gavin Shan [Tue, 14 Nov 2023 23:56:19 +0000 (09:56 +1000)]
target: Use generic cpu_model_from_type()

Use generic cpu_model_from_type() when the CPU model name needs to
be extracted from the CPU type name.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-23-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/xtensa: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:18 +0000 (09:56 +1000)]
target/xtensa: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  test_mmuhifi_c3
  sample_controller
  lx106
  dsp3400
  de233_fpu
  de212
  dc233c
  dc232b

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  dc232b
  dc233c
  de212
  de233_fpu
  dsp3400
  lx106
  sample_controller
  test_mmuhifi_c3

Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231114235628.534334-22-gshan@redhat.com>
[PMD: Split patch in 2, only include the "Use generic cpu_list" change]
Message-ID: <51ffd060-b2f8-405c-83e1-a0663c0183f5@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/tricore: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:17 +0000 (09:56 +1000)]
target/tricore: Use generic cpu_list()

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
Available CPUs:
  tc1796
  tc1797
  tc27x
  tc37x

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-21-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/sh4: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:16 +0000 (09:56 +1000)]
target/sh4: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
  sh7750r
  sh7751r
  sh7785

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-20-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/rx: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:15 +0000 (09:56 +1000)]
target/rx: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
  rx62n-rx-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
  rx62n

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-19-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/riscv: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:14 +0000 (09:56 +1000)]
target/riscv: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
any
max
rv64
shakti-c
sifive-e51
sifive-u54
thead-c906
veyron-v1
x-rv128

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
Available CPUs:
  any
  max
  rv64
  shakti-c
  sifive-e51
  sifive-u54
  thead-c906
  veyron-v1
  x-rv128

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-18-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/openrisc: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:13 +0000 (09:56 +1000)]
target/openrisc: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
  or1200
  any

After it's applied:

[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
  any
  or1200

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-17-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/mips: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:12 +0000 (09:56 +1000)]
target/mips: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
MIPS '4Kc'
MIPS '4Km'
MIPS '4KEcR1'
MIPS 'XBurstR1'
MIPS '4KEmR1'
MIPS '4KEc'
MIPS '4KEm'
MIPS '24Kc'
MIPS '24KEc'
MIPS '24Kf'
MIPS '34Kf'
MIPS '74Kf'
MIPS 'XBurstR2'
MIPS 'M14K'
MIPS 'M14Kc'
MIPS 'P5600'
MIPS 'mips32r6-generic'
MIPS 'I7200'
MIPS 'R4000'
MIPS 'VR5432'
MIPS '5Kc'
MIPS '5Kf'
MIPS '20Kc'
MIPS 'MIPS64R2-generic'
MIPS '5KEc'
MIPS '5KEf'
MIPS 'I6400'
MIPS 'I6500'
MIPS 'Loongson-2E'
MIPS 'Loongson-2F'
MIPS 'Loongson-3A1000'
MIPS 'Loongson-3A4000'
MIPS 'mips64dspr2'
MIPS 'Octeon68XX'

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
Available CPUs:
  20Kc
  24Kc
  24KEc
  24Kf
  34Kf
  4Kc
  4KEc
  4KEcR1
  4KEm
  4KEmR1
  4Km
  5Kc
  5KEc
  5KEf
  5Kf
  74Kf
  I6400
  I6500
  I7200
  Loongson-2E
  Loongson-2F
  Loongson-3A1000
  Loongson-3A4000
  M14K
  M14Kc
  mips32r6-generic
  mips64dspr2
  MIPS64R2-generic
  Octeon68XX
  P5600
  R4000
  VR5432
  XBurstR1
  XBurstR2

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-16-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/m68k: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:11 +0000 (09:56 +1000)]
target/m68k: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
cfv4e
m5206
m5208
m68000
m68010
m68020
m68030
m68040
m68060
any

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
Available CPUs:
  any
  cfv4e
  m5206
  m5208
  m68000
  m68010
  m68020
  m68030
  m68040
  m68060

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-15-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/loongarch: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:10 +0000 (09:56 +1000)]
target/loongarch: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
la132-loongarch-cpu
la464-loongarch-cpu
max-loongarch-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
Available CPUs:
  la132
  la464
  max

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-14-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/hppa: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:09 +0000 (09:56 +1000)]
target/hppa: Use generic cpu_list()

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
  hppa
  hppa64

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-13-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/hexagon: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:08 +0000 (09:56 +1000)]
target/hexagon: Use generic cpu_list()

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-hexagon -cpu ?
Available CPUs:
  v67
  v68
  v69
  v71
  v73

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-12-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/cris: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:07 +0000 (09:56 +1000)]
target/cris: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
  crisv8
  crisv9
  crisv10
  crisv11
  crisv17
  crisv32

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
  crisv10
  crisv11
  crisv17
  crisv32
  crisv8
  crisv9

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-11-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/avr: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:06 +0000 (09:56 +1000)]
target/avr: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
avr5-avr-cpu
avr51-avr-cpu
avr6-avr-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
Available CPUs:
  avr5
  avr51
  avr6

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-10-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/arm: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:05 +0000 (09:56 +1000)]
target/arm: Use generic cpu_list()

No changes of the output from the following command before and
after it's applied.

[gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
Available CPUs:
  a64fx
  arm1026
  arm1136
  arm1136-r2
  arm1176
  arm11mpcore
  arm926
  arm946
  cortex-a15
  cortex-a35
  cortex-a53
  cortex-a55
  cortex-a57
  cortex-a7
  cortex-a710
  cortex-a72
  cortex-a76
  cortex-a8
  cortex-a9
  cortex-m0
  cortex-m3
  cortex-m33
  cortex-m4
  cortex-m55
  cortex-m7
  cortex-r5
  cortex-r52
  cortex-r5f
  max
  neoverse-n1
  neoverse-n2
  neoverse-v1
  pxa250
  pxa255
  pxa260
  pxa261
  pxa262
  pxa270-a0
  pxa270-a1
  pxa270
  pxa270-b0
  pxa270-b1
  pxa270-c0
  pxa270-c5
  sa1100
  sa1110
  ti925t

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-9-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/alpha: Use generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:04 +0000 (09:56 +1000)]
target/alpha: Use generic cpu_list()

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
  ev4-alpha-cpu
  ev5-alpha-cpu
  ev56-alpha-cpu
  ev6-alpha-cpu
  ev67-alpha-cpu
  ev68-alpha-cpu
  pca56-alpha-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
  ev4
  ev5
  ev56
  ev6
  ev67
  ev68
  pca56

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-8-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agocpu: Add generic cpu_list()
Gavin Shan [Tue, 14 Nov 2023 23:56:03 +0000 (09:56 +1000)]
cpu: Add generic cpu_list()

Add generic cpu_list() to replace the individual target's implementation
in the subsequent commits. Currently, there are 3 targets with no cpu_list()
implementation: microblaze and nios2. With this applied, those two targets
switch to the generic cpu_list().

[gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
Available CPUs:
  microblaze-cpu

[gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
Available CPUs:
  nios2-cpu

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-7-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agocpu: Add helper cpu_model_from_type()
Gavin Shan [Tue, 14 Nov 2023 23:56:02 +0000 (09:56 +1000)]
cpu: Add helper cpu_model_from_type()

Add helper cpu_model_from_type() to extract the CPU model name from
the CPU type name in two circumstances: (1) The CPU type name is the
combination of the CPU model name and suffix. (2) The CPU type name
is same to the CPU model name.

The helper will be used in the subsequent commits to conver the
CPU type name to the CPU model name.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-6-gshan@redhat.com>
[PMD: Mention returned string must be released with g_free()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agocpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
Philippe Mathieu-Daudé [Fri, 8 Sep 2023 08:09:23 +0000 (10:09 +0200)]
cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()

For all targets, the CPU class returned from CPUClass::class_by_name()
and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
compatible. Lets apply the check in cpu_class_by_name() for once,
instead of having the check in CPUClass::class_by_name() for individual
target.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231114235628.534334-4-gshan@redhat.com>

4 months agotarget/hppa: Remove object_class_is_abstract()
Gavin Shan [Tue, 14 Nov 2023 23:55:59 +0000 (09:55 +1000)]
target/hppa: Remove object_class_is_abstract()

Since commit 3a9d0d7b64 ("hw/cpu: Call object_class_is_abstract()
once in cpu_class_by_name()"), there is no need to check if @oc is
abstract because it has been covered by cpu_class_by_name().

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-3-gshan@redhat.com>
[PMD: Mention commit 3a9d0d7b64]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agotarget/alpha: Remove fallback to ev67 cpu class
Gavin Shan [Tue, 14 Nov 2023 23:55:58 +0000 (09:55 +1000)]
target/alpha: Remove fallback to ev67 cpu class

'ev67' CPU class will be returned to match everything, which makes
no sense as mentioned in the comments. Remove the logic to fall
back to 'ev67' CPU class to match everything.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-2-gshan@redhat.com>
[PMD: Reword subject, replace 'any' -> 'ev67' on linux-user]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4 months agomeson: Allow building binary with no target-specific files in hw/
Philippe Mathieu-Daudé [Tue, 21 Nov 2023 12:52:48 +0000 (13:52 +0100)]
meson: Allow building binary with no target-specific files in hw/

Allow  building a qemu-system-foo binary with target-agnostic
only HW models.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231121203129.67999-1-philmd@linaro.org>

4 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell [Thu, 4 Jan 2024 19:55:19 +0000 (19:55 +0000)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optimizations
* target/i386: implement CMPccXADD
* target/i386: the sgx_epc_get_section stub is reachable
* esp: check for NULL result from scsi_device_find()

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# gpg: Signature made Sun 31 Dec 2023 08:12:22 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits)
  meson.build: report graphics backends separately
  configure, meson: rename targetos to host_os
  meson: rename config_all
  meson: remove CONFIG_ALL
  meson: remove config_targetos
  meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos
  meson: remove OS definitions from config_targetos
  meson: always probe u2f and canokey if the option is enabled
  meson: move subdirs to "Collect sources" section
  meson: move config-host.h definitions together
  meson: move CFI detection code with other compiler flags
  meson: keep subprojects together
  meson: move accelerator dependency checks together
  meson: move option validation together
  meson: move program checks together
  meson: add more sections to main meson.build
  configure: unify again the case arms in probe_target_compiler
  configure: remove unnecessary subshell
  Makefile: clean qemu-iotests output
  meson: use version_compare() to compare version
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 months agoMerge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell [Thu, 4 Jan 2024 10:23:34 +0000 (10:23 +0000)]
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging

Mark VMStateField and VMStateDescription arrays const.

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# gpg: Signature made Fri 29 Dec 2023 21:21:31 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-20231230' of https://gitlab.com/rth7680/qemu: (71 commits)
  docs: Constify VMstate in examples
  tests/unit/test-vmstate: Constify VMState
  util/fifo8: Constify VMState
  replay: Constify VMState
  system: Constify VMState
  migration: Constify VMState
  cpu-target: Constify VMState
  backends: Constify VMState
  audio: Constify VMState
  hw/misc/macio: Constify VMState
  hw/watchdog: Constify VMState
  hw/virtio: Constify VMState
  hw/vfio: Constify VMState
  hw/usb: Constify VMState
  hw/tpm: Constify VMState
  hw/timer: Constify VMState
  hw/ssi: Constify VMState
  hw/sparc: Constify VMState
  hw/sensor: Constify VMState
  hw/sd: Constify VMState
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 months agomeson.build: report graphics backends separately
Alex Bennée [Fri, 22 Dec 2023 11:48:46 +0000 (11:48 +0000)]
meson.build: report graphics backends separately

To enable accelerated VirtIO GPUs for the guest we need the rendering
support on the host, which currently it's reported in the configuration
summary under the "dependencies" section. Add a graphics backend section
and report the status of the VirGL and Rutabaga support libraries.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231222114846.2850741-1-alex.bennee@linaro.org>
[Remove from dependencies as suggested by Philippe. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agoconfigure, meson: rename targetos to host_os
Paolo Bonzini [Fri, 3 Nov 2023 08:17:48 +0000 (09:17 +0100)]
configure, meson: rename targetos to host_os

This variable is about the host OS, not the target.  It is used a lot
more since the Meson conversion, but the original sin dates back to 2003.
Time to fix it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: rename config_all
Paolo Bonzini [Fri, 29 Sep 2023 09:40:03 +0000 (11:40 +0200)]
meson: rename config_all

config_all now lists only accelerators, rename it to indicate its actual
content.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: remove CONFIG_ALL
Paolo Bonzini [Thu, 31 Aug 2023 09:18:24 +0000 (11:18 +0200)]
meson: remove CONFIG_ALL

CONFIG_ALL is tricky to use and was ported over to Meson from the
recursive processing of Makefile variables.  Meson sourcesets
however have all_sources() and all_dependencies() methods that
remove the need for it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: remove config_targetos
Paolo Bonzini [Wed, 30 Aug 2023 09:52:43 +0000 (11:52 +0200)]
meson: remove config_targetos

config_targetos is now empty and can be removed; its use in sourcesets
that do not involve target-specific files can be replaced with an empty
dictionary.

In fact, at this point *all* sourcesets that do not involve
target-specific files are just glorified mutable arrays.  Enforce that
they never test for symbols in "when:" by computing the set of files
without "strict: false".

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos
Paolo Bonzini [Wed, 30 Aug 2023 09:29:54 +0000 (11:29 +0200)]
meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos

For consistency with other OSes, use if...endif for rules that are
target-independent.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: remove OS definitions from config_targetos
Paolo Bonzini [Fri, 26 May 2023 10:20:39 +0000 (12:20 +0200)]
meson: remove OS definitions from config_targetos

CONFIG_DARWIN, CONFIG_LINUX and CONFIG_BSD are used in some rules, but
only CONFIG_LINUX has substantial use.  Convert them all to if...endif.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: always probe u2f and canokey if the option is enabled
Paolo Bonzini [Fri, 8 Sep 2023 10:10:27 +0000 (12:10 +0200)]
meson: always probe u2f and canokey if the option is enabled

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move subdirs to "Collect sources" section
Paolo Bonzini [Fri, 3 Nov 2023 08:33:57 +0000 (09:33 +0100)]
meson: move subdirs to "Collect sources" section

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move config-host.h definitions together
Paolo Bonzini [Fri, 8 Sep 2023 10:10:08 +0000 (12:10 +0200)]
meson: move config-host.h definitions together

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move CFI detection code with other compiler flags
Paolo Bonzini [Wed, 10 May 2023 12:54:30 +0000 (14:54 +0200)]
meson: move CFI detection code with other compiler flags

Keep it together with the other compiler modes, and before dependencies.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: keep subprojects together
Paolo Bonzini [Fri, 8 Sep 2023 10:09:22 +0000 (12:09 +0200)]
meson: keep subprojects together

And move away dependencies that are not subprojects anymore.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move accelerator dependency checks together
Paolo Bonzini [Fri, 8 Sep 2023 10:08:53 +0000 (12:08 +0200)]
meson: move accelerator dependency checks together

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move option validation together
Paolo Bonzini [Sat, 30 Dec 2023 17:42:30 +0000 (18:42 +0100)]
meson: move option validation together

Check options before compiler flags, because some compiler flags are
incompatible with modules.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: move program checks together
Paolo Bonzini [Fri, 8 Sep 2023 10:06:57 +0000 (12:06 +0200)]
meson: move program checks together

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: add more sections to main meson.build
Paolo Bonzini [Fri, 8 Sep 2023 10:06:12 +0000 (12:06 +0200)]
meson: add more sections to main meson.build

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agoconfigure: unify again the case arms in probe_target_compiler
Paolo Bonzini [Fri, 3 Nov 2023 08:48:21 +0000 (09:48 +0100)]
configure: unify again the case arms in probe_target_compiler

Remove assignments that match the default, and group the
targets for debian-legacy-test-cross and debian-all-test-cross
into a single arm.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agoconfigure: remove unnecessary subshell
Paolo Bonzini [Fri, 3 Nov 2023 09:06:08 +0000 (10:06 +0100)]
configure: remove unnecessary subshell

Do not use a subshell to hide the shadowing of $config_host_mak.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agoMakefile: clean qemu-iotests output
Paolo Bonzini [Fri, 3 Nov 2023 09:00:04 +0000 (10:00 +0100)]
Makefile: clean qemu-iotests output

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: use version_compare() to compare version
Paolo Bonzini [Wed, 13 Dec 2023 10:33:41 +0000 (11:33 +0100)]
meson: use version_compare() to compare version

While a simple lexicographic comparison usually works, it is less
robust than a more specific algorithm designed to compare versions.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: remove unused variable
Paolo Bonzini [Wed, 13 Dec 2023 10:30:50 +0000 (11:30 +0100)]
meson: remove unused variable

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agomeson: fix type of "relocatable" option
Paolo Bonzini [Wed, 13 Dec 2023 10:30:09 +0000 (11:30 +0100)]
meson: fix type of "relocatable" option

Since the option is of boolean type, the default value should be a boolean
rather than a string.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agoesp: check for NULL result from scsi_device_find()
Alexandra Diupina [Fri, 29 Dec 2023 15:26:47 +0000 (18:26 +0300)]
esp: check for NULL result from scsi_device_find()

Add a 'current_lun' check for a null value
to avoid null pointer dereferencing and
recover host if NULL return

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: 4eb8606560 (esp: store lun coming from the MESSAGE OUT phase)
Signed-off-by: Alexandra Diupina <adiupina@astralinux.ru>
Message-ID: <20231229152647.19699-1-adiupina@astralinux.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: the sgx_epc_get_section stub is reachable
Paolo Bonzini [Tue, 1 Feb 2022 19:09:41 +0000 (20:09 +0100)]
target/i386: the sgx_epc_get_section stub is reachable

The sgx_epc_get_section stub is reachable from cpu_x86_cpuid.  It
should not assert, instead it should just return true just like
the "real" sgx_epc_get_section does when SGX is disabled.

Reported-by: Vladimír Beneš <vbenes@redhat.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <20220201190941.106001-1-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: implement CMPccXADD
Paolo Bonzini [Tue, 10 Oct 2023 08:31:39 +0000 (10:31 +0200)]
target/i386: implement CMPccXADD

The main difficulty here is that a page fault when writing to the destination
must not overwrite the flags.  Therefore, the flags computation must be
inlined instead of using gen_jcc1*.

For simplicity, I am using an unconditional cmpxchg operation, that becomes
a NOP if the comparison fails.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: introduce flags writeback mechanism
Paolo Bonzini [Wed, 11 Oct 2023 13:26:40 +0000 (15:26 +0200)]
target/i386: introduce flags writeback mechanism

ALU instructions can write to both memory and flags.  If the CC_SRC*
and CC_DST locations have been written already when a memory access
causes a fault, the value in CC_SRC* and CC_DST might be interpreted
with the wrong CC_OP (the one that is in effect before the instruction.

Besides just using the wrong result for the flags, something like
subtracting -1 can have disastrous effects if the current CC_OP is
CC_OP_EFLAGS: this is because QEMU does not expect bits outside the ALU
flags to be set in CC_SRC, and env->eflags can end up set to all-ones.
In the case of the attached testcase, this sets IOPL to 3 and would
cause an assertion failure if SUB is moved to the new decoder.

This mechanism is not really needed for BMI instructions, which can
only write to a register, but put it to use anyway for cleanliness.
In the case of BZHI, the code has to be modified slightly to ensure
that decode->cc_src is written, otherwise the new assertions trigger.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: adjust decoding of J operand
Paolo Bonzini [Wed, 11 Oct 2023 09:28:46 +0000 (11:28 +0200)]
target/i386: adjust decoding of J operand

gen_jcc() has been changed to accept a relative offset since the
new decoder was written.  Adjust the J operand, which is meant
to be used with jump instructions such as gen_jcc(), to not
include the program counter and to not truncate the result, as
both operations are now performed by common code.

The result is that J is now the same as the I operand.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: move operand load and writeback out of gen_cmovcc1
Paolo Bonzini [Fri, 27 Oct 2023 02:22:25 +0000 (04:22 +0200)]
target/i386: move operand load and writeback out of gen_cmovcc1

Similar to gen_setcc1, make gen_cmovcc1 receive TCGv.  This is more friendly
to simultaneous implementation in the old and the new decoder.

A small wart is that s->T0 of CMOV is currently the *second* argument (which
would ordinarily be in T1).  Therefore, the condition has to be inverted in
order to overwrite s->T0 with cpu_regs[reg] if the MOV is not performed.

This only applies to the old decoder, and this code will go away soon.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: prepare for implementation of STOS/SCAS in new decoder
Paolo Bonzini [Mon, 23 Oct 2023 06:52:36 +0000 (08:52 +0200)]
target/i386: prepare for implementation of STOS/SCAS in new decoder

Do not use gen_op, and pull the load from the accumulator into
disas_insn.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: do not use s->tmp0 for jumps on ECX ==/!= 0
Paolo Bonzini [Mon, 23 Oct 2023 08:21:20 +0000 (10:21 +0200)]
target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0

Create a new temporary, to ease the register allocator's work.

Creation of the temporary is pushed into gen_ext_tl, which
also allows NULL as the first parameter now.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: do not use s->tmp4 for push
Paolo Bonzini [Fri, 20 Oct 2023 07:32:06 +0000 (09:32 +0200)]
target/i386: do not use s->tmp4 for push

Just create a temporary for the occasion.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: split eflags computation out of gen_compute_eflags
Paolo Bonzini [Wed, 11 Oct 2023 14:20:20 +0000 (16:20 +0200)]
target/i386: split eflags computation out of gen_compute_eflags

The new x86 decoder wants the gen_* functions to compute EFLAGS before
writeback, which can be an issue for instructions with a memory
destination such as ARPL or shifts.

Extract code to compute the EFLAGS without clobbering CC_SRC, in case
the memory write causes a fault.  The flags writeback mechanism will
take care of copying the result to CC_SRC.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: do not clobber T0 on string operations
Paolo Bonzini [Thu, 19 Oct 2023 14:55:39 +0000 (16:55 +0200)]
target/i386: do not clobber T0 on string operations

The new decoder would rather have the operand in T0 when expanding SCAS, rather
than use R_EAX directly as gen_scas currently does.  This makes SCAS more similar
to CMP and SUB, in that CC_DST = T0 - T1.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: do not clobber A0 in POP translation
Paolo Bonzini [Wed, 21 Sep 2022 12:13:01 +0000 (14:13 +0200)]
target/i386: do not clobber A0 in POP translation

The new decoder likes to compute the address in A0 very early, so the
gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory
operand.  Instead use T0 since it is already available and will be
overwritten immediately after.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: do not decode string source/destination into decode->mem
Paolo Bonzini [Thu, 19 Oct 2023 12:51:16 +0000 (14:51 +0200)]
target/i386: do not decode string source/destination into decode->mem

decode->mem is only used if one operand has has_ea == true.  String
operations will not use decode->mem and will load A0 on their own, because
they are the only case of two memory operands in a single instruction.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: add X86_SPECIALs for MOVSX and MOVZX
Paolo Bonzini [Thu, 19 Oct 2023 13:40:54 +0000 (15:40 +0200)]
target/i386: add X86_SPECIALs for MOVSX and MOVZX

Usually the registers are just moved into s->T0 without much care for
their operand size.  However, in some cases we can get more efficient
code if the operand fetching logic syncs with the emission function
on what is nicer.

All the current uses are mostly demonstrative and only reduce the code
in the emission functions, because the instructions do not support
memory operands.  However the logic is generic and applies to several
more instructions such as MOVSXD (aka movslq), one-byte shift
instructions, multiplications, XLAT, and indirect calls/jumps.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: rename zext0/zext2 and make them closer to the manual
Paolo Bonzini [Thu, 19 Oct 2023 21:14:34 +0000 (23:14 +0200)]
target/i386: rename zext0/zext2 and make them closer to the manual

X86_SPECIAL_ZExtOp0 and X86_SPECIAL_ZExtOp2 are poorly named; they are a hack
that is needed by scalar insertion and extraction instructions, and not really
related to zero extension: for PEXTR the zero extension is done by the generation
functions, for PINSR the high bits are not used at all and in fact are *not*
filled with zeroes when loaded into s->T1.

Rename the values to match the effect described in the manual, and explain
better in the comments.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: avoid trunc and ext for MULX and RORX
Paolo Bonzini [Thu, 19 Oct 2023 16:25:40 +0000 (18:25 +0200)]
target/i386: avoid trunc and ext for MULX and RORX

Use _tl operations for 32-bit operands on 32-bit targets, and only go
through trunc and extu ops for 64-bit targets.  While the trunc/ext
ops should be pretty much free after optimization, the optimizer also
does not like having the same temporary used in multiple EBBs.
Therefore it is nicer to not use tmpN* unless necessary.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: reimplement check for validity of LOCK prefix
Paolo Bonzini [Thu, 19 Oct 2023 12:22:53 +0000 (14:22 +0200)]
target/i386: reimplement check for validity of LOCK prefix

The previous check erroneously allowed CMP to be modified with LOCK.
Instead, tag explicitly the instructions that do support LOCK.

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: document more deviations from the manual
Paolo Bonzini [Mon, 23 Oct 2023 07:58:48 +0000 (09:58 +0200)]
target/i386: document more deviations from the manual

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 months agotarget/i386: clean up cpu_cc_compute_all
Paolo Bonzini [Wed, 25 Oct 2023 22:24:46 +0000 (00:24 +0200)]
target/i386: clean up cpu_cc_compute_all

cpu_cc_compute_all() has an argument that is always equal to CC_OP for historical
reasons (dating back to commit a7812ae4123, "TCG variable type checking.", 2008-11-17,
which added the argument to helper_cc_compute_all).  It does not make sense for the
argument to have any other value, so remove it and clean up some lines that are not
too long anymore.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>