]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/include/asm/kvm_emulate.h
KVM: arm/arm64: Fix guest external abort matching
[mirror_ubuntu-artful-kernel.git] / arch / arm / include / asm / kvm_emulate.h
CommitLineData
749cf76c
CD
1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19#ifndef __ARM_KVM_EMULATE_H__
20#define __ARM_KVM_EMULATE_H__
21
22#include <linux/kvm_host.h>
23#include <asm/kvm_asm.h>
45e96ea6 24#include <asm/kvm_mmio.h>
7393b599 25#include <asm/kvm_arm.h>
4429fc64 26#include <asm/cputype.h>
749cf76c 27
db730d8d
MZ
28unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
29unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu);
749cf76c 30
bc45a516
PF
31static inline unsigned long vcpu_get_reg(struct kvm_vcpu *vcpu,
32 u8 reg_num)
33{
34 return *vcpu_reg(vcpu, reg_num);
35}
36
37static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
38 unsigned long val)
39{
40 *vcpu_reg(vcpu, reg_num) = val;
41}
42
3aedd5c4
MZ
43bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
44void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
5b3e5e5b 45void kvm_inject_undefined(struct kvm_vcpu *vcpu);
bfb78b5c 46void kvm_inject_vabt(struct kvm_vcpu *vcpu);
5b3e5e5b
CD
47void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
48void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
49
3aedd5c4
MZ
50static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
51{
52 return kvm_condition_valid32(vcpu);
53}
54
55static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
56{
57 kvm_skip_instr32(vcpu, is_wide_instr);
58}
59
b856a591
CD
60static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
61{
62 vcpu->arch.hcr = HCR_GUEST_MASK;
63}
64
3aedd5c4 65static inline unsigned long vcpu_get_hcr(const struct kvm_vcpu *vcpu)
3c1e7165
MZ
66{
67 return vcpu->arch.hcr;
68}
69
70static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, unsigned long hcr)
71{
72 vcpu->arch.hcr = hcr;
73}
74
3aedd5c4 75static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
aa024c2f
MZ
76{
77 return 1;
78}
79
db730d8d 80static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
749cf76c 81{
c2a8dab5 82 return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_pc;
749cf76c
CD
83}
84
3aedd5c4 85static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
749cf76c 86{
3aedd5c4 87 return (unsigned long *)&vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr;
749cf76c
CD
88}
89
aa024c2f
MZ
90static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
91{
92 *vcpu_cpsr(vcpu) |= PSR_T_BIT;
93}
94
749cf76c
CD
95static inline bool mode_has_spsr(struct kvm_vcpu *vcpu)
96{
c2a8dab5 97 unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
749cf76c
CD
98 return (cpsr_mode > USR_MODE && cpsr_mode < SYSTEM_MODE);
99}
100
101static inline bool vcpu_mode_priv(struct kvm_vcpu *vcpu)
102{
c2a8dab5 103 unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
749cf76c
CD
104 return cpsr_mode > USR_MODE;;
105}
106
3aedd5c4 107static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu)
7393b599
MZ
108{
109 return vcpu->arch.fault.hsr;
110}
111
3aedd5c4
MZ
112static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
113{
114 u32 hsr = kvm_vcpu_get_hsr(vcpu);
115
116 if (hsr & HSR_CV)
117 return (hsr & HSR_COND) >> HSR_COND_SHIFT;
118
119 return -1;
120}
121
7393b599
MZ
122static inline unsigned long kvm_vcpu_get_hfar(struct kvm_vcpu *vcpu)
123{
124 return vcpu->arch.fault.hxfar;
125}
126
127static inline phys_addr_t kvm_vcpu_get_fault_ipa(struct kvm_vcpu *vcpu)
128{
129 return ((phys_addr_t)vcpu->arch.fault.hpfar & HPFAR_MASK) << 8;
130}
131
4a1df28a
MZ
132static inline bool kvm_vcpu_dabt_isvalid(struct kvm_vcpu *vcpu)
133{
134 return kvm_vcpu_get_hsr(vcpu) & HSR_ISV;
135}
136
023cc964
MZ
137static inline bool kvm_vcpu_dabt_iswrite(struct kvm_vcpu *vcpu)
138{
139 return kvm_vcpu_get_hsr(vcpu) & HSR_WNR;
140}
141
7c511b88
MZ
142static inline bool kvm_vcpu_dabt_issext(struct kvm_vcpu *vcpu)
143{
144 return kvm_vcpu_get_hsr(vcpu) & HSR_SSE;
145}
146
d0adf747
MZ
147static inline int kvm_vcpu_dabt_get_rd(struct kvm_vcpu *vcpu)
148{
149 return (kvm_vcpu_get_hsr(vcpu) & HSR_SRT_MASK) >> HSR_SRT_SHIFT;
150}
151
b37670b0
MZ
152static inline bool kvm_vcpu_dabt_iss1tw(struct kvm_vcpu *vcpu)
153{
154 return kvm_vcpu_get_hsr(vcpu) & HSR_DABT_S1PTW;
155}
156
57c841f1
MZ
157static inline bool kvm_vcpu_dabt_is_cm(struct kvm_vcpu *vcpu)
158{
159 return !!(kvm_vcpu_get_hsr(vcpu) & HSR_DABT_CM);
160}
161
a7123377
MZ
162/* Get Access Size from a data abort */
163static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)
164{
165 switch ((kvm_vcpu_get_hsr(vcpu) >> 22) & 0x3) {
166 case 0:
167 return 1;
168 case 1:
169 return 2;
170 case 2:
171 return 4;
172 default:
173 kvm_err("Hardware is weird: SAS 0b11 is reserved\n");
174 return -EFAULT;
175 }
176}
177
23b415d6
MZ
178/* This one is not specific to Data Abort */
179static inline bool kvm_vcpu_trap_il_is32bit(struct kvm_vcpu *vcpu)
180{
181 return kvm_vcpu_get_hsr(vcpu) & HSR_IL;
182}
183
4926d445
MZ
184static inline u8 kvm_vcpu_trap_get_class(struct kvm_vcpu *vcpu)
185{
186 return kvm_vcpu_get_hsr(vcpu) >> HSR_EC_SHIFT;
187}
188
52d1dba9
MZ
189static inline bool kvm_vcpu_trap_is_iabt(struct kvm_vcpu *vcpu)
190{
191 return kvm_vcpu_trap_get_class(vcpu) == HSR_EC_IABT;
192}
193
1cc287dd 194static inline u8 kvm_vcpu_trap_get_fault(struct kvm_vcpu *vcpu)
0496daa5
CD
195{
196 return kvm_vcpu_get_hsr(vcpu) & HSR_FSC;
197}
198
199static inline u8 kvm_vcpu_trap_get_fault_type(struct kvm_vcpu *vcpu)
1cc287dd
MZ
200{
201 return kvm_vcpu_get_hsr(vcpu) & HSR_FSC_TYPE;
202}
203
9e94c3e5
JM
204static inline bool kvm_vcpu_dabt_isextabt(struct kvm_vcpu *vcpu)
205{
206 switch (kvm_vcpu_trap_get_fault_type(vcpu)) {
207 case FSC_SEA:
208 case FSC_SEA_TTW0:
209 case FSC_SEA_TTW1:
210 case FSC_SEA_TTW2:
211 case FSC_SEA_TTW3:
212 case FSC_SECC:
213 case FSC_SECC_TTW0:
214 case FSC_SECC_TTW1:
215 case FSC_SECC_TTW2:
216 case FSC_SECC_TTW3:
217 return true;
218 default:
219 return false;
220 }
221}
222
c088f8f0
CD
223static inline u32 kvm_vcpu_hvc_get_imm(struct kvm_vcpu *vcpu)
224{
225 return kvm_vcpu_get_hsr(vcpu) & HSR_HVC_IMM_MASK;
226}
227
4429fc64 228static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu)
79c64880 229{
fb32a52a 230 return vcpu_cp15(vcpu, c0_MPIDR) & MPIDR_HWID_BITMASK;
79c64880
MZ
231}
232
ce94fe93
MZ
233static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
234{
235 *vcpu_cpsr(vcpu) |= PSR_E_BIT;
236}
237
6d89d2d9
MZ
238static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)
239{
240 return !!(*vcpu_cpsr(vcpu) & PSR_E_BIT);
241}
242
243static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,
244 unsigned long data,
245 unsigned int len)
246{
247 if (kvm_vcpu_is_be(vcpu)) {
248 switch (len) {
249 case 1:
250 return data & 0xff;
251 case 2:
252 return be16_to_cpu(data & 0xffff);
253 default:
254 return be32_to_cpu(data);
255 }
27f194fd
VK
256 } else {
257 switch (len) {
258 case 1:
259 return data & 0xff;
260 case 2:
261 return le16_to_cpu(data & 0xffff);
262 default:
263 return le32_to_cpu(data);
264 }
6d89d2d9 265 }
6d89d2d9
MZ
266}
267
268static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu,
269 unsigned long data,
270 unsigned int len)
271{
272 if (kvm_vcpu_is_be(vcpu)) {
273 switch (len) {
274 case 1:
275 return data & 0xff;
276 case 2:
277 return cpu_to_be16(data & 0xffff);
278 default:
279 return cpu_to_be32(data);
280 }
27f194fd
VK
281 } else {
282 switch (len) {
283 case 1:
284 return data & 0xff;
285 case 2:
286 return cpu_to_le16(data & 0xffff);
287 default:
288 return cpu_to_le32(data);
289 }
6d89d2d9 290 }
6d89d2d9
MZ
291}
292
749cf76c 293#endif /* __ARM_KVM_EMULATE_H__ */