[mirror_ubuntu-artful-kernel.git] / arch / arm64 / include / asm / futex.h

/*
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_FUTEX_H
#define __ASM_FUTEX_H

#ifdef __KERNEL__

#include <linux/futex.h>
#include <linux/uaccess.h>

#include <asm/errno.h>

#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg)		\
do {									\
	uaccess_enable();						\
	asm volatile(							\
"	prfm	pstl1strm, %2\n"					\
"1:	ldxr	%w1, %2\n"						\
	insn "\n"							\
"2:	stlxr	%w3, %w0, %2\n"						\
"	cbnz	%w3, 1b\n"						\
"	dmb	ish\n"							\
"3:\n"									\
"	.pushsection .fixup,\"ax\"\n"					\
"	.align	2\n"							\
"4:	mov	%w0, %w5\n"						\
"	b	3b\n"							\
"	.popsection\n"							\
	_ASM_EXTABLE(1b, 4b)						\
	_ASM_EXTABLE(2b, 4b)						\
	: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp)	\
	: "r" (oparg), "Ir" (-EFAULT)					\
	: "memory");							\
	uaccess_disable();						\
} while (0)

static inline int
arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
{
	int oldval = 0, ret, tmp;

	pagefault_disable();

	switch (op) {
	case FUTEX_OP_SET:
		__futex_atomic_op("mov	%w0, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_ADD:
		__futex_atomic_op("add	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_OR:
		__futex_atomic_op("orr	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_ANDN:
		__futex_atomic_op("and	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, ~oparg);
		break;
	case FUTEX_OP_XOR:
		__futex_atomic_op("eor	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	default:
		ret = -ENOSYS;
	}

	pagefault_enable();

	if (!ret)
		*oval = oldval;

	return ret;
}

static inline int
futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
			      u32 oldval, u32 newval)
{
	int ret = 0;
	u32 val, tmp;

	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
		return -EFAULT;

	uaccess_enable();
	asm volatile("// futex_atomic_cmpxchg_inatomic\n"
"	prfm	pstl1strm, %2\n"
"1:	ldxr	%w1, %2\n"
"	sub	%w3, %w1, %w4\n"
"	cbnz	%w3, 3f\n"
"2:	stlxr	%w3, %w5, %2\n"
"	cbnz	%w3, 1b\n"
"	dmb	ish\n"
"3:\n"
"	.pushsection .fixup,\"ax\"\n"
"4:	mov	%w0, %w6\n"
"	b	3b\n"
"	.popsection\n"
	_ASM_EXTABLE(1b, 4b)
	_ASM_EXTABLE(2b, 4b)
	: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
	: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
	: "memory");
	uaccess_disable();

	*uval = val;
	return ret;
}

#endif /* __KERNEL__ */
#endif /* __ASM_FUTEX_H */
Commit	Line	Data
6170a974 CM	1	/*
	2	* Copyright (C) 2012 ARM Ltd.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* You should have received a copy of the GNU General Public License
	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16	#ifndef __ASM_FUTEX_H
	17	#define __ASM_FUTEX_H
	18
	19	#ifdef __KERNEL__
	20
	21	#include <linux/futex.h>
	22	#include <linux/uaccess.h>
338d4f49	23
6170a974 CM	24	#include <asm/errno.h>
	25
	26	#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
bd38967d CM	27	do { \
bd38967d CM	28	uaccess_enable(); \
6170a974	29	asm volatile( \
0ea366f5	30	" prfm pstl1strm, %2\n" \
8e86f0b4	31	"1: ldxr %w1, %2\n" \
6170a974 CM	32	insn "\n" \
	33	"2: stlxr %w3, %w0, %2\n" \
	34	" cbnz %w3, 1b\n" \
8e86f0b4	35	" dmb ish\n" \
6170a974 CM	36	"3:\n" \
6170a974 CM	37	" .pushsection .fixup,\"ax\"\n" \
4da7a56c	38	" .align 2\n" \
6170a974 CM	39	"4: mov %w0, %w5\n" \
	40	" b 3b\n" \
	41	" .popsection\n" \
6c94f27a AB	42	_ASM_EXTABLE(1b, 4b) \
6c94f27a AB	43	_ASM_EXTABLE(2b, 4b) \
6170a974 CM	44	: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
6170a974 CM	45	: "r" (oparg), "Ir" (-EFAULT) \
bd38967d CM	46	: "memory"); \
	47	uaccess_disable(); \
	48	} while (0)
6170a974 CM	49
6170a974 CM	50	static inline int
5961958c	51	arch_futex_atomic_op_inuser(int op, int oparg, int oval, u32 __user uaddr)
6170a974	52	{
6170a974 CM	53	int oldval = 0, ret, tmp;
6170a974 CM	54
2f09b227	55	pagefault_disable();
6170a974 CM	56
	57	switch (op) {
	58	case FUTEX_OP_SET:
	59	__futex_atomic_op("mov %w0, %w4",
	60	ret, oldval, uaddr, tmp, oparg);
	61	break;
	62	case FUTEX_OP_ADD:
	63	__futex_atomic_op("add %w0, %w1, %w4",
	64	ret, oldval, uaddr, tmp, oparg);
	65	break;
	66	case FUTEX_OP_OR:
	67	__futex_atomic_op("orr %w0, %w1, %w4",
	68	ret, oldval, uaddr, tmp, oparg);
	69	break;
	70	case FUTEX_OP_ANDN:
	71	__futex_atomic_op("and %w0, %w1, %w4",
	72	ret, oldval, uaddr, tmp, ~oparg);
	73	break;
	74	case FUTEX_OP_XOR:
	75	__futex_atomic_op("eor %w0, %w1, %w4",
	76	ret, oldval, uaddr, tmp, oparg);
	77	break;
	78	default:
	79	ret = -ENOSYS;
	80	}
	81
2f09b227	82	pagefault_enable();
6170a974	83
5961958c JS	84	if (!ret)
	85	*oval = oldval;
	86
6170a974 CM	87	return ret;
	88	}
	89
	90	static inline int
	91	futex_atomic_cmpxchg_inatomic(u32 uval, u32 __user uaddr,
	92	u32 oldval, u32 newval)
	93	{
	94	int ret = 0;
	95	u32 val, tmp;
	96
	97	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
	98	return -EFAULT;
	99
bd38967d	100	uaccess_enable();
6170a974	101	asm volatile("// futex_atomic_cmpxchg_inatomic\n"
0ea366f5	102	" prfm pstl1strm, %2\n"
8e86f0b4	103	"1: ldxr %w1, %2\n"
6170a974 CM	104	" sub %w3, %w1, %w4\n"
	105	" cbnz %w3, 3f\n"
	106	"2: stlxr %w3, %w5, %2\n"
	107	" cbnz %w3, 1b\n"
8e86f0b4	108	" dmb ish\n"
6170a974 CM	109	"3:\n"
	110	" .pushsection .fixup,\"ax\"\n"
	111	"4: mov %w0, %w6\n"
	112	" b 3b\n"
	113	" .popsection\n"
6c94f27a AB	114	_ASM_EXTABLE(1b, 4b)
6c94f27a AB	115	_ASM_EXTABLE(2b, 4b)
6170a974 CM	116	: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
6170a974 CM	117	: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
95c41896	118	: "memory");
bd38967d	119	uaccess_disable();
6170a974 CM	120
	121	*uval = val;
	122	return ret;
	123	}
	124
	125	#endif /* __KERNEL__ */
	126	#endif /* __ASM_FUTEX_H */