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arm64: idmap: Use "awx" flags for .idmap.text .pushsection directives
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1#include <linux/errno.h>
2#include <linux/linkage.h>
3#include <asm/asm-offsets.h>
4#include <asm/assembler.h>
5
6 .text
7/*
8 * Implementation of MPIDR_EL1 hash algorithm through shifting
9 * and OR'ing.
10 *
11 * @dst: register containing hash result
12 * @rs0: register containing affinity level 0 bit shift
13 * @rs1: register containing affinity level 1 bit shift
14 * @rs2: register containing affinity level 2 bit shift
15 * @rs3: register containing affinity level 3 bit shift
16 * @mpidr: register containing MPIDR_EL1 value
17 * @mask: register containing MPIDR mask
18 *
19 * Pseudo C-code:
20 *
21 *u32 dst;
22 *
23 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
24 * u32 aff0, aff1, aff2, aff3;
25 * u64 mpidr_masked = mpidr & mask;
26 * aff0 = mpidr_masked & 0xff;
27 * aff1 = mpidr_masked & 0xff00;
28 * aff2 = mpidr_masked & 0xff0000;
29 * aff2 = mpidr_masked & 0xff00000000;
30 * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
31 *}
32 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
33 * Output register: dst
34 * Note: input and output registers must be disjoint register sets
35 (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
36 */
37 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
38 and \mpidr, \mpidr, \mask // mask out MPIDR bits
39 and \dst, \mpidr, #0xff // mask=aff0
40 lsr \dst ,\dst, \rs0 // dst=aff0>>rs0
41 and \mask, \mpidr, #0xff00 // mask = aff1
42 lsr \mask ,\mask, \rs1
43 orr \dst, \dst, \mask // dst|=(aff1>>rs1)
44 and \mask, \mpidr, #0xff0000 // mask = aff2
45 lsr \mask ,\mask, \rs2
46 orr \dst, \dst, \mask // dst|=(aff2>>rs2)
47 and \mask, \mpidr, #0xff00000000 // mask = aff3
48 lsr \mask ,\mask, \rs3
49 orr \dst, \dst, \mask // dst|=(aff3>>rs3)
50 .endm
51/*
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52 * Save CPU state in the provided sleep_stack_data area, and publish its
53 * location for cpu_resume()'s use in sleep_save_stash.
95322526 54 *
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55 * cpu_resume() will restore this saved state, and return. Because the
56 * link-register is saved and restored, it will appear to return from this
57 * function. So that the caller can tell the suspend/resume paths apart,
58 * __cpu_suspend_enter() will always return a non-zero value, whereas the
59 * path through cpu_resume() will return 0.
60 *
61 * x0 = struct sleep_stack_data area
95322526 62 */
714f5992 63ENTRY(__cpu_suspend_enter)
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64 stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
65 stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
66 stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
67 stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
68 stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
69 stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
70
71 /* save the sp in cpu_suspend_ctx */
95322526 72 mov x2, sp
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73 str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
74
75 /* find the mpidr_hash */
b5fe2429 76 ldr_l x1, sleep_save_stash
95322526 77 mrs x7, mpidr_el1
b5fe2429 78 adr_l x9, mpidr_hash
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79 ldr x10, [x9, #MPIDR_HASH_MASK]
80 /*
81 * Following code relies on the struct mpidr_hash
82 * members size.
83 */
84 ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
85 ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
86 compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
714f5992 87 add x1, x1, x8, lsl #3
adc9b2df 88
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89 str x0, [x1]
90 add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
adc9b2df 91 stp x29, lr, [sp, #-16]!
cabe1c81 92 bl cpu_do_suspend
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93 ldp x29, lr, [sp], #16
94 mov x0, #1
95322526 95 ret
714f5992 96ENDPROC(__cpu_suspend_enter)
95322526 97
6468c83b 98 .pushsection ".idmap.text", "awx"
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99ENTRY(cpu_resume)
100 bl el2_setup // if in EL2 drop to EL1 cleanly
b5fe2429 101 bl __cpu_setup
cabe1c81 102 /* enable the MMU early - so we can access sleep_save_stash by va */
9dcf7914 103 bl __enable_mmu
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104 ldr x8, =_cpu_resume
105 br x8
9dcf7914 106ENDPROC(cpu_resume)
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107 .ltorg
108 .popsection
109
dc002475 110ENTRY(_cpu_resume)
95322526 111 mrs x1, mpidr_el1
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112 adr_l x8, mpidr_hash // x8 = struct mpidr_hash virt address
113
114 /* retrieve mpidr_hash members to compute the hash */
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115 ldr x2, [x8, #MPIDR_HASH_MASK]
116 ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
117 ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
118 compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
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119
120 /* x7 contains hash index, let's use it to grab context pointer */
cabe1c81 121 ldr_l x0, sleep_save_stash
95322526 122 ldr x0, [x0, x7, lsl #3]
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123 add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
124 add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
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125 /* load sp from context */
126 ldr x2, [x0, #CPU_CTX_SP]
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127 mov sp, x2
128 /*
cabe1c81 129 * cpu_do_resume expects x0 to contain context address pointer
95322526 130 */
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131 bl cpu_do_resume
132
133#ifdef CONFIG_KASAN
134 mov x0, sp
9f7d416c 135 bl kasan_unpoison_task_stack_below
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136#endif
137
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138 ldp x19, x20, [x29, #16]
139 ldp x21, x22, [x29, #32]
140 ldp x23, x24, [x29, #48]
141 ldp x25, x26, [x29, #64]
142 ldp x27, x28, [x29, #80]
143 ldp x29, lr, [x29]
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144 mov x0, #0
145 ret
146ENDPROC(_cpu_resume)