[mirror_ubuntu-artful-kernel.git] / arch / ppc64 / kernel / pSeries_setup.c

/*
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Modified by PPC64 Team, IBM Corp
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/*
 * bootup setup stuff..
 */

#undef DEBUG

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/console.h>
#include <linux/pci.h>
#include <linux/version.h>
#include <linux/adb.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>

#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/time.h>
#include <asm/nvram.h>
#include <asm/plpar_wrappers.h>
#include <asm/xics.h>
#include <asm/cputable.h>

#include "i8259.h"
#include "mpic.h"
#include "pci.h"

#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif

extern void find_udbg_vterm(void);
extern void system_reset_fwnmi(void);	/* from head.S */
extern void machine_check_fwnmi(void);	/* from head.S */
extern void generic_find_legacy_serial_ports(u64 *physport,
		unsigned int *default_speed);

int fwnmi_active;  /* TRUE if an FWNMI handler is present */

extern void pSeries_system_reset_exception(struct pt_regs *regs);
extern int pSeries_machine_check_exception(struct pt_regs *regs);

static volatile void __iomem * chrp_int_ack_special;
struct mpic *pSeries_mpic;

void pSeries_get_cpuinfo(struct seq_file *m)
{
	struct device_node *root;
	const char *model = "";

	root = of_find_node_by_path("/");
	if (root)
		model = get_property(root, "model", NULL);
	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	of_node_put(root);
}

/* Initialize firmware assisted non-maskable interrupts if
 * the firmware supports this feature.
 *
 */
static void __init fwnmi_init(void)
{
	int ret;
	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
		return;
	ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
			__pa((unsigned long)system_reset_fwnmi),
			__pa((unsigned long)machine_check_fwnmi));
	if (ret == 0)
		fwnmi_active = 1;
}

static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
{
	if (chrp_int_ack_special)
		return readb(chrp_int_ack_special);
	else
		return i8259_irq(smp_processor_id());
}

static void __init pSeries_init_mpic(void)
{
        unsigned int *addrp;
	struct device_node *np;
        int i;

	/* All ISUs are setup, complete initialization */
	mpic_init(pSeries_mpic);

	/* Check what kind of cascade ACK we have */
        if (!(np = of_find_node_by_name(NULL, "pci"))
            || !(addrp = (unsigned int *)
                 get_property(np, "8259-interrupt-acknowledge", NULL)))
                printk(KERN_ERR "Cannot find pci to get ack address\n");
        else
		chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
	of_node_put(np);

	/* Setup the legacy interrupts & controller */
        for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
                irq_desc[i].handler = &i8259_pic;
	i8259_init(0);

	/* Hook cascade to mpic */
	mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
}

static void __init pSeries_setup_mpic(void)
{
	unsigned int *opprop;
	unsigned long openpic_addr = 0;
        unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
        struct device_node *root;
	int irq_count;

	/* Find the Open PIC if present */
	root = of_find_node_by_path("/");
	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
	if (opprop != 0) {
		int n = prom_n_addr_cells(root);

		for (openpic_addr = 0; n > 0; --n)
			openpic_addr = (openpic_addr << 32) + *opprop++;
		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
	}
	of_node_put(root);

	BUG_ON(openpic_addr == 0);

	/* Get the sense values from OF */
	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
	
	/* Setup the openpic driver */
	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
				  16, 16, irq_count, /* isu size, irq offset, irq count */ 
				  NR_IRQS - 4, /* ipi offset */
				  senses, irq_count, /* sense & sense size */
				  " MPIC     ");
}

static void __init pSeries_setup_arch(void)
{
	/* Fixup ppc_md depending on the type of interrupt controller */
	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
		ppc_md.init_IRQ       = pSeries_init_mpic;
		ppc_md.get_irq        = mpic_get_irq;
	 	ppc_md.cpu_irq_down   = mpic_teardown_this_cpu;
		/* Allocate the mpic now, so that find_and_init_phbs() can
		 * fill the ISUs */
		pSeries_setup_mpic();
	} else {
		ppc_md.init_IRQ       = xics_init_IRQ;
		ppc_md.get_irq        = xics_get_irq;
		ppc_md.cpu_irq_down   = xics_teardown_cpu;
	}

#ifdef CONFIG_SMP
	smp_init_pSeries();
#endif
	/* openpic global configuration register (64-bit format). */
	/* openpic Interrupt Source Unit pointer (64-bit format). */
	/* python0 facility area (mmio) (64-bit format) REAL address. */

	/* init to some ~sane value until calibrate_delay() runs */
	loops_per_jiffy = 50000000;

	if (ROOT_DEV == 0) {
		printk("No ramdisk, default root is /dev/sda2\n");
		ROOT_DEV = Root_SDA2;
	}

	fwnmi_init();

	/* Find and initialize PCI host bridges */
	init_pci_config_tokens();
	eeh_init();
	find_and_init_phbs();

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#endif

	pSeries_nvram_init();

	if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
		vpa_init(boot_cpuid);
}

static int __init pSeries_init_panel(void)
{
	/* Manually leave the kernel version on the panel. */
	ppc_md.progress("Linux ppc64\n", 0);
	ppc_md.progress(UTS_RELEASE, 0);

	return 0;
}
arch_initcall(pSeries_init_panel);


/* Build up the firmware_features bitmask field
 * using contents of device-tree/ibm,hypertas-functions.
 * Ultimately this functionality may be moved into prom.c prom_init().
 */
void __init fw_feature_init(void)
{
	struct device_node * dn;
	char * hypertas;
	unsigned int len;

	DBG(" -> fw_feature_init()\n");

	cur_cpu_spec->firmware_features = 0;
	dn = of_find_node_by_path("/rtas");
	if (dn == NULL) {
		printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
		goto no_rtas;
	}

	hypertas = get_property(dn, "ibm,hypertas-functions", &len);
	if (hypertas) {
		while (len > 0){
			int i, hypertas_len;
			/* check value against table of strings */
			for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
				if ((firmware_features_table[i].name) &&
				    (strcmp(firmware_features_table[i].name,hypertas))==0) {
					/* we have a match */
					cur_cpu_spec->firmware_features |= 
						(firmware_features_table[i].val);
					break;
				} 
			}
			hypertas_len = strlen(hypertas);
			len -= hypertas_len +1;
			hypertas+= hypertas_len +1;
		}
	}

	of_node_put(dn);
 no_rtas:
	printk(KERN_INFO "firmware_features = 0x%lx\n", 
	       cur_cpu_spec->firmware_features);

	DBG(" <- fw_feature_init()\n");
}


static  void __init pSeries_discover_pic(void)
{
	struct device_node *np;
	char *typep;

	/*
	 * Setup interrupt mapping options that are needed for finish_device_tree
	 * to properly parse the OF interrupt tree & do the virtual irq mapping
	 */
	__irq_offset_value = NUM_ISA_INTERRUPTS;
	ppc64_interrupt_controller = IC_INVALID;
	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
		typep = (char *)get_property(np, "compatible", NULL);
		if (strstr(typep, "open-pic"))
			ppc64_interrupt_controller = IC_OPEN_PIC;
		else if (strstr(typep, "ppc-xicp"))
			ppc64_interrupt_controller = IC_PPC_XIC;
		else
			printk("pSeries_discover_pic: failed to recognize"
			       " interrupt-controller\n");
		break;
	}
}

static void pSeries_mach_cpu_die(void)
{
	local_irq_disable();
	idle_task_exit();
	/* Some hardware requires clearing the CPPR, while other hardware does not
	 * it is safe either way
	 */
	pSeriesLP_cppr_info(0, 0);
	rtas_stop_self();
	/* Should never get here... */
	BUG();
	for(;;);
}


/*
 * Early initialization.  Relocation is on but do not reference unbolted pages
 */
static void __init pSeries_init_early(void)
{
	void *comport;
	int iommu_off = 0;
	unsigned int default_speed;
	u64 physport;

	DBG(" -> pSeries_init_early()\n");

	fw_feature_init();
	
	if (systemcfg->platform & PLATFORM_LPAR)
		hpte_init_lpar();
	else {
		hpte_init_native();
		iommu_off = (of_chosen &&
			     get_property(of_chosen, "linux,iommu-off", NULL));
	}

	generic_find_legacy_serial_ports(&physport, &default_speed);

	if (systemcfg->platform & PLATFORM_LPAR)
		find_udbg_vterm();
	else if (physport) {
		/* Map the uart for udbg. */
		comport = (void *)ioremap(physport, 16);
		udbg_init_uart(comport, default_speed);

		ppc_md.udbg_putc = udbg_putc;
		ppc_md.udbg_getc = udbg_getc;
		ppc_md.udbg_getc_poll = udbg_getc_poll;
		DBG("Hello World !\n");
	}


	iommu_init_early_pSeries();

	pSeries_discover_pic();

	DBG(" <- pSeries_init_early()\n");
}


static int pSeries_check_legacy_ioport(unsigned int baseport)
{
	struct device_node *np;

#define I8042_DATA_REG	0x60
#define FDC_BASE	0x3f0


	switch(baseport) {
	case I8042_DATA_REG:
		np = of_find_node_by_type(NULL, "8042");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	case FDC_BASE:
		np = of_find_node_by_type(NULL, "fdc");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	}
	return 0;
}

/*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
extern struct machdep_calls pSeries_md;

static int __init pSeries_probe(int platform)
{
	if (platform != PLATFORM_PSERIES &&
	    platform != PLATFORM_PSERIES_LPAR)
		return 0;

	/* if we have some ppc_md fixups for LPAR to do, do
	 * it here ...
	 */

	return 1;
}

DECLARE_PER_CPU(unsigned long, smt_snooze_delay);

int dedicated_idle(void)
{
	long oldval;
	struct paca_struct *lpaca = get_paca(), *ppaca;
	unsigned long start_snooze;
	unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
	unsigned int cpu = smp_processor_id();

	ppaca = &paca[cpu ^ 1];

	while (1) {
		/*
		 * Indicate to the HV that we are idle. Now would be
		 * a good time to find other work to dispatch.
		 */
		lpaca->lppaca.idle = 1;

		oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
		if (!oldval) {
			set_thread_flag(TIF_POLLING_NRFLAG);
			start_snooze = __get_tb() +
				*smt_snooze_delay * tb_ticks_per_usec;
			while (!need_resched() && !cpu_is_offline(cpu)) {
				/*
				 * Go into low thread priority and possibly
				 * low power mode.
				 */
				HMT_low();
				HMT_very_low();

				if (*smt_snooze_delay == 0 ||
				    __get_tb() < start_snooze)
					continue;

				HMT_medium();

				if (!(ppaca->lppaca.idle)) {
					local_irq_disable();

					/*
					 * We are about to sleep the thread
					 * and so wont be polling any
					 * more.
					 */
					clear_thread_flag(TIF_POLLING_NRFLAG);

					/*
					 * SMT dynamic mode. Cede will result
					 * in this thread going dormant, if the
					 * partner thread is still doing work.
					 * Thread wakes up if partner goes idle,
					 * an interrupt is presented, or a prod
					 * occurs.  Returning from the cede
					 * enables external interrupts.
					 */
					if (!need_resched())
						cede_processor();
					else
						local_irq_enable();
				} else {
					/*
					 * Give the HV an opportunity at the
					 * processor, since we are not doing
					 * any work.
					 */
					poll_pending();
				}
			}

			clear_thread_flag(TIF_POLLING_NRFLAG);
		} else {
			set_need_resched();
		}

		HMT_medium();
		lpaca->lppaca.idle = 0;
		schedule();
		if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
			cpu_die();
	}
	return 0;
}

static int shared_idle(void)
{
	struct paca_struct *lpaca = get_paca();
	unsigned int cpu = smp_processor_id();

	while (1) {
		/*
		 * Indicate to the HV that we are idle. Now would be
		 * a good time to find other work to dispatch.
		 */
		lpaca->lppaca.idle = 1;

		while (!need_resched() && !cpu_is_offline(cpu)) {
			local_irq_disable();

			/*
			 * Yield the processor to the hypervisor.  We return if
			 * an external interrupt occurs (which are driven prior
			 * to returning here) or if a prod occurs from another
			 * processor. When returning here, external interrupts
			 * are enabled.
			 *
			 * Check need_resched() again with interrupts disabled
			 * to avoid a race.
			 */
			if (!need_resched())
				cede_processor();
			else
				local_irq_enable();
		}

		HMT_medium();
		lpaca->lppaca.idle = 0;
		schedule();
		if (cpu_is_offline(smp_processor_id()) &&
		    system_state == SYSTEM_RUNNING)
			cpu_die();
	}

	return 0;
}

struct machdep_calls __initdata pSeries_md = {
	.probe			= pSeries_probe,
	.setup_arch		= pSeries_setup_arch,
	.init_early		= pSeries_init_early,
	.get_cpuinfo		= pSeries_get_cpuinfo,
	.log_error		= pSeries_log_error,
	.pcibios_fixup		= pSeries_final_fixup,
	.irq_bus_setup		= pSeries_irq_bus_setup,
	.restart		= rtas_restart,
	.power_off		= rtas_power_off,
	.halt			= rtas_halt,
	.panic			= rtas_os_term,
	.cpu_die		= pSeries_mach_cpu_die,
	.get_boot_time		= rtas_get_boot_time,
	.get_rtc_time		= rtas_get_rtc_time,
	.set_rtc_time		= rtas_set_rtc_time,
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= rtas_progress,
	.check_legacy_ioport	= pSeries_check_legacy_ioport,
	.system_reset_exception = pSeries_system_reset_exception,
	.machine_check_exception = pSeries_machine_check_exception,
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/ppc/kernel/setup.c
	3	*
	4	* Copyright (C) 1995 Linus Torvalds
	5	* Adapted from 'alpha' version by Gary Thomas
	6	* Modified by Cort Dougan (cort@cs.nmt.edu)
	7	* Modified by PPC64 Team, IBM Corp
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	/*
	16	* bootup setup stuff..
	17	*/
	18
	19	#undef DEBUG
	20
	21	#include <linux/config.h>
	22	#include <linux/errno.h>
	23	#include <linux/sched.h>
	24	#include <linux/kernel.h>
	25	#include <linux/mm.h>
	26	#include <linux/stddef.h>
	27	#include <linux/unistd.h>
	28	#include <linux/slab.h>
	29	#include <linux/user.h>
	30	#include <linux/a.out.h>
	31	#include <linux/tty.h>
	32	#include <linux/major.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/reboot.h>
	35	#include <linux/init.h>
	36	#include <linux/ioport.h>
	37	#include <linux/console.h>
	38	#include <linux/pci.h>
	39	#include <linux/version.h>
	40	#include <linux/adb.h>
	41	#include <linux/module.h>
	42	#include <linux/delay.h>
	43	#include <linux/irq.h>
	44	#include <linux/seq_file.h>
	45	#include <linux/root_dev.h>
	46
	47	#include <asm/mmu.h>
	48	#include <asm/processor.h>
	49	#include <asm/io.h>
	50	#include <asm/pgtable.h>
	51	#include <asm/prom.h>
	52	#include <asm/rtas.h>
	53	#include <asm/pci-bridge.h>
	54	#include <asm/iommu.h>
	55	#include <asm/dma.h>
	56	#include <asm/machdep.h>
	57	#include <asm/irq.h>
	58	#include <asm/time.h>
	59	#include <asm/nvram.h>
	60	#include <asm/plpar_wrappers.h>
	61	#include <asm/xics.h>
	62	#include <asm/cputable.h>
	63
	64	#include "i8259.h"
65	#include "mpic.h"
66	#include "pci.h"
67
68	#ifdef DEBUG
69	#define DBG(fmt...) udbg_printf(fmt)
70	#else
71	#define DBG(fmt...)
72	#endif
73
1da177e4 LT	74	extern void find_udbg_vterm(void);
	75	extern void system_reset_fwnmi(void); /* from head.S */
	76	extern void machine_check_fwnmi(void); /* from head.S */
	77	extern void generic_find_legacy_serial_ports(u64 *physport,
	78	unsigned int *default_speed);
	79
	80	int fwnmi_active; /* TRUE if an FWNMI handler is present */
	81
1da177e4 LT	82	extern void pSeries_system_reset_exception(struct pt_regs *regs);
	83	extern int pSeries_machine_check_exception(struct pt_regs *regs);
	84
	85	static volatile void __iomem * chrp_int_ack_special;
	86	struct mpic *pSeries_mpic;
	87
	88	void pSeries_get_cpuinfo(struct seq_file *m)
	89	{
	90	struct device_node *root;
	91	const char *model = "";
	92
	93	root = of_find_node_by_path("/");
	94	if (root)
	95	model = get_property(root, "model", NULL);
	96	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	97	of_node_put(root);
	98	}
	99
	100	/* Initialize firmware assisted non-maskable interrupts if
	101	* the firmware supports this feature.
	102	*
	103	*/
	104	static void __init fwnmi_init(void)
	105	{
	106	int ret;
	107	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	108	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
	109	return;
	110	ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
	111	__pa((unsigned long)system_reset_fwnmi),
	112	__pa((unsigned long)machine_check_fwnmi));
	113	if (ret == 0)
	114	fwnmi_active = 1;
	115	}
	116
	117	static int pSeries_irq_cascade(struct pt_regs regs, void data)
	118	{
	119	if (chrp_int_ack_special)
	120	return readb(chrp_int_ack_special);
	121	else
	122	return i8259_irq(smp_processor_id());
	123	}
	124
	125	static void __init pSeries_init_mpic(void)
	126	{
	127	unsigned int *addrp;
	128	struct device_node *np;
	129	int i;
	130
	131	/* All ISUs are setup, complete initialization */
	132	mpic_init(pSeries_mpic);
	133
	134	/* Check what kind of cascade ACK we have */
	135	if (!(np = of_find_node_by_name(NULL, "pci"))
	136	\|\| !(addrp = (unsigned int *)
	137	get_property(np, "8259-interrupt-acknowledge", NULL)))
	138	printk(KERN_ERR "Cannot find pci to get ack address\n");
	139	else
	140	chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
	141	of_node_put(np);
	142
	143	/* Setup the legacy interrupts & controller */
	144	for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
	145	irq_desc[i].handler = &i8259_pic;
146	i8259_init(0);
147
148	/* Hook cascade to mpic */
149	mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
150	}
151
152	static void __init pSeries_setup_mpic(void)
153	{
154	unsigned int *opprop;
155	unsigned long openpic_addr = 0;
156	unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
157	struct device_node *root;
158	int irq_count;
159
160	/* Find the Open PIC if present */
161	root = of_find_node_by_path("/");
162	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
163	if (opprop != 0) {
164	int n = prom_n_addr_cells(root);
165
166	for (openpic_addr = 0; n > 0; --n)
167	openpic_addr = (openpic_addr << 32) + *opprop++;
168	printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
169	}
170	of_node_put(root);
171
172	BUG_ON(openpic_addr == 0);
173
174	/* Get the sense values from OF */
175	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
176
177	/* Setup the openpic driver */
178	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
179	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
180	16, 16, irq_count, /* isu size, irq offset, irq count */
181	NR_IRQS - 4, /* ipi offset */
182	senses, irq_count, /* sense & sense size */
183	" MPIC ");
184	}
185
186	static void __init pSeries_setup_arch(void)
187	{
188	/* Fixup ppc_md depending on the type of interrupt controller */
189	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574	190	ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4	191	ppc_md.get_irq = mpic_get_irq;
fce0d574	192	ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
1da177e4 LT	193	/* Allocate the mpic now, so that find_and_init_phbs() can
	194	* fill the ISUs */
	195	pSeries_setup_mpic();
	196	} else {
	197	ppc_md.init_IRQ = xics_init_IRQ;
	198	ppc_md.get_irq = xics_get_irq;
fce0d574	199	ppc_md.cpu_irq_down = xics_teardown_cpu;
1da177e4 LT	200	}
	201
	202	#ifdef CONFIG_SMP
	203	smp_init_pSeries();
	204	#endif
	205	/* openpic global configuration register (64-bit format). */
	206	/* openpic Interrupt Source Unit pointer (64-bit format). */
	207	/* python0 facility area (mmio) (64-bit format) REAL address. */
	208
	209	/* init to some ~sane value until calibrate_delay() runs */
	210	loops_per_jiffy = 50000000;
	211
	212	if (ROOT_DEV == 0) {
	213	printk("No ramdisk, default root is /dev/sda2\n");
	214	ROOT_DEV = Root_SDA2;
	215	}
	216
	217	fwnmi_init();
	218
	219	/* Find and initialize PCI host bridges */
	220	init_pci_config_tokens();
	221	eeh_init();
	222	find_and_init_phbs();
	223
	224	#ifdef CONFIG_DUMMY_CONSOLE
	225	conswitchp = &dummy_con;
	226	#endif
	227
	228	pSeries_nvram_init();
	229
	230	if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
	231	vpa_init(boot_cpuid);
	232	}
	233
	234	static int __init pSeries_init_panel(void)
	235	{
	236	/* Manually leave the kernel version on the panel. */
	237	ppc_md.progress("Linux ppc64\n", 0);
	238	ppc_md.progress(UTS_RELEASE, 0);
	239
	240	return 0;
	241	}
	242	arch_initcall(pSeries_init_panel);
	243
	244
	245	/* Build up the firmware_features bitmask field
	246	* using contents of device-tree/ibm,hypertas-functions.
	247	* Ultimately this functionality may be moved into prom.c prom_init().
	248	*/
	249	void __init fw_feature_init(void)
	250	{
	251	struct device_node * dn;
	252	char * hypertas;
	253	unsigned int len;
	254
	255	DBG(" -> fw_feature_init()\n");
	256
	257	cur_cpu_spec->firmware_features = 0;
	258	dn = of_find_node_by_path("/rtas");
	259	if (dn == NULL) {
	260	printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
	261	goto no_rtas;
	262	}
	263
264	hypertas = get_property(dn, "ibm,hypertas-functions", &len);
265	if (hypertas) {
266	while (len > 0){
267	int i, hypertas_len;
268	/* check value against table of strings */
269	for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
270	if ((firmware_features_table[i].name) &&
271	(strcmp(firmware_features_table[i].name,hypertas))==0) {
272	/* we have a match */
273	cur_cpu_spec->firmware_features \|=
274	(firmware_features_table[i].val);
275	break;
276	}
277	}
278	hypertas_len = strlen(hypertas);
279	len -= hypertas_len +1;
280	hypertas+= hypertas_len +1;
281	}
282	}
283
284	of_node_put(dn);
285	no_rtas:
286	printk(KERN_INFO "firmware_features = 0x%lx\n",
287	cur_cpu_spec->firmware_features);
288
289	DBG(" <- fw_feature_init()\n");
290	}
291
292
293	static void __init pSeries_discover_pic(void)
294	{
295	struct device_node *np;
296	char *typep;
297
298	/*
299	* Setup interrupt mapping options that are needed for finish_device_tree
300	* to properly parse the OF interrupt tree & do the virtual irq mapping
301	*/
302	__irq_offset_value = NUM_ISA_INTERRUPTS;
303	ppc64_interrupt_controller = IC_INVALID;
304	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
305	typep = (char *)get_property(np, "compatible", NULL);
306	if (strstr(typep, "open-pic"))
307	ppc64_interrupt_controller = IC_OPEN_PIC;
308	else if (strstr(typep, "ppc-xicp"))
309	ppc64_interrupt_controller = IC_PPC_XIC;
310	else
311	printk("pSeries_discover_pic: failed to recognize"
312	" interrupt-controller\n");
313	break;
314	}
315	}
316
317	static void pSeries_mach_cpu_die(void)
318	{
319	local_irq_disable();
320	idle_task_exit();
321	/* Some hardware requires clearing the CPPR, while other hardware does not
322	* it is safe either way
323	*/
324	pSeriesLP_cppr_info(0, 0);
325	rtas_stop_self();
326	/* Should never get here... */
327	BUG();
328	for(;;);
329	}
330
331
332	/*
333	* Early initialization. Relocation is on but do not reference unbolted pages
334	*/
335	static void __init pSeries_init_early(void)
336	{
337	void *comport;
338	int iommu_off = 0;
339	unsigned int default_speed;
340	u64 physport;
341
342	DBG(" -> pSeries_init_early()\n");
343
344	fw_feature_init();
345
346	if (systemcfg->platform & PLATFORM_LPAR)
347	hpte_init_lpar();
348	else {
349	hpte_init_native();
350	iommu_off = (of_chosen &&
351	get_property(of_chosen, "linux,iommu-off", NULL));
352	}
353
354	generic_find_legacy_serial_ports(&physport, &default_speed);
355
356	if (systemcfg->platform & PLATFORM_LPAR)
357	find_udbg_vterm();
358	else if (physport) {
359	/* Map the uart for udbg. */
dfbacdc1	360	comport = (void *)ioremap(physport, 16);
1da177e4 LT	361	udbg_init_uart(comport, default_speed);
	362
	363	ppc_md.udbg_putc = udbg_putc;
	364	ppc_md.udbg_getc = udbg_getc;
	365	ppc_md.udbg_getc_poll = udbg_getc_poll;
	366	DBG("Hello World !\n");
	367	}
	368
	369
	370	iommu_init_early_pSeries();
	371
	372	pSeries_discover_pic();
	373
	374	DBG(" <- pSeries_init_early()\n");
	375	}
	376
	377
1da177e4 LT	378	static int pSeries_check_legacy_ioport(unsigned int baseport)
	379	{
	380	struct device_node *np;
	381
	382	#define I8042_DATA_REG 0x60
	383	#define FDC_BASE 0x3f0
	384
	385
	386	switch(baseport) {
	387	case I8042_DATA_REG:
	388	np = of_find_node_by_type(NULL, "8042");
	389	if (np == NULL)
	390	return -ENODEV;
	391	of_node_put(np);
	392	break;
	393	case FDC_BASE:
	394	np = of_find_node_by_type(NULL, "fdc");
	395	if (np == NULL)
	396	return -ENODEV;
	397	of_node_put(np);
	398	break;
	399	}
	400	return 0;
	401	}
	402
	403	/*
	404	* Called very early, MMU is off, device-tree isn't unflattened
	405	*/
	406	extern struct machdep_calls pSeries_md;
	407
	408	static int __init pSeries_probe(int platform)
	409	{
	410	if (platform != PLATFORM_PSERIES &&
	411	platform != PLATFORM_PSERIES_LPAR)
	412	return 0;
	413
	414	/* if we have some ppc_md fixups for LPAR to do, do
	415	* it here ...
	416	*/
	417
	418	return 1;
	419	}
	420
c66d5dd6 ME	421	DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
	422
	423	int dedicated_idle(void)
	424	{
	425	long oldval;
	426	struct paca_struct lpaca = get_paca(), ppaca;
	427	unsigned long start_snooze;
	428	unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
	429	unsigned int cpu = smp_processor_id();
	430
	431	ppaca = &paca[cpu ^ 1];
	432
	433	while (1) {
	434	/*
	435	* Indicate to the HV that we are idle. Now would be
	436	* a good time to find other work to dispatch.
	437	*/
	438	lpaca->lppaca.idle = 1;
	439
	440	oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
	441	if (!oldval) {
	442	set_thread_flag(TIF_POLLING_NRFLAG);
	443	start_snooze = __get_tb() +
	444	smt_snooze_delay tb_ticks_per_usec;
	445	while (!need_resched() && !cpu_is_offline(cpu)) {
	446	/*
	447	* Go into low thread priority and possibly
	448	* low power mode.
	449	*/
	450	HMT_low();
	451	HMT_very_low();
	452
	453	if (*smt_snooze_delay == 0 \|\|
	454	__get_tb() < start_snooze)
	455	continue;
	456
	457	HMT_medium();
	458
	459	if (!(ppaca->lppaca.idle)) {
	460	local_irq_disable();
	461
	462	/*
	463	* We are about to sleep the thread
	464	* and so wont be polling any
	465	* more.
	466	*/
	467	clear_thread_flag(TIF_POLLING_NRFLAG);
	468
	469	/*
	470	* SMT dynamic mode. Cede will result
	471	* in this thread going dormant, if the
	472	* partner thread is still doing work.
	473	* Thread wakes up if partner goes idle,
	474	* an interrupt is presented, or a prod
	475	* occurs. Returning from the cede
	476	* enables external interrupts.
	477	*/
	478	if (!need_resched())
	479	cede_processor();
	480	else
	481	local_irq_enable();
	482	} else {
	483	/*
	484	* Give the HV an opportunity at the
485	* processor, since we are not doing
486	* any work.
487	*/
488	poll_pending();
489	}
490	}
491
492	clear_thread_flag(TIF_POLLING_NRFLAG);
493	} else {
494	set_need_resched();
495	}
496
497	HMT_medium();
498	lpaca->lppaca.idle = 0;
499	schedule();
500	if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
501	cpu_die();
502	}
503	return 0;
504	}
505
506	static int shared_idle(void)
507	{
508	struct paca_struct *lpaca = get_paca();
509	unsigned int cpu = smp_processor_id();
510
511	while (1) {
512	/*
513	* Indicate to the HV that we are idle. Now would be
514	* a good time to find other work to dispatch.
515	*/
516	lpaca->lppaca.idle = 1;
517
518	while (!need_resched() && !cpu_is_offline(cpu)) {
519	local_irq_disable();
520
521	/*
522	* Yield the processor to the hypervisor. We return if
523	* an external interrupt occurs (which are driven prior
524	* to returning here) or if a prod occurs from another
525	* processor. When returning here, external interrupts
526	* are enabled.
527	*
528	* Check need_resched() again with interrupts disabled
529	* to avoid a race.
530	*/
531	if (!need_resched())
532	cede_processor();
533	else
534	local_irq_enable();
535	}
536
537	HMT_medium();
538	lpaca->lppaca.idle = 0;
539	schedule();
540	if (cpu_is_offline(smp_processor_id()) &&
541	system_state == SYSTEM_RUNNING)
542	cpu_die();
543	}
544
545	return 0;
546	}
547
1da177e4 LT	548	struct machdep_calls __initdata pSeries_md = {
	549	.probe = pSeries_probe,
	550	.setup_arch = pSeries_setup_arch,
	551	.init_early = pSeries_init_early,
	552	.get_cpuinfo = pSeries_get_cpuinfo,
	553	.log_error = pSeries_log_error,
	554	.pcibios_fixup = pSeries_final_fixup,
dad32bbf	555	.irq_bus_setup = pSeries_irq_bus_setup,
1da177e4 LT	556	.restart = rtas_restart,
	557	.power_off = rtas_power_off,
	558	.halt = rtas_halt,
	559	.panic = rtas_os_term,
	560	.cpu_die = pSeries_mach_cpu_die,
773bf9c4 AB	561	.get_boot_time = rtas_get_boot_time,
	562	.get_rtc_time = rtas_get_rtc_time,
	563	.set_rtc_time = rtas_set_rtc_time,
10f7e7c1	564	.calibrate_decr = generic_calibrate_decr,
6566c6f1	565	.progress = rtas_progress,
1da177e4 LT	566	.check_legacy_ioport = pSeries_check_legacy_ioport,
	567	.system_reset_exception = pSeries_system_reset_exception,
	568	.machine_check_exception = pSeries_machine_check_exception,
	569	};