]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/x86/kernel/process.c
x86: cacheline_align tss_struct
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / process.c
CommitLineData
61c4628b
SS
1#include <linux/errno.h>
2#include <linux/kernel.h>
3#include <linux/mm.h>
4#include <linux/smp.h>
5#include <linux/slab.h>
6#include <linux/sched.h>
7f424a8b
PZ
7#include <linux/module.h>
8#include <linux/pm.h>
61c4628b 9
aa283f49 10struct kmem_cache *task_xstate_cachep;
61c4628b
SS
11
12int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
13{
14 *dst = *src;
aa283f49
SS
15 if (src->thread.xstate) {
16 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
17 GFP_KERNEL);
18 if (!dst->thread.xstate)
19 return -ENOMEM;
20 WARN_ON((unsigned long)dst->thread.xstate & 15);
21 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
22 }
61c4628b
SS
23 return 0;
24}
25
aa283f49 26void free_thread_xstate(struct task_struct *tsk)
61c4628b 27{
aa283f49
SS
28 if (tsk->thread.xstate) {
29 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
30 tsk->thread.xstate = NULL;
31 }
32}
33
aa283f49
SS
34void free_thread_info(struct thread_info *ti)
35{
36 free_thread_xstate(ti->task);
1679f271 37 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
61c4628b
SS
38}
39
40void arch_task_cache_init(void)
41{
42 task_xstate_cachep =
43 kmem_cache_create("task_xstate", xstate_size,
44 __alignof__(union thread_xstate),
45 SLAB_PANIC, NULL);
46}
7f424a8b
PZ
47
48static void do_nothing(void *unused)
49{
50}
51
52/*
53 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
54 * pm_idle and update to new pm_idle value. Required while changing pm_idle
55 * handler on SMP systems.
56 *
57 * Caller must have changed pm_idle to the new value before the call. Old
58 * pm_idle value will not be used by any CPU after the return of this function.
59 */
60void cpu_idle_wait(void)
61{
62 smp_mb();
63 /* kick all the CPUs so that they exit out of pm_idle */
64 smp_call_function(do_nothing, NULL, 0, 1);
65}
66EXPORT_SYMBOL_GPL(cpu_idle_wait);
67
68/*
69 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
70 * which can obviate IPI to trigger checking of need_resched.
71 * We execute MONITOR against need_resched and enter optimized wait state
72 * through MWAIT. Whenever someone changes need_resched, we would be woken
73 * up from MWAIT (without an IPI).
74 *
75 * New with Core Duo processors, MWAIT can take some hints based on CPU
76 * capability.
77 */
78void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
79{
80 if (!need_resched()) {
81 __monitor((void *)&current_thread_info()->flags, 0, 0);
82 smp_mb();
83 if (!need_resched())
84 __mwait(ax, cx);
85 }
86}
87
88/* Default MONITOR/MWAIT with no hints, used for default C1 state */
89static void mwait_idle(void)
90{
91 if (!need_resched()) {
92 __monitor((void *)&current_thread_info()->flags, 0, 0);
93 smp_mb();
94 if (!need_resched())
95 __sti_mwait(0, 0);
96 else
97 local_irq_enable();
98 } else
99 local_irq_enable();
100}
101
7f424a8b
PZ
102/*
103 * On SMP it's slightly faster (but much more power-consuming!)
104 * to poll the ->work.need_resched flag instead of waiting for the
105 * cross-CPU IPI to arrive. Use this option with caution.
106 */
107static void poll_idle(void)
108{
109 local_irq_enable();
110 cpu_relax();
111}
112
e9623b35
TG
113/*
114 * mwait selection logic:
115 *
116 * It depends on the CPU. For AMD CPUs that support MWAIT this is
117 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
118 * then depend on a clock divisor and current Pstate of the core. If
119 * all cores of a processor are in halt state (C1) the processor can
120 * enter the C1E (C1 enhanced) state. If mwait is used this will never
121 * happen.
122 *
123 * idle=mwait overrides this decision and forces the usage of mwait.
124 */
125static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
126{
127 if (force_mwait)
128 return 1;
129
130 if (c->x86_vendor == X86_VENDOR_AMD) {
131 switch(c->x86) {
132 case 0x10:
133 case 0x11:
134 return 0;
135 }
136 }
137 return 1;
138}
139
7f424a8b
PZ
140void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
141{
142 static int selected;
143
144 if (selected)
145 return;
146#ifdef CONFIG_X86_SMP
147 if (pm_idle == poll_idle && smp_num_siblings > 1) {
148 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
149 " performance may degrade.\n");
150 }
151#endif
e9623b35 152 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
7f424a8b
PZ
153 /*
154 * Skip, if setup has overridden idle.
155 * One CPU supports mwait => All CPUs supports mwait
156 */
157 if (!pm_idle) {
158 printk(KERN_INFO "using mwait in idle threads.\n");
159 pm_idle = mwait_idle;
160 }
161 }
162 selected = 1;
163}
164
165static int __init idle_setup(char *str)
166{
167 if (!strcmp(str, "poll")) {
168 printk("using polling idle threads.\n");
169 pm_idle = poll_idle;
170 } else if (!strcmp(str, "mwait"))
171 force_mwait = 1;
172 else
173 return -1;
174
175 boot_option_idle_override = 1;
176 return 0;
177}
178early_param("idle", idle_setup);
179