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drm/i915/edp: Allow alternate fixed mode for eDP if available.
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CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
b029e66f 35#include <linux/pwm.h>
1d8e1c75
CW
36#include "intel_drv.h"
37
b029e66f
SK
38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
1d8e1c75 40void
4c6df4b4 41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW
42 struct drm_display_mode *adjusted_mode)
43{
4c6df4b4 44 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW
47}
48
525997e0
JN
49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
a318b4c4 51 * @dev_priv: i915 device instance
525997e0
JN
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
a318b4c4 59intel_find_panel_downclock(struct drm_i915_private *dev_priv,
525997e0
JN
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
a318b4c4 97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
525997e0
JN
98 else
99 return NULL;
100}
101
1d8e1c75
CW
102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
b074cec8 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 105 struct intel_crtc_state *pipe_config,
b074cec8 106 int fitting_mode)
1d8e1c75 107{
7c5f93b0
VS
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
1d8e1c75
CW
110
111 /* Native modes don't need fitting */
aad941d5
VS
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
aad941d5
VS
120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
1d8e1c75
CW
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
aad941d5 127 u32 scaled_width = adjusted_mode->crtc_hdisplay
9084e7d2
DV
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
aad941d5 130 * adjusted_mode->crtc_vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
aad941d5 135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
1d8e1c75 136 y = 0;
aad941d5 137 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ
140 if (height & 1)
141 height++;
aad941d5 142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
1d8e1c75 143 x = 0;
aad941d5 144 width = adjusted_mode->crtc_hdisplay;
1d8e1c75
CW
145 } else {
146 x = y = 0;
aad941d5
VS
147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
1d8e1c75
CW
149 }
150 }
151 break;
152
1d8e1c75
CW
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
aad941d5
VS
155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 157 break;
ab3e67f4
JB
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW
162 }
163
164done:
b074cec8
JB
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552 170static void
5e7234c9 171centre_horizontally(struct drm_display_mode *adjusted_mode,
2dd24552
JB
172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
5e7234c9
VS
177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
2dd24552
JB
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
aad941d5 181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
2dd24552
JB
182 border += border & 1; /* make the border even */
183
5e7234c9
VS
184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
2dd24552 187
5e7234c9
VS
188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
2dd24552
JB
190}
191
192static void
5e7234c9 193centre_vertically(struct drm_display_mode *adjusted_mode,
2dd24552
JB
194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
5e7234c9
VS
199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
2dd24552
JB
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
aad941d5 203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
2dd24552 204
5e7234c9
VS
205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
2dd24552 208
5e7234c9
VS
209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
2dd24552
JB
211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
5cec258b 226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV
227 u32 *pfit_control)
228{
7c5f93b0 229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 233 adjusted_mode->crtc_vdisplay;
9084e7d2
DV
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
aad941d5 242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
9084e7d2
DV
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
5cec258b 246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
2d112de7 250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 254 adjusted_mode->crtc_vdisplay;
9084e7d2
DV
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
aad941d5 268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
9084e7d2 269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
aad941d5 270 adjusted_mode->crtc_vdisplay);
9084e7d2
DV
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
aad941d5 284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
9084e7d2 285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
aad941d5 286 adjusted_mode->crtc_hdisplay);
9084e7d2
DV
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552 303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 304 struct intel_crtc_state *pipe_config,
2dd24552
JB
305 int fitting_mode)
306{
66478475 307 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
7c5f93b0 309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB
310
311 /* Native modes don't need fitting */
aad941d5
VS
312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
2dd24552
JB
314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
37327abd
VS
322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB
324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
66478475 328 if (INTEL_GEN(dev_priv) >= 4)
9084e7d2
DV
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
2dd24552 333 break;
2dd24552
JB
334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
aad941d5
VS
339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
2dd24552 341 pfit_control |= PFIT_ENABLE;
66478475 342 if (INTEL_GEN(dev_priv) >= 4)
2dd24552
JB
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
ab3e67f4
JB
351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
2dd24552
JB
354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
66478475 358 if (INTEL_GEN(dev_priv) >= 4)
2dd24552
JB
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
6b89cdde 368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
66478475 369 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
6b89cdde
DV
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
2deefda5
DV
372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 374 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB
375}
376
525997e0 377enum drm_connector_status
1650be74 378intel_panel_detect(struct drm_i915_private *dev_priv)
525997e0 379{
525997e0
JN
380 /* Assume that the BIOS does not lie through the OpRegion... */
381 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
115719fc 382 return *dev_priv->opregion.lid_state & 0x1 ?
525997e0
JN
383 connector_status_connected :
384 connector_status_disconnected;
385 }
386
387 switch (i915.panel_ignore_lid) {
388 case -2:
389 return connector_status_connected;
390 case -1:
391 return connector_status_disconnected;
392 default:
393 return connector_status_unknown;
394 }
395}
396
6dda730e
JN
397/**
398 * scale - scale values from one range to another
399 *
400 * @source_val: value in range [@source_min..@source_max]
401 *
402 * Return @source_val in range [@source_min..@source_max] scaled to range
403 * [@target_min..@target_max].
404 */
405static uint32_t scale(uint32_t source_val,
406 uint32_t source_min, uint32_t source_max,
407 uint32_t target_min, uint32_t target_max)
408{
409 uint64_t target_val;
410
411 WARN_ON(source_min > source_max);
412 WARN_ON(target_min > target_max);
413
414 /* defensive */
415 source_val = clamp(source_val, source_min, source_max);
416
417 /* avoid overflows */
673e7bbd
AE
418 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
419 (target_max - target_min), source_max - source_min);
6dda730e
JN
420 target_val += target_min;
421
422 return target_val;
423}
424
425/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
426static inline u32 scale_user_to_hw(struct intel_connector *connector,
427 u32 user_level, u32 user_max)
428{
429 struct intel_panel *panel = &connector->panel;
430
431 return scale(user_level, 0, user_max,
432 panel->backlight.min, panel->backlight.max);
433}
434
435/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
436 * to [hw_min..hw_max]. */
437static inline u32 clamp_user_to_hw(struct intel_connector *connector,
438 u32 user_level, u32 user_max)
439{
440 struct intel_panel *panel = &connector->panel;
441 u32 hw_level;
442
443 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
444 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
445
446 return hw_level;
447}
448
449/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
450static inline u32 scale_hw_to_user(struct intel_connector *connector,
451 u32 hw_level, u32 user_max)
452{
453 struct intel_panel *panel = &connector->panel;
454
455 return scale(hw_level, panel->backlight.min, panel->backlight.max,
456 0, user_max);
457}
458
7bd688cd
JN
459static u32 intel_panel_compute_brightness(struct intel_connector *connector,
460 u32 val)
7bd90909 461{
e6cb3727 462 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
f91c15e0
JN
463 struct intel_panel *panel = &connector->panel;
464
465 WARN_ON(panel->backlight.max == 0);
4dca20ef 466
d330a953 467 if (i915.invert_brightness < 0)
4dca20ef
CE
468 return val;
469
d330a953 470 if (i915.invert_brightness > 0 ||
d6540632 471 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
1e2ba788 472 return panel->backlight.max - val + panel->backlight.min;
d6540632 473 }
7bd90909
CE
474
475 return val;
476}
477
437b15b8 478static u32 lpt_get_backlight(struct intel_connector *connector)
0b0b053a 479{
e6cb3727 480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
0b0b053a 481
96ab4c70
DV
482 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
483}
07bf139b 484
7bd688cd 485static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 486{
e6cb3727 487 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
8ba2d185 488
7bd688cd
JN
489 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
490}
a9573556 491
7bd688cd
JN
492static u32 i9xx_get_backlight(struct intel_connector *connector)
493{
e6cb3727 494 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
636baebf 495 struct intel_panel *panel = &connector->panel;
7bd688cd 496 u32 val;
07bf139b 497
7bd688cd 498 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
e6cb3727 499 if (INTEL_INFO(dev_priv)->gen < 4)
7bd688cd 500 val >>= 1;
ba3820ad 501
636baebf 502 if (panel->backlight.combination_mode) {
7bd688cd 503 u8 lbpc;
ba3820ad 504
91c8a326 505 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
7bd688cd 506 val *= lbpc;
a9573556
CW
507 }
508
7bd688cd
JN
509 return val;
510}
511
e6cb3727 512static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
7bd688cd 513{
23ec0a88
VS
514 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
515 return 0;
516
7bd688cd
JN
517 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
518}
519
520static u32 vlv_get_backlight(struct intel_connector *connector)
521{
e6cb3727 522 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd
JN
523 enum pipe pipe = intel_get_pipe_from_connector(connector);
524
e6cb3727 525 return _vlv_get_backlight(dev_priv, pipe);
7bd688cd
JN
526}
527
0fb890c0
VK
528static u32 bxt_get_backlight(struct intel_connector *connector)
529{
e6cb3727 530 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
022e4e52 531 struct intel_panel *panel = &connector->panel;
0fb890c0 532
022e4e52 533 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
0fb890c0
VK
534}
535
b029e66f
SK
536static u32 pwm_get_backlight(struct intel_connector *connector)
537{
538 struct intel_panel *panel = &connector->panel;
539 int duty_ns;
540
541 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
542 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
543}
544
7bd688cd
JN
545static u32 intel_panel_get_backlight(struct intel_connector *connector)
546{
e6cb3727 547 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
2d72f6c7
VS
548 struct intel_panel *panel = &connector->panel;
549 u32 val = 0;
7bd688cd 550
07f11d49 551 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 552
2d72f6c7 553 if (panel->backlight.enabled) {
5507faeb 554 val = panel->backlight.get(connector);
2d72f6c7
VS
555 val = intel_panel_compute_brightness(connector, val);
556 }
8ba2d185 557
07f11d49 558 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 559
a9573556
CW
560 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
561 return val;
562}
563
7d025e08 564static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
f8e10062 565{
7d025e08 566 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 567 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7d025e08 568
f8e10062
BW
569 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
570 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
571}
572
7d025e08 573static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
a9573556 574{
7d025e08 575 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 576 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd
JN
577 u32 tmp;
578
579 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
580 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW
581}
582
7d025e08 583static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
a9573556 584{
7d025e08 585 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 586 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
f91c15e0 587 struct intel_panel *panel = &connector->panel;
b329b328 588 u32 tmp, mask;
ba3820ad 589
f91c15e0
JN
590 WARN_ON(panel->backlight.max == 0);
591
636baebf 592 if (panel->backlight.combination_mode) {
ba3820ad
TI
593 u8 lbpc;
594
f91c15e0 595 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad 596 level /= lbpc;
91c8a326 597 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
ba3820ad
TI
598 }
599
e6cb3727 600 if (IS_GEN4(dev_priv)) {
b329b328
JN
601 mask = BACKLIGHT_DUTY_CYCLE_MASK;
602 } else {
a9573556 603 level <<= 1;
b329b328
JN
604 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
605 }
7bd688cd 606
b329b328 607 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN
608 I915_WRITE(BLC_PWM_CTL, tmp | level);
609}
610
7d025e08 611static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
7bd688cd 612{
7d025e08 613 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 614 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7d025e08 615 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
7bd688cd
JN
616 u32 tmp;
617
618 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
619 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
620}
621
7d025e08 622static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
0fb890c0 623{
7d025e08 624 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 625 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
022e4e52 626 struct intel_panel *panel = &connector->panel;
0fb890c0 627
022e4e52 628 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
0fb890c0
VK
629}
630
7d025e08 631static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
b029e66f 632{
7d025e08 633 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
b029e66f
SK
634 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
635
636 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
637}
638
7bd688cd 639static void
7d025e08 640intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
7bd688cd 641{
7d025e08 642 struct intel_connector *connector = to_intel_connector(conn_state->connector);
5507faeb 643 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
644
645 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
646
647 level = intel_panel_compute_brightness(connector, level);
7d025e08 648 panel->backlight.set(conn_state, level);
a9573556 649}
47356eb6 650
6dda730e 651/* set backlight brightness to level in range [0..max], scaling wrt hw min */
7d025e08 652static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
6dda730e 653 u32 user_level, u32 user_max)
47356eb6 654{
7d025e08 655 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 656 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
58c68779 657 struct intel_panel *panel = &connector->panel;
6dda730e 658 u32 hw_level;
8ba2d185 659
260d8f98 660 if (!panel->backlight.present)
752aa88a
JB
661 return;
662
07f11d49 663 mutex_lock(&dev_priv->backlight_lock);
d6540632 664
f91c15e0 665 WARN_ON(panel->backlight.max == 0);
d6540632 666
6dda730e
JN
667 hw_level = scale_user_to_hw(connector, user_level, user_max);
668 panel->backlight.level = hw_level;
669
670 if (panel->backlight.enabled)
7d025e08 671 intel_panel_actually_set_backlight(conn_state, hw_level);
6dda730e 672
07f11d49 673 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN
674}
675
676/* set backlight brightness to level in range [0..max], assuming hw min is
677 * respected.
678 */
90d7cd24 679void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
6dda730e
JN
680 u32 user_level, u32 user_max)
681{
90d7cd24 682 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 683 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
6dda730e 684 struct intel_panel *panel = &connector->panel;
6dda730e 685 u32 hw_level;
6dda730e 686
260d8f98 687 /*
90d7cd24 688 * Lack of crtc may occur during driver init because
260d8f98
VS
689 * connection_mutex isn't held across the entire backlight
690 * setup + modeset readout, and the BIOS can issue the
691 * requests at any time.
692 */
90d7cd24 693 if (!panel->backlight.present || !conn_state->crtc)
6dda730e
JN
694 return;
695
07f11d49 696 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN
697
698 WARN_ON(panel->backlight.max == 0);
699
700 hw_level = clamp_user_to_hw(connector, user_level, user_max);
701 panel->backlight.level = hw_level;
47356eb6 702
58c68779 703 if (panel->backlight.device)
6dda730e
JN
704 panel->backlight.device->props.brightness =
705 scale_hw_to_user(connector,
706 panel->backlight.level,
707 panel->backlight.device->props.max_brightness);
b6b3ba5b 708
58c68779 709 if (panel->backlight.enabled)
7d025e08 710 intel_panel_actually_set_backlight(conn_state, hw_level);
f91c15e0 711
07f11d49 712 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI
713}
714
7d025e08 715static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
437b15b8 716{
7d025e08 717 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
e6cb3727 718 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
437b15b8
JN
719 u32 tmp;
720
7d025e08 721 intel_panel_actually_set_backlight(old_conn_state, 0);
437b15b8 722
6675bce2
JN
723 /*
724 * Although we don't support or enable CPU PWM with LPT/SPT based
725 * systems, it may have been enabled prior to loading the
726 * driver. Disable to avoid warnings on LCPLL disable.
727 *
728 * This needs rework if we need to add support for CPU PWM on PCH split
729 * platforms.
730 */
731 tmp = I915_READ(BLC_PWM_CPU_CTL2);
732 if (tmp & BLM_PWM_ENABLE) {
733 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
734 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
735 }
736
437b15b8
JN
737 tmp = I915_READ(BLC_PWM_PCH_CTL1);
738 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
739}
740
7d025e08 741static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
7bd688cd 742{
7d025e08 743 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
e6cb3727 744 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd
JN
745 u32 tmp;
746
7d025e08 747 intel_panel_actually_set_backlight(old_conn_state, 0);
3bd712e5 748
7bd688cd
JN
749 tmp = I915_READ(BLC_PWM_CPU_CTL2);
750 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
751
752 tmp = I915_READ(BLC_PWM_PCH_CTL1);
753 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
754}
755
7d025e08 756static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
3bd712e5 757{
7d025e08 758 intel_panel_actually_set_backlight(old_conn_state, 0);
3bd712e5
JN
759}
760
7d025e08 761static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
7bd688cd 762{
7d025e08 763 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
7bd688cd
JN
764 u32 tmp;
765
7d025e08 766 intel_panel_actually_set_backlight(old_conn_state, 0);
3bd712e5 767
7bd688cd
JN
768 tmp = I915_READ(BLC_PWM_CTL2);
769 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
770}
771
7d025e08 772static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
7bd688cd 773{
7d025e08 774 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
e6cb3727 775 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7d025e08 776 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
7bd688cd
JN
777 u32 tmp;
778
7d025e08 779 intel_panel_actually_set_backlight(old_conn_state, 0);
3bd712e5 780
7bd688cd
JN
781 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
782 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
783}
784
7d025e08 785static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
0fb890c0 786{
7d025e08 787 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
e6cb3727 788 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
022e4e52
SK
789 struct intel_panel *panel = &connector->panel;
790 u32 tmp, val;
0fb890c0 791
7d025e08 792 intel_panel_actually_set_backlight(old_conn_state, 0);
0fb890c0 793
022e4e52
SK
794 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
795 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
796 tmp & ~BXT_BLC_PWM_ENABLE);
797
798 if (panel->backlight.controller == 1) {
799 val = I915_READ(UTIL_PIN_CTL);
800 val &= ~UTIL_PIN_ENABLE;
801 I915_WRITE(UTIL_PIN_CTL, val);
802 }
0fb890c0
VK
803}
804
7d025e08 805static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
4c9f7086 806{
7d025e08 807 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
4c9f7086
RV
808 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
809 struct intel_panel *panel = &connector->panel;
810 u32 tmp;
811
7d025e08 812 intel_panel_actually_set_backlight(old_conn_state, 0);
4c9f7086
RV
813
814 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
815 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
816 tmp & ~BXT_BLC_PWM_ENABLE);
817}
818
7d025e08 819static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
b029e66f 820{
7d025e08 821 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
b029e66f
SK
822 struct intel_panel *panel = &connector->panel;
823
824 /* Disable the backlight */
825 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
826 usleep_range(2000, 3000);
827 pwm_disable(panel->backlight.pwm);
828}
829
b037d58f 830void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
f52c619a 831{
b037d58f 832 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
e6cb3727 833 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
58c68779 834 struct intel_panel *panel = &connector->panel;
8ba2d185 835
260d8f98 836 if (!panel->backlight.present)
752aa88a
JB
837 return;
838
3f577573 839 /*
5389e916 840 * Do not disable backlight on the vga_switcheroo path. When switching
3f577573
JN
841 * away from i915, the other client may depend on i915 to handle the
842 * backlight. This will leave the backlight on unnecessarily when
843 * another client is not activated.
844 */
91c8a326 845 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
3f577573
JN
846 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
847 return;
848 }
849
07f11d49 850 mutex_lock(&dev_priv->backlight_lock);
47356eb6 851
ab656bb9
JN
852 if (panel->backlight.device)
853 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 854 panel->backlight.enabled = false;
7d025e08 855 panel->backlight.disable(old_conn_state);
24ded204 856
07f11d49 857 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 858}
24ded204 859
7d025e08
ML
860static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
861 const struct drm_connector_state *conn_state)
96ab4c70 862{
7d025e08 863 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 864 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
96ab4c70 865 struct intel_panel *panel = &connector->panel;
e29aff05 866 u32 pch_ctl1, pch_ctl2, schicken;
96ab4c70
DV
867
868 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
869 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
870 DRM_DEBUG_KMS("pch backlight already enabled\n");
871 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
872 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
873 }
24ded204 874
e29aff05
SL
875 if (HAS_PCH_LPT(dev_priv)) {
876 schicken = I915_READ(SOUTH_CHICKEN2);
877 if (panel->backlight.alternate_pwm_increment)
878 schicken |= LPT_PWM_GRANULARITY;
879 else
880 schicken &= ~LPT_PWM_GRANULARITY;
881 I915_WRITE(SOUTH_CHICKEN2, schicken);
882 } else {
883 schicken = I915_READ(SOUTH_CHICKEN1);
884 if (panel->backlight.alternate_pwm_increment)
885 schicken |= SPT_PWM_GRANULARITY;
886 else
887 schicken &= ~SPT_PWM_GRANULARITY;
888 I915_WRITE(SOUTH_CHICKEN1, schicken);
889 }
890
96ab4c70
DV
891 pch_ctl2 = panel->backlight.max << 16;
892 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 893
96ab4c70
DV
894 pch_ctl1 = 0;
895 if (panel->backlight.active_low_pwm)
896 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 897
e6b2627c
JN
898 /* After LPT, override is the default. */
899 if (HAS_PCH_LPT(dev_priv))
900 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV
901
902 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
903 POSTING_READ(BLC_PWM_PCH_CTL1);
904 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
905
906 /* This won't stick until the above enable. */
7d025e08 907 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
47356eb6
CW
908}
909
7d025e08
ML
910static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
911 const struct drm_connector_state *conn_state)
7bd688cd 912{
7d025e08 913 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 914 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
3bd712e5 915 struct intel_panel *panel = &connector->panel;
7d025e08 916 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
b35684b8 917 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 918
b35684b8
JN
919 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
920 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 921 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN
922 cpu_ctl2 &= ~BLM_PWM_ENABLE;
923 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
924 }
7bd688cd 925
b35684b8
JN
926 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
927 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
928 DRM_DEBUG_KMS("pch backlight already enabled\n");
929 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
930 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
931 }
7bd688cd
JN
932
933 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 934 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 935 else
b35684b8
JN
936 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
937 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 938 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 939 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 940
b35684b8 941 /* This won't stick until the above enable. */
7d025e08 942 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
b35684b8
JN
943
944 pch_ctl2 = panel->backlight.max << 16;
945 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
946
b35684b8
JN
947 pch_ctl1 = 0;
948 if (panel->backlight.active_low_pwm)
949 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 950
b35684b8
JN
951 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
952 POSTING_READ(BLC_PWM_PCH_CTL1);
953 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN
954}
955
7d025e08
ML
956static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
957 const struct drm_connector_state *conn_state)
3bd712e5 958{
7d025e08 959 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 960 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
3bd712e5 961 struct intel_panel *panel = &connector->panel;
b35684b8
JN
962 u32 ctl, freq;
963
964 ctl = I915_READ(BLC_PWM_CTL);
965 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 966 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
967 I915_WRITE(BLC_PWM_CTL, 0);
968 }
3bd712e5 969
b35684b8
JN
970 freq = panel->backlight.max;
971 if (panel->backlight.combination_mode)
972 freq /= 0xff;
973
974 ctl = freq << 17;
b6ab66aa 975 if (panel->backlight.combination_mode)
b35684b8 976 ctl |= BLM_LEGACY_MODE;
e6cb3727 977 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
b35684b8
JN
978 ctl |= BLM_POLARITY_PNV;
979
980 I915_WRITE(BLC_PWM_CTL, ctl);
981 POSTING_READ(BLC_PWM_CTL);
982
983 /* XXX: combine this into above write? */
7d025e08 984 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
2059ac3b
JN
985
986 /*
987 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
988 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
989 * that has backlight.
990 */
e6cb3727 991 if (IS_GEN2(dev_priv))
2059ac3b 992 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
7bd688cd 993}
8ba2d185 994
7d025e08
ML
995static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
996 const struct drm_connector_state *conn_state)
7bd688cd 997{
7d025e08 998 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 999 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
3bd712e5 1000 struct intel_panel *panel = &connector->panel;
7d025e08 1001 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
b35684b8 1002 u32 ctl, ctl2, freq;
7bd688cd 1003
b35684b8
JN
1004 ctl2 = I915_READ(BLC_PWM_CTL2);
1005 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 1006 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
1007 ctl2 &= ~BLM_PWM_ENABLE;
1008 I915_WRITE(BLC_PWM_CTL2, ctl2);
1009 }
7bd688cd 1010
b35684b8
JN
1011 freq = panel->backlight.max;
1012 if (panel->backlight.combination_mode)
1013 freq /= 0xff;
7bd688cd 1014
b35684b8
JN
1015 ctl = freq << 16;
1016 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 1017
b35684b8
JN
1018 ctl2 = BLM_PIPE(pipe);
1019 if (panel->backlight.combination_mode)
1020 ctl2 |= BLM_COMBINATION_MODE;
1021 if (panel->backlight.active_low_pwm)
1022 ctl2 |= BLM_POLARITY_I965;
1023 I915_WRITE(BLC_PWM_CTL2, ctl2);
1024 POSTING_READ(BLC_PWM_CTL2);
1025 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5 1026
7d025e08 1027 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
7bd688cd
JN
1028}
1029
7d025e08
ML
1030static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
1031 const struct drm_connector_state *conn_state)
7bd688cd 1032{
7d025e08 1033 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 1034 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
3bd712e5 1035 struct intel_panel *panel = &connector->panel;
7d025e08 1036 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
b35684b8 1037 u32 ctl, ctl2;
7bd688cd 1038
b35684b8
JN
1039 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1040 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 1041 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
1042 ctl2 &= ~BLM_PWM_ENABLE;
1043 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1044 }
7bd688cd 1045
b35684b8
JN
1046 ctl = panel->backlight.max << 16;
1047 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 1048
b35684b8 1049 /* XXX: combine this into above write? */
7d025e08 1050 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
7bd688cd 1051
b35684b8
JN
1052 ctl2 = 0;
1053 if (panel->backlight.active_low_pwm)
1054 ctl2 |= BLM_POLARITY_I965;
1055 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 1056 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 1057 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW
1058}
1059
7d025e08
ML
1060static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1061 const struct drm_connector_state *conn_state)
0fb890c0 1062{
7d025e08 1063 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 1064 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
0fb890c0 1065 struct intel_panel *panel = &connector->panel;
7d025e08 1066 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
022e4e52
SK
1067 u32 pwm_ctl, val;
1068
add03379 1069 /* Controller 1 uses the utility pin. */
022e4e52
SK
1070 if (panel->backlight.controller == 1) {
1071 val = I915_READ(UTIL_PIN_CTL);
1072 if (val & UTIL_PIN_ENABLE) {
1073 DRM_DEBUG_KMS("util pin already enabled\n");
1074 val &= ~UTIL_PIN_ENABLE;
1075 I915_WRITE(UTIL_PIN_CTL, val);
1076 }
0fb890c0 1077
022e4e52
SK
1078 val = 0;
1079 if (panel->backlight.util_pin_active_low)
1080 val |= UTIL_PIN_POLARITY;
1081 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1082 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1083 }
1084
1085 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
0fb890c0
VK
1086 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1087 DRM_DEBUG_KMS("backlight already enabled\n");
1088 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
022e4e52
SK
1089 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1090 pwm_ctl);
0fb890c0
VK
1091 }
1092
022e4e52
SK
1093 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1094 panel->backlight.max);
0fb890c0 1095
7d025e08 1096 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
0fb890c0
VK
1097
1098 pwm_ctl = 0;
1099 if (panel->backlight.active_low_pwm)
1100 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1101
022e4e52
SK
1102 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1103 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1104 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1105 pwm_ctl | BXT_BLC_PWM_ENABLE);
0fb890c0
VK
1106}
1107
7d025e08
ML
1108static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1109 const struct drm_connector_state *conn_state)
4c9f7086 1110{
7d025e08 1111 struct intel_connector *connector = to_intel_connector(conn_state->connector);
4c9f7086
RV
1112 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1113 struct intel_panel *panel = &connector->panel;
1114 u32 pwm_ctl;
1115
1116 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1117 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1118 DRM_DEBUG_KMS("backlight already enabled\n");
1119 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1120 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1121 pwm_ctl);
1122 }
1123
1124 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1125 panel->backlight.max);
1126
7d025e08 1127 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
4c9f7086
RV
1128
1129 pwm_ctl = 0;
1130 if (panel->backlight.active_low_pwm)
1131 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1132
1133 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1134 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1135 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1136 pwm_ctl | BXT_BLC_PWM_ENABLE);
1137}
1138
7d025e08
ML
1139static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1140 const struct drm_connector_state *conn_state)
b029e66f 1141{
7d025e08 1142 struct intel_connector *connector = to_intel_connector(conn_state->connector);
b029e66f
SK
1143 struct intel_panel *panel = &connector->panel;
1144
1145 pwm_enable(panel->backlight.pwm);
7d025e08 1146 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
b029e66f
SK
1147}
1148
b037d58f
ML
1149void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1150 const struct drm_connector_state *conn_state)
47356eb6 1151{
b037d58f 1152 struct intel_connector *connector = to_intel_connector(conn_state->connector);
e6cb3727 1153 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
58c68779 1154 struct intel_panel *panel = &connector->panel;
b037d58f 1155 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
8ba2d185 1156
260d8f98 1157 if (!panel->backlight.present)
752aa88a
JB
1158 return;
1159
b037d58f 1160 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 1161
07f11d49 1162 mutex_lock(&dev_priv->backlight_lock);
47356eb6 1163
f91c15e0
JN
1164 WARN_ON(panel->backlight.max == 0);
1165
13f3fbe8 1166 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 1167 panel->backlight.level = panel->backlight.max;
58c68779
JN
1168 if (panel->backlight.device)
1169 panel->backlight.device->props.brightness =
6dda730e
JN
1170 scale_hw_to_user(connector,
1171 panel->backlight.level,
1172 panel->backlight.device->props.max_brightness);
b6b3ba5b 1173 }
47356eb6 1174
7d025e08 1175 panel->backlight.enable(crtc_state, conn_state);
58c68779 1176 panel->backlight.enabled = true;
ab656bb9
JN
1177 if (panel->backlight.device)
1178 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 1179
07f11d49 1180 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW
1181}
1182
912e8b12 1183#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 1184static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 1185{
752aa88a 1186 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 1187 struct intel_panel *panel = &connector->panel;
752aa88a
JB
1188 struct drm_device *dev = connector->base.dev;
1189
51fd371b 1190 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW
1191 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1192 bd->props.brightness, bd->props.max_brightness);
7d025e08 1193 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
d6540632 1194 bd->props.max_brightness);
ab656bb9
JN
1195
1196 /*
1197 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1198 * backlight class device does not make it easy to to differentiate
1199 * between callbacks for brightness and bl_power, so our backlight_power
1200 * callback needs to take this into account.
1201 */
1202 if (panel->backlight.enabled) {
5507faeb 1203 if (panel->backlight.power) {
e6755fb7
JN
1204 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1205 bd->props.brightness != 0;
5507faeb 1206 panel->backlight.power(connector, enable);
ab656bb9
JN
1207 }
1208 } else {
1209 bd->props.power = FB_BLANK_POWERDOWN;
1210 }
1211
51fd371b 1212 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG
1213 return 0;
1214}
1215
db31af1d 1216static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1217{
752aa88a
JB
1218 struct intel_connector *connector = bl_get_data(bd);
1219 struct drm_device *dev = connector->base.dev;
fac5e23e 1220 struct drm_i915_private *dev_priv = to_i915(dev);
6dda730e 1221 u32 hw_level;
7bd688cd 1222 int ret;
752aa88a 1223
c8c8fb33 1224 intel_runtime_pm_get(dev_priv);
51fd371b 1225 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN
1226
1227 hw_level = intel_panel_get_backlight(connector);
1228 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1229
51fd371b 1230 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1231 intel_runtime_pm_put(dev_priv);
752aa88a 1232
7bd688cd 1233 return ret;
aaa6fd2a
MG
1234}
1235
db31af1d
JN
1236static const struct backlight_ops intel_backlight_device_ops = {
1237 .update_status = intel_backlight_device_update_status,
1238 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG
1239};
1240
1ebaa0b9 1241int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1242{
58c68779 1243 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1244 struct backlight_properties props;
aaa6fd2a 1245
58c68779 1246 if (WARN_ON(panel->backlight.device))
dc652f90
JN
1247 return -ENODEV;
1248
0962c3c9
VS
1249 if (!panel->backlight.present)
1250 return 0;
1251
6dda730e 1252 WARN_ON(panel->backlight.max == 0);
7bd688cd 1253
af437cfd 1254 memset(&props, 0, sizeof(props));
aaa6fd2a 1255 props.type = BACKLIGHT_RAW;
6dda730e
JN
1256
1257 /*
1258 * Note: Everything should work even if the backlight device max
1259 * presented to the userspace is arbitrarily chosen.
1260 */
7bd688cd 1261 props.max_brightness = panel->backlight.max;
6dda730e
JN
1262 props.brightness = scale_hw_to_user(connector,
1263 panel->backlight.level,
1264 props.max_brightness);
58c68779 1265
ab656bb9
JN
1266 if (panel->backlight.enabled)
1267 props.power = FB_BLANK_UNBLANK;
1268 else
1269 props.power = FB_BLANK_POWERDOWN;
1270
58c68779
JN
1271 /*
1272 * Note: using the same name independent of the connector prevents
1273 * registration of multiple backlight devices in the driver.
1274 */
1275 panel->backlight.device =
aaa6fd2a 1276 backlight_device_register("intel_backlight",
db31af1d
JN
1277 connector->base.kdev,
1278 connector,
1279 &intel_backlight_device_ops, &props);
aaa6fd2a 1280
58c68779 1281 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1282 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN
1283 PTR_ERR(panel->backlight.device));
1284 panel->backlight.device = NULL;
aaa6fd2a
MG
1285 return -ENODEV;
1286 }
0962c3c9
VS
1287
1288 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1289 connector->base.name);
1290
aaa6fd2a
MG
1291 return 0;
1292}
1293
e63d87c0 1294void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1295{
58c68779
JN
1296 struct intel_panel *panel = &connector->panel;
1297
1298 if (panel->backlight.device) {
1299 backlight_device_unregister(panel->backlight.device);
1300 panel->backlight.device = NULL;
dc652f90 1301 }
aaa6fd2a 1302}
db31af1d
JN
1303#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1304
4c9f7086
RV
1305/*
1306 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1307 * PWM increment = 1
1308 */
1309static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1310{
1311 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1312
1313 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
1314}
1315
2dd6982e
JN
1316/*
1317 * BXT: PWM clock frequency = 19.2 MHz.
1318 */
1319static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1320{
37f2248e 1321 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
2dd6982e
JN
1322}
1323
f91c15e0 1324/*
aa17cdb4
JN
1325 * SPT: This value represents the period of the PWM stream in clock periods
1326 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1327 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1328 */
1329static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1330{
32b421e7 1331 struct intel_panel *panel = &connector->panel;
e7dc33f3 1332 u32 mul;
aa17cdb4 1333
32b421e7 1334 if (panel->backlight.alternate_pwm_increment)
aa17cdb4
JN
1335 mul = 128;
1336 else
1337 mul = 16;
1338
37f2248e 1339 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
aa17cdb4
JN
1340}
1341
1342/*
1343 * LPT: This value represents the period of the PWM stream in clock periods
1344 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1345 * LPT SOUTH_CHICKEN2 register bit 5).
1346 */
1347static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1348{
e6cb3727 1349 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
32b421e7 1350 struct intel_panel *panel = &connector->panel;
aa17cdb4
JN
1351 u32 mul, clock;
1352
32b421e7 1353 if (panel->backlight.alternate_pwm_increment)
aa17cdb4
JN
1354 mul = 16;
1355 else
1356 mul = 128;
1357
56f5f700 1358 if (HAS_PCH_LPT_H(dev_priv))
aa17cdb4
JN
1359 clock = MHz(135); /* LPT:H */
1360 else
1361 clock = MHz(24); /* LPT:LP */
1362
37f2248e 1363 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
aa17cdb4
JN
1364}
1365
1366/*
1367 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1368 * display raw clocks multiplied by 128.
1369 */
1370static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1371{
e7dc33f3 1372 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
aa17cdb4 1373
37f2248e 1374 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
aa17cdb4
JN
1375}
1376
1377/*
1378 * Gen2: This field determines the number of time base events (display core
1379 * clock frequency/32) in total for a complete cycle of modulated backlight
1380 * control.
f91c15e0 1381 *
aa17cdb4
JN
1382 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1383 * divided by 32.
1384 */
1385static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1386{
e7dc33f3 1387 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
aa17cdb4
JN
1388 int clock;
1389
e7dc33f3
VS
1390 if (IS_PINEVIEW(dev_priv))
1391 clock = KHz(dev_priv->rawclk_freq);
aa17cdb4 1392 else
49cd97a3 1393 clock = KHz(dev_priv->cdclk.hw.cdclk);
aa17cdb4 1394
37f2248e 1395 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
aa17cdb4
JN
1396}
1397
1398/*
1399 * Gen4: This value represents the period of the PWM stream in display core
83d83392
VS
1400 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1401 *
aa17cdb4
JN
1402 */
1403static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1404{
3bed7f4d 1405 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
83d83392
VS
1406 int clock;
1407
1408 if (IS_G4X(dev_priv))
e7dc33f3 1409 clock = KHz(dev_priv->rawclk_freq);
83d83392 1410 else
49cd97a3 1411 clock = KHz(dev_priv->cdclk.hw.cdclk);
aa17cdb4 1412
37f2248e 1413 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
aa17cdb4
JN
1414}
1415
1416/*
1417 * VLV: This value represents the period of the PWM stream in display core
1418 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1419 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1420 */
1421static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1422{
e7dc33f3
VS
1423 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1424 int mul, clock;
aa17cdb4
JN
1425
1426 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
e7dc33f3
VS
1427 if (IS_CHERRYVIEW(dev_priv))
1428 clock = KHz(19200);
aa17cdb4 1429 else
e7dc33f3
VS
1430 clock = MHz(25);
1431 mul = 16;
aa17cdb4 1432 } else {
e7dc33f3
VS
1433 clock = KHz(dev_priv->rawclk_freq);
1434 mul = 128;
aa17cdb4 1435 }
e7dc33f3 1436
37f2248e 1437 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
aa17cdb4
JN
1438}
1439
1440static u32 get_backlight_max_vbt(struct intel_connector *connector)
1441{
e6cb3727 1442 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
5507faeb 1443 struct intel_panel *panel = &connector->panel;
aa17cdb4
JN
1444 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1445 u32 pwm;
1446
5075222b
JN
1447 if (!panel->backlight.hz_to_pwm) {
1448 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
aa17cdb4
JN
1449 return 0;
1450 }
1451
5075222b
JN
1452 if (pwm_freq_hz) {
1453 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1454 pwm_freq_hz);
1455 } else {
1456 pwm_freq_hz = 200;
1457 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1458 pwm_freq_hz);
aa17cdb4
JN
1459 }
1460
5507faeb 1461 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
aa17cdb4
JN
1462 if (!pwm) {
1463 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1464 return 0;
1465 }
1466
aa17cdb4
JN
1467 return pwm;
1468}
1469
1470/*
1471 * Note: The setup hooks can't assume pipe is set!
f91c15e0 1472 */
6dda730e
JN
1473static u32 get_backlight_min_vbt(struct intel_connector *connector)
1474{
e6cb3727 1475 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
6dda730e 1476 struct intel_panel *panel = &connector->panel;
e1c412e7 1477 int min;
6dda730e
JN
1478
1479 WARN_ON(panel->backlight.max == 0);
1480
e1c412e7
JN
1481 /*
1482 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1483 * to problems. There are such machines out there. Either our
1484 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1485 * against this by letting the minimum be at most (arbitrarily chosen)
1486 * 25% of the max.
1487 */
1488 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1489 if (min != dev_priv->vbt.backlight.min_brightness) {
1490 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1491 dev_priv->vbt.backlight.min_brightness, min);
1492 }
1493
6dda730e 1494 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1495 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN
1496}
1497
437b15b8 1498static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1499{
e6cb3727 1500 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
96ab4c70
DV
1501 struct intel_panel *panel = &connector->panel;
1502 u32 pch_ctl1, pch_ctl2, val;
32b421e7
JN
1503 bool alt;
1504
1505 if (HAS_PCH_LPT(dev_priv))
1506 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1507 else
1508 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1509 panel->backlight.alternate_pwm_increment = alt;
96ab4c70
DV
1510
1511 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1512 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1513
1514 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1515 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN
1516
1517 if (!panel->backlight.max)
1518 panel->backlight.max = get_backlight_max_vbt(connector);
1519
96ab4c70
DV
1520 if (!panel->backlight.max)
1521 return -ENODEV;
1522
6dda730e
JN
1523 panel->backlight.min = get_backlight_min_vbt(connector);
1524
437b15b8 1525 val = lpt_get_backlight(connector);
46e69f39
JN
1526 val = intel_panel_compute_brightness(connector, val);
1527 panel->backlight.level = clamp(val, panel->backlight.min,
1528 panel->backlight.max);
96ab4c70 1529
46e69f39 1530 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
96ab4c70
DV
1531
1532 return 0;
1533}
1534
6517d273 1535static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1536{
e6cb3727 1537 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd 1538 struct intel_panel *panel = &connector->panel;
636baebf 1539 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1540
636baebf
JN
1541 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1542 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1543
1544 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1545 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN
1546
1547 if (!panel->backlight.max)
1548 panel->backlight.max = get_backlight_max_vbt(connector);
1549
7bd688cd
JN
1550 if (!panel->backlight.max)
1551 return -ENODEV;
1552
6dda730e
JN
1553 panel->backlight.min = get_backlight_min_vbt(connector);
1554
7bd688cd 1555 val = pch_get_backlight(connector);
46e69f39
JN
1556 val = intel_panel_compute_brightness(connector, val);
1557 panel->backlight.level = clamp(val, panel->backlight.min,
1558 panel->backlight.max);
7bd688cd 1559
636baebf
JN
1560 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1561 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
46e69f39 1562 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
636baebf 1563
7bd688cd
JN
1564 return 0;
1565}
1566
6517d273 1567static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1568{
e6cb3727 1569 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd 1570 struct intel_panel *panel = &connector->panel;
636baebf
JN
1571 u32 ctl, val;
1572
1573 ctl = I915_READ(BLC_PWM_CTL);
1574
e6cb3727 1575 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
636baebf
JN
1576 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1577
e6cb3727 1578 if (IS_PINEVIEW(dev_priv))
636baebf
JN
1579 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1580
1581 panel->backlight.max = ctl >> 17;
aa17cdb4
JN
1582
1583 if (!panel->backlight.max) {
1584 panel->backlight.max = get_backlight_max_vbt(connector);
1585 panel->backlight.max >>= 1;
1586 }
7bd688cd 1587
7bd688cd
JN
1588 if (!panel->backlight.max)
1589 return -ENODEV;
1590
aa17cdb4
JN
1591 if (panel->backlight.combination_mode)
1592 panel->backlight.max *= 0xff;
1593
6dda730e
JN
1594 panel->backlight.min = get_backlight_min_vbt(connector);
1595
7bd688cd 1596 val = i9xx_get_backlight(connector);
46e69f39
JN
1597 val = intel_panel_compute_brightness(connector, val);
1598 panel->backlight.level = clamp(val, panel->backlight.min,
1599 panel->backlight.max);
7bd688cd 1600
46e69f39 1601 panel->backlight.enabled = val != 0;
636baebf 1602
7bd688cd
JN
1603 return 0;
1604}
1605
6517d273 1606static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1607{
e6cb3727 1608 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd 1609 struct intel_panel *panel = &connector->panel;
636baebf
JN
1610 u32 ctl, ctl2, val;
1611
1612 ctl2 = I915_READ(BLC_PWM_CTL2);
1613 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1614 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1615
1616 ctl = I915_READ(BLC_PWM_CTL);
1617 panel->backlight.max = ctl >> 16;
aa17cdb4
JN
1618
1619 if (!panel->backlight.max)
1620 panel->backlight.max = get_backlight_max_vbt(connector);
7bd688cd 1621
7bd688cd
JN
1622 if (!panel->backlight.max)
1623 return -ENODEV;
1624
aa17cdb4
JN
1625 if (panel->backlight.combination_mode)
1626 panel->backlight.max *= 0xff;
1627
6dda730e
JN
1628 panel->backlight.min = get_backlight_min_vbt(connector);
1629
7bd688cd 1630 val = i9xx_get_backlight(connector);
46e69f39
JN
1631 val = intel_panel_compute_brightness(connector, val);
1632 panel->backlight.level = clamp(val, panel->backlight.min,
1633 panel->backlight.max);
7bd688cd 1634
46e69f39 1635 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
636baebf 1636
7bd688cd
JN
1637 return 0;
1638}
1639
6517d273 1640static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd 1641{
e6cb3727 1642 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd 1643 struct intel_panel *panel = &connector->panel;
636baebf 1644 u32 ctl, ctl2, val;
7bd688cd 1645
6517d273
VS
1646 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1647 return -ENODEV;
1648
1649 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN
1650 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1651
6517d273 1652 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1653 panel->backlight.max = ctl >> 16;
aa17cdb4
JN
1654
1655 if (!panel->backlight.max)
1656 panel->backlight.max = get_backlight_max_vbt(connector);
1657
7bd688cd
JN
1658 if (!panel->backlight.max)
1659 return -ENODEV;
1660
6dda730e
JN
1661 panel->backlight.min = get_backlight_min_vbt(connector);
1662
e6cb3727 1663 val = _vlv_get_backlight(dev_priv, pipe);
46e69f39
JN
1664 val = intel_panel_compute_brightness(connector, val);
1665 panel->backlight.level = clamp(val, panel->backlight.min,
1666 panel->backlight.max);
7bd688cd 1667
46e69f39 1668 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
636baebf 1669
7bd688cd
JN
1670 return 0;
1671}
1672
0fb890c0
VK
1673static int
1674bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1675{
e6cb3727 1676 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
0fb890c0
VK
1677 struct intel_panel *panel = &connector->panel;
1678 u32 pwm_ctl, val;
1679
add03379 1680 panel->backlight.controller = dev_priv->vbt.backlight.controller;
0fb890c0 1681
022e4e52
SK
1682 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1683
add03379 1684 /* Controller 1 uses the utility pin. */
022e4e52
SK
1685 if (panel->backlight.controller == 1) {
1686 val = I915_READ(UTIL_PIN_CTL);
1687 panel->backlight.util_pin_active_low =
1688 val & UTIL_PIN_POLARITY;
1689 }
1690
1691 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1692 panel->backlight.max =
1693 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
aa17cdb4
JN
1694
1695 if (!panel->backlight.max)
1696 panel->backlight.max = get_backlight_max_vbt(connector);
1697
0fb890c0
VK
1698 if (!panel->backlight.max)
1699 return -ENODEV;
1700
1701 val = bxt_get_backlight(connector);
46e69f39
JN
1702 val = intel_panel_compute_brightness(connector, val);
1703 panel->backlight.level = clamp(val, panel->backlight.min,
1704 panel->backlight.max);
0fb890c0 1705
46e69f39 1706 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
0fb890c0
VK
1707
1708 return 0;
1709}
1710
4c9f7086
RV
1711static int
1712cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1713{
1714 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1715 struct intel_panel *panel = &connector->panel;
1716 u32 pwm_ctl, val;
1717
1718 /*
1719 * CNP has the BXT implementation of backlight, but with only
1720 * one controller. Future platforms could have multiple controllers
1721 * so let's make this extensible and prepared for the future.
1722 */
1723 panel->backlight.controller = 0;
1724
1725 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1726
1727 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1728 panel->backlight.max =
1729 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1730
1731 if (!panel->backlight.max)
1732 panel->backlight.max = get_backlight_max_vbt(connector);
1733
1734 if (!panel->backlight.max)
1735 return -ENODEV;
1736
1737 val = bxt_get_backlight(connector);
1738 val = intel_panel_compute_brightness(connector, val);
1739 panel->backlight.level = clamp(val, panel->backlight.min,
1740 panel->backlight.max);
1741
1742 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1743
1744 return 0;
1745}
1746
b029e66f
SK
1747static int pwm_setup_backlight(struct intel_connector *connector,
1748 enum pipe pipe)
1749{
1750 struct drm_device *dev = connector->base.dev;
1751 struct intel_panel *panel = &connector->panel;
1752 int retval;
1753
1754 /* Get the PWM chip for backlight control */
1755 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1756 if (IS_ERR(panel->backlight.pwm)) {
1757 DRM_ERROR("Failed to own the pwm chip\n");
1758 panel->backlight.pwm = NULL;
1759 return -ENODEV;
1760 }
1761
2347aa7c
BB
1762 /*
1763 * FIXME: pwm_apply_args() should be removed when switching to
1764 * the atomic PWM API.
1765 */
1766 pwm_apply_args(panel->backlight.pwm);
1767
b029e66f
SK
1768 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1769 CRC_PMIC_PWM_PERIOD_NS);
1770 if (retval < 0) {
1771 DRM_ERROR("Failed to configure the pwm chip\n");
1772 pwm_put(panel->backlight.pwm);
1773 panel->backlight.pwm = NULL;
1774 return retval;
1775 }
1776
1777 panel->backlight.min = 0; /* 0% */
1778 panel->backlight.max = 100; /* 100% */
1779 panel->backlight.level = DIV_ROUND_UP(
1780 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1781 CRC_PMIC_PWM_PERIOD_NS);
1782 panel->backlight.enabled = panel->backlight.level != 0;
1783
1784 return 0;
1785}
1786
6517d273 1787int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1788{
e6cb3727 1789 struct drm_i915_private *dev_priv = to_i915(connector->dev);
db31af1d 1790 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1791 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1792 int ret;
db31af1d 1793
c675949e 1794 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD
1795 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1796 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1797 } else {
1798 DRM_DEBUG_KMS("no backlight present per VBT\n");
1799 return 0;
1800 }
c675949e
JN
1801 }
1802
5507faeb
JN
1803 /* ensure intel_panel has been initialized first */
1804 if (WARN_ON(!panel->backlight.setup))
1805 return -ENODEV;
1806
7bd688cd 1807 /* set level and max in panel struct */
07f11d49 1808 mutex_lock(&dev_priv->backlight_lock);
5507faeb 1809 ret = panel->backlight.setup(intel_connector, pipe);
07f11d49 1810 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN
1811
1812 if (ret) {
1813 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1814 connector->name);
7bd688cd
JN
1815 return ret;
1816 }
db31af1d 1817
c91c9f32
JN
1818 panel->backlight.present = true;
1819
0962c3c9
VS
1820 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1821 connector->name,
08c4d7fc 1822 enableddisabled(panel->backlight.enabled),
0962c3c9 1823 panel->backlight.level, panel->backlight.max);
c445b3b1 1824
aaa6fd2a
MG
1825 return 0;
1826}
1827
db31af1d 1828void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1829{
db31af1d 1830 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1831 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1832
b029e66f
SK
1833 /* dispose of the pwm */
1834 if (panel->backlight.pwm)
1835 pwm_put(panel->backlight.pwm);
1836
c91c9f32 1837 panel->backlight.present = false;
aaa6fd2a 1838}
1d508706 1839
7bd688cd 1840/* Set up chip specific backlight functions */
5507faeb
JN
1841static void
1842intel_panel_init_backlight_funcs(struct intel_panel *panel)
7bd688cd 1843{
e6cb3727 1844 struct intel_connector *connector =
5507faeb 1845 container_of(panel, struct intel_connector, panel);
e6cb3727 1846 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
7bd688cd 1847
e7156c83
YA
1848 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1849 intel_dp_aux_init_backlight_funcs(connector) == 0)
1850 return;
1851
90198355
JN
1852 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1853 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1854 return;
1855
cc3f90f0 1856 if (IS_GEN9_LP(dev_priv)) {
5507faeb
JN
1857 panel->backlight.setup = bxt_setup_backlight;
1858 panel->backlight.enable = bxt_enable_backlight;
1859 panel->backlight.disable = bxt_disable_backlight;
1860 panel->backlight.set = bxt_set_backlight;
1861 panel->backlight.get = bxt_get_backlight;
2dd6982e 1862 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
4c9f7086
RV
1863 } else if (HAS_PCH_CNP(dev_priv)) {
1864 panel->backlight.setup = cnp_setup_backlight;
1865 panel->backlight.enable = cnp_enable_backlight;
1866 panel->backlight.disable = cnp_disable_backlight;
1867 panel->backlight.set = bxt_set_backlight;
1868 panel->backlight.get = bxt_get_backlight;
1869 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
22dea0be
RV
1870 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1871 HAS_PCH_KBP(dev_priv)) {
5507faeb
JN
1872 panel->backlight.setup = lpt_setup_backlight;
1873 panel->backlight.enable = lpt_enable_backlight;
1874 panel->backlight.disable = lpt_disable_backlight;
1875 panel->backlight.set = lpt_set_backlight;
1876 panel->backlight.get = lpt_get_backlight;
e6cb3727 1877 if (HAS_PCH_LPT(dev_priv))
5507faeb 1878 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
aa17cdb4 1879 else
5507faeb 1880 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
e6cb3727 1881 } else if (HAS_PCH_SPLIT(dev_priv)) {
5507faeb
JN
1882 panel->backlight.setup = pch_setup_backlight;
1883 panel->backlight.enable = pch_enable_backlight;
1884 panel->backlight.disable = pch_disable_backlight;
1885 panel->backlight.set = pch_set_backlight;
1886 panel->backlight.get = pch_get_backlight;
1887 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
e6cb3727 1888 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
92c4565e 1889 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
5507faeb
JN
1890 panel->backlight.setup = pwm_setup_backlight;
1891 panel->backlight.enable = pwm_enable_backlight;
1892 panel->backlight.disable = pwm_disable_backlight;
1893 panel->backlight.set = pwm_set_backlight;
1894 panel->backlight.get = pwm_get_backlight;
b029e66f 1895 } else {
5507faeb
JN
1896 panel->backlight.setup = vlv_setup_backlight;
1897 panel->backlight.enable = vlv_enable_backlight;
1898 panel->backlight.disable = vlv_disable_backlight;
1899 panel->backlight.set = vlv_set_backlight;
1900 panel->backlight.get = vlv_get_backlight;
1901 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
b029e66f 1902 }
e6cb3727 1903 } else if (IS_GEN4(dev_priv)) {
5507faeb
JN
1904 panel->backlight.setup = i965_setup_backlight;
1905 panel->backlight.enable = i965_enable_backlight;
1906 panel->backlight.disable = i965_disable_backlight;
1907 panel->backlight.set = i9xx_set_backlight;
1908 panel->backlight.get = i9xx_get_backlight;
1909 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
7bd688cd 1910 } else {
5507faeb
JN
1911 panel->backlight.setup = i9xx_setup_backlight;
1912 panel->backlight.enable = i9xx_enable_backlight;
1913 panel->backlight.disable = i9xx_disable_backlight;
1914 panel->backlight.set = i9xx_set_backlight;
1915 panel->backlight.get = i9xx_get_backlight;
1916 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
7bd688cd
JN
1917 }
1918}
1919
dd06f90e 1920int intel_panel_init(struct intel_panel *panel,
4b6ed685 1921 struct drm_display_mode *fixed_mode,
cf91eea1 1922 struct drm_display_mode *alt_fixed_mode,
4b6ed685 1923 struct drm_display_mode *downclock_mode)
1d508706 1924{
5507faeb
JN
1925 intel_panel_init_backlight_funcs(panel);
1926
dd06f90e 1927 panel->fixed_mode = fixed_mode;
cf91eea1 1928 panel->alt_fixed_mode = alt_fixed_mode;
4b6ed685 1929 panel->downclock_mode = downclock_mode;
dd06f90e 1930
1d508706
JN
1931 return 0;
1932}
1933
1934void intel_panel_fini(struct intel_panel *panel)
1935{
dd06f90e
JN
1936 struct intel_connector *intel_connector =
1937 container_of(panel, struct intel_connector, panel);
1938
1939 if (panel->fixed_mode)
1940 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197 1941
cf91eea1
JB
1942 if (panel->alt_fixed_mode)
1943 drm_mode_destroy(intel_connector->base.dev,
1944 panel->alt_fixed_mode);
1945
ec9ed197
VK
1946 if (panel->downclock_mode)
1947 drm_mode_destroy(intel_connector->base.dev,
1948 panel->downclock_mode);
1d508706 1949}