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1/*
2 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
3 *
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4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
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6 *
7 * Copyright (C) 2008, 2009 PMC Sierra Inc
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
22 * USA
23 *
24 */
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/ioport.h>
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/wait.h>
34#include <linux/spinlock.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37#include <linux/blkdev.h>
38#include <linux/firmware.h>
39#include <linux/module.h>
40#include <linux/moduleparam.h>
41#include <linux/hdreg.h>
89a36810 42#include <linux/io.h>
5a0e3ad6 43#include <linux/slab.h>
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44#include <asm/irq.h>
45#include <asm/processor.h>
46#include <linux/libata.h>
47#include <linux/mutex.h>
9c9bd593 48#include <linux/ktime.h>
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49#include <scsi/scsi.h>
50#include <scsi/scsi_host.h>
34876402 51#include <scsi/scsi_device.h>
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52#include <scsi/scsi_tcq.h>
53#include <scsi/scsi_eh.h>
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsicam.h>
56
57#include "pmcraid.h"
58
59/*
60 * Module configuration parameters
61 */
62static unsigned int pmcraid_debug_log;
63static unsigned int pmcraid_disable_aen;
64static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
5da61410 65static unsigned int pmcraid_enable_msix;
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66
67/*
68 * Data structures to support multiple adapters by the LLD.
69 * pmcraid_adapter_count - count of configured adapters
70 */
71static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
72
73/*
74 * Supporting user-level control interface through IOCTL commands.
75 * pmcraid_major - major number to use
76 * pmcraid_minor - minor number(s) to use
77 */
78static unsigned int pmcraid_major;
79static struct class *pmcraid_class;
144b139c 80static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
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81
82/*
83 * Module parameters
84 */
729c8456 85MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
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86MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(PMCRAID_DRIVER_VERSION);
89
90module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
91MODULE_PARM_DESC(log_level,
92 "Enables firmware error code logging, default :1 high-severity"
93 " errors, 2: all errors including high-severity errors,"
94 " 0: disables logging");
95
96module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
97MODULE_PARM_DESC(debug,
98 "Enable driver verbose message logging. Set 1 to enable."
99 "(default: 0)");
100
101module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
102MODULE_PARM_DESC(disable_aen,
103 "Disable driver aen notifications to apps. Set 1 to disable."
104 "(default: 0)");
105
106/* chip specific constants for PMC MaxRAID controllers (same for
107 * 0x5220 and 0x8010
108 */
109static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
110 {
111 .ioastatus = 0x0,
112 .ioarrin = 0x00040,
113 .mailbox = 0x7FC30,
114 .global_intr_mask = 0x00034,
115 .ioa_host_intr = 0x0009C,
116 .ioa_host_intr_clr = 0x000A0,
c20c4267 117 .ioa_host_msix_intr = 0x7FC40,
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118 .ioa_host_mask = 0x7FC28,
119 .ioa_host_mask_clr = 0x7FC28,
120 .host_ioa_intr = 0x00020,
121 .host_ioa_intr_clr = 0x00020,
122 .transop_timeout = 300
123 }
124};
125
126/*
127 * PCI device ids supported by pmcraid driver
128 */
6f039790 129static struct pci_device_id pmcraid_pci_table[] = {
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130 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
131 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
132 },
133 {}
134};
135
136MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
137
138
139
140/**
141 * pmcraid_slave_alloc - Prepare for commands to a device
142 * @scsi_dev: scsi device struct
143 *
144 * This function is called by mid-layer prior to sending any command to the new
145 * device. Stores resource entry details of the device in scsi_device struct.
146 * Queuecommand uses the resource handle and other details to fill up IOARCB
147 * while sending commands to the device.
148 *
149 * Return value:
150 * 0 on success / -ENXIO if device does not exist
151 */
152static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
153{
154 struct pmcraid_resource_entry *temp, *res = NULL;
155 struct pmcraid_instance *pinstance;
156 u8 target, bus, lun;
157 unsigned long lock_flags;
158 int rc = -ENXIO;
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159 u16 fw_version;
160
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161 pinstance = shost_priv(scsi_dev->host);
162
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163 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
164
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165 /* Driver exposes VSET and GSCSI resources only; all other device types
166 * are not exposed. Resource list is synchronized using resource lock
167 * so any traversal or modifications to the list should be done inside
168 * this lock
169 */
170 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
171 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
172
729c8456 173 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
89a36810 174 if (RES_IS_VSET(temp->cfg_entry)) {
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175 if (fw_version <= PMCRAID_FW_VERSION_1)
176 target = temp->cfg_entry.unique_flags1;
177 else
45c80be6 178 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
c20c4267 179
729c8456 180 if (target > PMCRAID_MAX_VSET_TARGETS)
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181 continue;
182 bus = PMCRAID_VSET_BUS_ID;
183 lun = 0;
184 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
185 target = RES_TARGET(temp->cfg_entry.resource_address);
186 bus = PMCRAID_PHYS_BUS_ID;
187 lun = RES_LUN(temp->cfg_entry.resource_address);
188 } else {
189 continue;
190 }
191
192 if (bus == scsi_dev->channel &&
193 target == scsi_dev->id &&
194 lun == scsi_dev->lun) {
195 res = temp;
196 break;
197 }
198 }
199
200 if (res) {
201 res->scsi_dev = scsi_dev;
202 scsi_dev->hostdata = res;
203 res->change_detected = 0;
204 atomic_set(&res->read_failures, 0);
205 atomic_set(&res->write_failures, 0);
206 rc = 0;
207 }
208 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
209 return rc;
210}
211
212/**
213 * pmcraid_slave_configure - Configures a SCSI device
214 * @scsi_dev: scsi device struct
215 *
25985edc 216 * This function is executed by SCSI mid layer just after a device is first
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217 * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
218 * timeout value (default 30s) will be over-written to a higher value (60s)
219 * and max_sectors value will be over-written to 512. It also sets queue depth
220 * to host->cmd_per_lun value
221 *
222 * Return value:
223 * 0 on success
224 */
225static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
226{
227 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
228
229 if (!res)
230 return 0;
231
232 /* LLD exposes VSETs and Enclosure devices only */
233 if (RES_IS_GSCSI(res->cfg_entry) &&
234 scsi_dev->type != TYPE_ENCLOSURE)
235 return -ENXIO;
236
237 pmcraid_info("configuring %x:%x:%x:%x\n",
238 scsi_dev->host->unique_id,
239 scsi_dev->channel,
240 scsi_dev->id,
9cb78c16 241 (u8)scsi_dev->lun);
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242
243 if (RES_IS_GSCSI(res->cfg_entry)) {
244 scsi_dev->allow_restart = 1;
245 } else if (RES_IS_VSET(res->cfg_entry)) {
246 scsi_dev->allow_restart = 1;
247 blk_queue_rq_timeout(scsi_dev->request_queue,
248 PMCRAID_VSET_IO_TIMEOUT);
086fa5ff 249 blk_queue_max_hw_sectors(scsi_dev->request_queue,
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250 PMCRAID_VSET_MAX_SECTORS);
251 }
252
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253 /*
254 * We never want to report TCQ support for these types of devices.
255 */
256 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
257 scsi_dev->tagged_supported = 0;
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258
259 return 0;
260}
261
262/**
263 * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
264 *
265 * @scsi_dev: scsi device struct
266 *
267 * This is called by mid-layer before removing a device. Pointer assignments
268 * done in pmcraid_slave_alloc will be reset to NULL here.
269 *
270 * Return value
271 * none
272 */
273static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
274{
275 struct pmcraid_resource_entry *res;
276
277 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
278
279 if (res)
280 res->scsi_dev = NULL;
281
282 scsi_dev->hostdata = NULL;
283}
284
285/**
286 * pmcraid_change_queue_depth - Change the device's queue depth
287 * @scsi_dev: scsi device struct
288 * @depth: depth to set
289 *
290 * Return value
c20c4267 291 * actual depth set
89a36810 292 */
db5ed4df 293static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
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294{
295 if (depth > PMCRAID_MAX_CMD_PER_LUN)
296 depth = PMCRAID_MAX_CMD_PER_LUN;
db5ed4df 297 return scsi_change_queue_depth(scsi_dev, depth);
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298}
299
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300/**
301 * pmcraid_init_cmdblk - initializes a command block
302 *
303 * @cmd: pointer to struct pmcraid_cmd to be initialized
304 * @index: if >=0 first time initialization; otherwise reinitialization
305 *
306 * Return Value
307 * None
308 */
61b96d5b 309static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
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310{
311 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
312 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
313
314 if (index >= 0) {
315 /* first time initialization (called from probe) */
316 u32 ioasa_offset =
317 offsetof(struct pmcraid_control_block, ioasa);
318
319 cmd->index = index;
320 ioarcb->response_handle = cpu_to_le32(index << 2);
321 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
322 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
323 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
324 } else {
325 /* re-initialization of various lengths, called once command is
326 * processed by IOA
327 */
328 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
c20c4267 329 ioarcb->hrrq_id = 0;
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330 ioarcb->request_flags0 = 0;
331 ioarcb->request_flags1 = 0;
332 ioarcb->cmd_timeout = 0;
45c80be6 333 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
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334 ioarcb->ioadl_bus_addr = 0;
335 ioarcb->ioadl_length = 0;
336 ioarcb->data_transfer_length = 0;
337 ioarcb->add_cmd_param_length = 0;
338 ioarcb->add_cmd_param_offset = 0;
339 cmd->ioa_cb->ioasa.ioasc = 0;
340 cmd->ioa_cb->ioasa.residual_data_length = 0;
c20c4267 341 cmd->time_left = 0;
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342 }
343
344 cmd->cmd_done = NULL;
345 cmd->scsi_cmd = NULL;
346 cmd->release = 0;
347 cmd->completion_req = 0;
144b139c 348 cmd->sense_buffer = NULL;
c20c4267 349 cmd->sense_buffer_dma = 0;
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350 cmd->dma_handle = 0;
351 init_timer(&cmd->timer);
352}
353
354/**
355 * pmcraid_reinit_cmdblk - reinitialize a command block
356 *
357 * @cmd: pointer to struct pmcraid_cmd to be reinitialized
358 *
359 * Return Value
360 * None
361 */
362static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
363{
364 pmcraid_init_cmdblk(cmd, -1);
365}
366
367/**
368 * pmcraid_get_free_cmd - get a free cmd block from command block pool
369 * @pinstance: adapter instance structure
370 *
371 * Return Value:
372 * returns pointer to cmd block or NULL if no blocks are available
373 */
374static struct pmcraid_cmd *pmcraid_get_free_cmd(
375 struct pmcraid_instance *pinstance
376)
377{
378 struct pmcraid_cmd *cmd = NULL;
379 unsigned long lock_flags;
380
381 /* free cmd block list is protected by free_pool_lock */
382 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
383
384 if (!list_empty(&pinstance->free_cmd_pool)) {
385 cmd = list_entry(pinstance->free_cmd_pool.next,
386 struct pmcraid_cmd, free_list);
387 list_del(&cmd->free_list);
388 }
389 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
390
391 /* Initialize the command block before giving it the caller */
392 if (cmd != NULL)
393 pmcraid_reinit_cmdblk(cmd);
394 return cmd;
395}
396
397/**
398 * pmcraid_return_cmd - return a completed command block back into free pool
399 * @cmd: pointer to the command block
400 *
401 * Return Value:
402 * nothing
403 */
61b96d5b 404static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
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405{
406 struct pmcraid_instance *pinstance = cmd->drv_inst;
407 unsigned long lock_flags;
408
409 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
410 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
411 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
412}
413
414/**
415 * pmcraid_read_interrupts - reads IOA interrupts
416 *
417 * @pinstance: pointer to adapter instance structure
418 *
419 * Return value
420 * interrupts read from IOA
421 */
422static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
423{
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424 return (pinstance->interrupt_mode) ?
425 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
426 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
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427}
428
429/**
430 * pmcraid_disable_interrupts - Masks and clears all specified interrupts
431 *
432 * @pinstance: pointer to per adapter instance structure
433 * @intrs: interrupts to disable
434 *
435 * Return Value
436 * None
437 */
438static void pmcraid_disable_interrupts(
439 struct pmcraid_instance *pinstance,
440 u32 intrs
441)
442{
443 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
444 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
445
89a36810 446 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
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447 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
448 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
449
450 if (!pinstance->interrupt_mode) {
451 iowrite32(intrs,
452 pinstance->int_regs.ioa_host_interrupt_mask_reg);
453 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
454 }
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455}
456
457/**
458 * pmcraid_enable_interrupts - Enables specified interrupts
459 *
460 * @pinstance: pointer to per adapter instance structure
461 * @intr: interrupts to enable
462 *
463 * Return Value
464 * None
465 */
466static void pmcraid_enable_interrupts(
467 struct pmcraid_instance *pinstance,
468 u32 intrs
469)
470{
471 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
472 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
473
474 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
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475
476 if (!pinstance->interrupt_mode) {
477 iowrite32(~intrs,
478 pinstance->int_regs.ioa_host_interrupt_mask_reg);
479 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
480 }
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481
482 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
483 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
484 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
485}
486
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487/**
488 * pmcraid_clr_trans_op - clear trans to op interrupt
489 *
490 * @pinstance: pointer to per adapter instance structure
491 *
492 * Return Value
493 * None
494 */
495static void pmcraid_clr_trans_op(
496 struct pmcraid_instance *pinstance
497)
498{
499 unsigned long lock_flags;
500
501 if (!pinstance->interrupt_mode) {
502 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
503 pinstance->int_regs.ioa_host_interrupt_mask_reg);
504 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
505 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
506 pinstance->int_regs.ioa_host_interrupt_clr_reg);
507 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
508 }
509
510 if (pinstance->reset_cmd != NULL) {
511 del_timer(&pinstance->reset_cmd->timer);
512 spin_lock_irqsave(
513 pinstance->host->host_lock, lock_flags);
514 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
515 spin_unlock_irqrestore(
516 pinstance->host->host_lock, lock_flags);
517 }
518}
519
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520/**
521 * pmcraid_reset_type - Determine the required reset type
522 * @pinstance: pointer to adapter instance structure
523 *
524 * IOA requires hard reset if any of the following conditions is true.
525 * 1. If HRRQ valid interrupt is not masked
526 * 2. IOA reset alert doorbell is set
527 * 3. If there are any error interrupts
528 */
529static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
530{
531 u32 mask;
532 u32 intrs;
533 u32 alerts;
534
535 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
536 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
537 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
538
539 if ((mask & INTRS_HRRQ_VALID) == 0 ||
540 (alerts & DOORBELL_IOA_RESET_ALERT) ||
541 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
542 pmcraid_info("IOA requires hard reset\n");
543 pinstance->ioa_hard_reset = 1;
544 }
545
546 /* If unit check is active, trigger the dump */
547 if (intrs & INTRS_IOA_UNIT_CHECK)
548 pinstance->ioa_unit_check = 1;
549}
550
551/**
552 * pmcraid_bist_done - completion function for PCI BIST
553 * @cmd: pointer to reset command
554 * Return Value
c20c4267 555 * none
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556 */
557
558static void pmcraid_ioa_reset(struct pmcraid_cmd *);
559
560static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
561{
562 struct pmcraid_instance *pinstance = cmd->drv_inst;
563 unsigned long lock_flags;
564 int rc;
565 u16 pci_reg;
566
567 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
568
569 /* If PCI config space can't be accessed wait for another two secs */
570 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
c20c4267 571 cmd->time_left > 0) {
89a36810 572 pmcraid_info("BIST not complete, waiting another 2 secs\n");
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573 cmd->timer.expires = jiffies + cmd->time_left;
574 cmd->time_left = 0;
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575 cmd->timer.data = (unsigned long)cmd;
576 cmd->timer.function =
577 (void (*)(unsigned long))pmcraid_bist_done;
578 add_timer(&cmd->timer);
579 } else {
c20c4267 580 cmd->time_left = 0;
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581 pmcraid_info("BIST is complete, proceeding with reset\n");
582 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
583 pmcraid_ioa_reset(cmd);
584 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
585 }
586}
587
588/**
589 * pmcraid_start_bist - starts BIST
590 * @cmd: pointer to reset cmd
591 * Return Value
592 * none
593 */
594static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
595{
596 struct pmcraid_instance *pinstance = cmd->drv_inst;
597 u32 doorbells, intrs;
598
599 /* proceed with bist and wait for 2 seconds */
600 iowrite32(DOORBELL_IOA_START_BIST,
601 pinstance->int_regs.host_ioa_interrupt_reg);
602 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
603 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 604 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
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605 doorbells, intrs);
606
c20c4267 607 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
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608 cmd->timer.data = (unsigned long)cmd;
609 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
610 cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
611 add_timer(&cmd->timer);
612}
613
614/**
615 * pmcraid_reset_alert_done - completion routine for reset_alert
616 * @cmd: pointer to command block used in reset sequence
617 * Return value
618 * None
619 */
620static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
621{
622 struct pmcraid_instance *pinstance = cmd->drv_inst;
623 u32 status = ioread32(pinstance->ioa_status);
624 unsigned long lock_flags;
625
626 /* if the critical operation in progress bit is set or the wait times
627 * out, invoke reset engine to proceed with hard reset. If there is
628 * some more time to wait, restart the timer
629 */
630 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
c20c4267 631 cmd->time_left <= 0) {
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632 pmcraid_info("critical op is reset proceeding with reset\n");
633 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
634 pmcraid_ioa_reset(cmd);
635 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
636 } else {
637 pmcraid_info("critical op is not yet reset waiting again\n");
638 /* restart timer if some more time is available to wait */
c20c4267 639 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
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640 cmd->timer.data = (unsigned long)cmd;
641 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
642 cmd->timer.function =
643 (void (*)(unsigned long))pmcraid_reset_alert_done;
644 add_timer(&cmd->timer);
645 }
646}
647
648/**
649 * pmcraid_reset_alert - alerts IOA for a possible reset
650 * @cmd : command block to be used for reset sequence.
651 *
652 * Return Value
653 * returns 0 if pci config-space is accessible and RESET_DOORBELL is
654 * successfully written to IOA. Returns non-zero in case pci_config_space
655 * is not accessible
656 */
c20c4267 657static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
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658static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
659{
660 struct pmcraid_instance *pinstance = cmd->drv_inst;
661 u32 doorbells;
662 int rc;
663 u16 pci_reg;
664
665 /* If we are able to access IOA PCI config space, alert IOA that we are
666 * going to reset it soon. This enables IOA to preserv persistent error
667 * data if any. In case memory space is not accessible, proceed with
668 * BIST or slot_reset
669 */
670 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
671 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
672
673 /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
674 * reset IOA doesn't generate any interrupts when CRITICAL
675 * OPERATION bit is reset. A timer is started to wait for this
676 * bit to be reset.
677 */
c20c4267 678 cmd->time_left = PMCRAID_RESET_TIMEOUT;
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679 cmd->timer.data = (unsigned long)cmd;
680 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
681 cmd->timer.function =
682 (void (*)(unsigned long))pmcraid_reset_alert_done;
683 add_timer(&cmd->timer);
684
685 iowrite32(DOORBELL_IOA_RESET_ALERT,
686 pinstance->int_regs.host_ioa_interrupt_reg);
687 doorbells =
688 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
689 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
690 } else {
691 pmcraid_info("PCI config is not accessible starting BIST\n");
692 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
693 pmcraid_start_bist(cmd);
694 }
695}
696
697/**
698 * pmcraid_timeout_handler - Timeout handler for internally generated ops
699 *
700 * @cmd : pointer to command structure, that got timedout
701 *
702 * This function blocks host requests and initiates an adapter reset.
703 *
704 * Return value:
705 * None
706 */
707static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
708{
709 struct pmcraid_instance *pinstance = cmd->drv_inst;
710 unsigned long lock_flags;
711
34876402 712 dev_info(&pinstance->pdev->dev,
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713 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
714 cmd->ioa_cb->ioarcb.cdb[0]);
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715
716 /* Command timeouts result in hard reset sequence. The command that got
717 * timed out may be the one used as part of reset sequence. In this
718 * case restart reset sequence using the same command block even if
719 * reset is in progress. Otherwise fail this command and get a free
720 * command block to restart the reset sequence.
721 */
722 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
723 if (!pinstance->ioa_reset_in_progress) {
724 pinstance->ioa_reset_attempts = 0;
725 cmd = pmcraid_get_free_cmd(pinstance);
726
727 /* If we are out of command blocks, just return here itself.
728 * Some other command's timeout handler can do the reset job
729 */
730 if (cmd == NULL) {
731 spin_unlock_irqrestore(pinstance->host->host_lock,
732 lock_flags);
733 pmcraid_err("no free cmnd block for timeout handler\n");
734 return;
735 }
736
737 pinstance->reset_cmd = cmd;
738 pinstance->ioa_reset_in_progress = 1;
739 } else {
740 pmcraid_info("reset is already in progress\n");
741
742 if (pinstance->reset_cmd != cmd) {
743 /* This command should have been given to IOA, this
744 * command will be completed by fail_outstanding_cmds
745 * anyway
746 */
747 pmcraid_err("cmd is pending but reset in progress\n");
748 }
749
750 /* If this command was being used as part of the reset
751 * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
752 * causes fail_outstanding_commands not to return the command
753 * block back to free pool
754 */
755 if (cmd == pinstance->reset_cmd)
756 cmd->cmd_done = pmcraid_ioa_reset;
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757 }
758
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759 /* Notify apps of important IOA bringup/bringdown sequences */
760 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
761 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
762 pmcraid_notify_ioastate(pinstance,
763 PMC_DEVICE_EVENT_RESET_START);
764
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765 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
766 scsi_block_requests(pinstance->host);
767 pmcraid_reset_alert(cmd);
768 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
769}
770
771/**
772 * pmcraid_internal_done - completion routine for internally generated cmds
773 *
774 * @cmd: command that got response from IOA
775 *
776 * Return Value:
777 * none
778 */
779static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
780{
781 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
782 cmd->ioa_cb->ioarcb.cdb[0],
783 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
784
785 /* Some of the internal commands are sent with callers blocking for the
786 * response. Same will be indicated as part of cmd->completion_req
787 * field. Response path needs to wake up any waiters waiting for cmd
788 * completion if this flag is set.
789 */
790 if (cmd->completion_req) {
791 cmd->completion_req = 0;
792 complete(&cmd->wait_for_completion);
793 }
794
795 /* most of the internal commands are completed by caller itself, so
796 * no need to return the command block back to free pool until we are
797 * required to do so (e.g once done with initialization).
798 */
799 if (cmd->release) {
800 cmd->release = 0;
801 pmcraid_return_cmd(cmd);
802 }
803}
804
805/**
806 * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
807 *
808 * @cmd: command that got response from IOA
809 *
810 * This routine is called after driver re-reads configuration table due to a
811 * lost CCN. It returns the command block back to free pool and schedules
812 * worker thread to add/delete devices into the system.
813 *
814 * Return Value:
815 * none
816 */
817static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
818{
819 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
820 cmd->ioa_cb->ioarcb.cdb[0],
821 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
822
823 if (cmd->release) {
824 cmd->release = 0;
825 pmcraid_return_cmd(cmd);
826 }
827 pmcraid_info("scheduling worker for config table reinitialization\n");
828 schedule_work(&cmd->drv_inst->worker_q);
829}
830
831/**
832 * pmcraid_erp_done - Process completion of SCSI error response from device
833 * @cmd: pmcraid_command
834 *
835 * This function copies the sense buffer into the scsi_cmd struct and completes
836 * scsi_cmd by calling scsi_done function.
837 *
838 * Return value:
839 * none
840 */
841static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
842{
843 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
844 struct pmcraid_instance *pinstance = cmd->drv_inst;
845 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
846
847 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
848 scsi_cmd->result |= (DID_ERROR << 16);
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849 scmd_printk(KERN_INFO, scsi_cmd,
850 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
851 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
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852 }
853
854 /* if we had allocated sense buffers for request sense, copy the sense
855 * release the buffers
856 */
857 if (cmd->sense_buffer != NULL) {
858 memcpy(scsi_cmd->sense_buffer,
859 cmd->sense_buffer,
860 SCSI_SENSE_BUFFERSIZE);
861 pci_free_consistent(pinstance->pdev,
862 SCSI_SENSE_BUFFERSIZE,
863 cmd->sense_buffer, cmd->sense_buffer_dma);
864 cmd->sense_buffer = NULL;
865 cmd->sense_buffer_dma = 0;
866 }
867
868 scsi_dma_unmap(scsi_cmd);
869 pmcraid_return_cmd(cmd);
870 scsi_cmd->scsi_done(scsi_cmd);
871}
872
873/**
874 * pmcraid_fire_command - sends an IOA command to adapter
875 *
876 * This function adds the given block into pending command list
877 * and returns without waiting
878 *
879 * @cmd : command to be sent to the device
880 *
881 * Return Value
882 * None
883 */
884static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
885{
886 struct pmcraid_instance *pinstance = cmd->drv_inst;
887 unsigned long lock_flags;
888
889 /* Add this command block to pending cmd pool. We do this prior to
890 * writting IOARCB to ioarrin because IOA might complete the command
891 * by the time we are about to add it to the list. Response handler
c20c4267 892 * (isr/tasklet) looks for cmd block in the pending pending list.
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893 */
894 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
895 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
896 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
897 atomic_inc(&pinstance->outstanding_cmds);
898
899 /* driver writes lower 32-bit value of IOARCB address only */
900 mb();
45c80be6 901 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
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902}
903
904/**
905 * pmcraid_send_cmd - fires a command to IOA
906 *
907 * This function also sets up timeout function, and command completion
908 * function
909 *
910 * @cmd: pointer to the command block to be fired to IOA
911 * @cmd_done: command completion function, called once IOA responds
912 * @timeout: timeout to wait for this command completion
913 * @timeout_func: timeout handler
914 *
915 * Return value
916 * none
917 */
918static void pmcraid_send_cmd(
919 struct pmcraid_cmd *cmd,
920 void (*cmd_done) (struct pmcraid_cmd *),
921 unsigned long timeout,
922 void (*timeout_func) (struct pmcraid_cmd *)
923)
924{
925 /* initialize done function */
926 cmd->cmd_done = cmd_done;
927
928 if (timeout_func) {
929 /* setup timeout handler */
930 cmd->timer.data = (unsigned long)cmd;
931 cmd->timer.expires = jiffies + timeout;
932 cmd->timer.function = (void (*)(unsigned long))timeout_func;
933 add_timer(&cmd->timer);
934 }
935
936 /* fire the command to IOA */
937 _pmcraid_fire_command(cmd);
938}
939
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940/**
941 * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
942 * @cmd: pointer to the command block used for sending IOA shutdown command
943 *
944 * Return value
945 * None
946 */
947static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
948{
949 struct pmcraid_instance *pinstance = cmd->drv_inst;
950 unsigned long lock_flags;
951
952 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
953 pmcraid_ioa_reset(cmd);
954 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
955}
956
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957/**
958 * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
959 *
960 * @cmd: pointer to the command block used as part of reset sequence
961 *
962 * Return Value
963 * None
964 */
965static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
966{
967 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
968 cmd->ioa_cb->ioarcb.cdb[0],
969 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
970
971 /* Note that commands sent during reset require next command to be sent
972 * to IOA. Hence reinit the done function as well as timeout function
973 */
974 pmcraid_reinit_cmdblk(cmd);
975 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
976 cmd->ioa_cb->ioarcb.resource_handle =
977 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
978 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
979 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
980
981 /* fire shutdown command to hardware. */
982 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
983 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
984
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985 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
986
987 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
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988 PMCRAID_SHUTDOWN_TIMEOUT,
989 pmcraid_timeout_handler);
990}
991
992/**
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993 * pmcraid_get_fwversion_done - completion function for get_fwversion
994 *
995 * @cmd: pointer to command block used to send INQUIRY command
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996 *
997 * Return Value
c20c4267 998 * none
89a36810 999 */
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1000static void pmcraid_querycfg(struct pmcraid_cmd *);
1001
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1002static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
1003{
1004 struct pmcraid_instance *pinstance = cmd->drv_inst;
1005 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1006 unsigned long lock_flags;
1007
1008 /* configuration table entry size depends on firmware version. If fw
1009 * version is not known, it is not possible to interpret IOA config
1010 * table
1011 */
1012 if (ioasc) {
1013 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
1014 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1015 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1016 pmcraid_reset_alert(cmd);
1017 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1018 } else {
1019 pmcraid_querycfg(cmd);
1020 }
1021}
1022
1023/**
1024 * pmcraid_get_fwversion - reads firmware version information
1025 *
1026 * @cmd: pointer to command block used to send INQUIRY command
1027 *
1028 * Return Value
1029 * none
1030 */
1031static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1032{
1033 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1034 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
1035 struct pmcraid_instance *pinstance = cmd->drv_inst;
1036 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1037
1038 pmcraid_reinit_cmdblk(cmd);
1039 ioarcb->request_type = REQ_TYPE_SCSI;
1040 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1041 ioarcb->cdb[0] = INQUIRY;
1042 ioarcb->cdb[1] = 1;
1043 ioarcb->cdb[2] = 0xD0;
1044 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1045 ioarcb->cdb[4] = data_size & 0xFF;
1046
1047 /* Since entire inquiry data it can be part of IOARCB itself
1048 */
1049 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1050 offsetof(struct pmcraid_ioarcb,
1051 add_data.u.ioadl[0]));
1052 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 1053 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
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1054
1055 ioarcb->request_flags0 |= NO_LINK_DESCS;
1056 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1057 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1058 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1059 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1060 ioadl->data_len = cpu_to_le32(data_size);
1061
1062 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1063 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1064}
1065
1066/**
1067 * pmcraid_identify_hrrq - registers host rrq buffers with IOA
1068 * @cmd: pointer to command block to be used for identify hrrq
1069 *
1070 * Return Value
1071 * none
1072 */
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1073static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1074{
1075 struct pmcraid_instance *pinstance = cmd->drv_inst;
1076 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
c20c4267 1077 int index = cmd->hrrq_index;
89a36810 1078 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
45c80be6 1079 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
c20c4267 1080 void (*done_function)(struct pmcraid_cmd *);
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1081
1082 pmcraid_reinit_cmdblk(cmd);
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1083 cmd->hrrq_index = index + 1;
1084
1085 if (cmd->hrrq_index < pinstance->num_hrrq) {
1086 done_function = pmcraid_identify_hrrq;
1087 } else {
1088 cmd->hrrq_index = 0;
1089 done_function = pmcraid_get_fwversion;
1090 }
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1091
1092 /* Initialize ioarcb */
1093 ioarcb->request_type = REQ_TYPE_IOACMD;
1094 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1095
1096 /* initialize the hrrq number where IOA will respond to this command */
1097 ioarcb->hrrq_id = index;
1098 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1099 ioarcb->cdb[1] = index;
1100
1101 /* IOA expects 64-bit pci address to be written in B.E format
1102 * (i.e cdb[2]=MSByte..cdb[9]=LSB.
1103 */
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1104 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1105 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
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1106
1107 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1108 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1109
1110 /* Subsequent commands require HRRQ identification to be successful.
1111 * Note that this gets called even during reset from SCSI mid-layer
1112 * or tasklet
1113 */
c20c4267 1114 pmcraid_send_cmd(cmd, done_function,
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1115 PMCRAID_INTERNAL_TIMEOUT,
1116 pmcraid_timeout_handler);
1117}
1118
1119static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1120static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1121
1122/**
1123 * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
1124 *
1125 * @cmd: initialized command block pointer
1126 *
1127 * Return Value
1128 * none
1129 */
1130static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1131{
1132 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1133 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1134 else
1135 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1136
1137 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1138}
1139
1140/**
1141 * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
1142 *
1143 * @pinstance: pointer to adapter instance structure
1144 * @type: HCAM type
1145 *
1146 * Return Value
1147 * pointer to initialized pmcraid_cmd structure or NULL
1148 */
1149static struct pmcraid_cmd *pmcraid_init_hcam
1150(
1151 struct pmcraid_instance *pinstance,
1152 u8 type
1153)
1154{
1155 struct pmcraid_cmd *cmd;
1156 struct pmcraid_ioarcb *ioarcb;
1157 struct pmcraid_ioadl_desc *ioadl;
1158 struct pmcraid_hostrcb *hcam;
1159 void (*cmd_done) (struct pmcraid_cmd *);
1160 dma_addr_t dma;
1161 int rcb_size;
1162
1163 cmd = pmcraid_get_free_cmd(pinstance);
1164
1165 if (!cmd) {
1166 pmcraid_err("no free command blocks for hcam\n");
1167 return cmd;
1168 }
1169
1170 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
c20c4267 1171 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
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1172 cmd_done = pmcraid_process_ccn;
1173 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1174 hcam = &pinstance->ccn;
1175 } else {
1176 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1177 cmd_done = pmcraid_process_ldn;
1178 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1179 hcam = &pinstance->ldn;
1180 }
1181
1182 /* initialize command pointer used for HCAM registration */
1183 hcam->cmd = cmd;
1184
1185 ioarcb = &cmd->ioa_cb->ioarcb;
1186 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1187 offsetof(struct pmcraid_ioarcb,
1188 add_data.u.ioadl[0]));
1189 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1190 ioadl = ioarcb->add_data.u.ioadl;
1191
1192 /* Initialize ioarcb */
1193 ioarcb->request_type = REQ_TYPE_HCAM;
1194 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1195 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1196 ioarcb->cdb[1] = type;
1197 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1198 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1199
1200 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1201
88197966 1202 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
89a36810 1203 ioadl[0].data_len = cpu_to_le32(rcb_size);
45c80be6 1204 ioadl[0].address = cpu_to_le64(dma);
89a36810
AR
1205
1206 cmd->cmd_done = cmd_done;
1207 return cmd;
1208}
1209
1210/**
1211 * pmcraid_send_hcam - Send an HCAM to IOA
1212 * @pinstance: ioa config struct
1213 * @type: HCAM type
1214 *
1215 * This function will send a Host Controlled Async command to IOA.
1216 *
1217 * Return value:
c20c4267 1218 * none
89a36810
AR
1219 */
1220static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1221{
1222 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1223 pmcraid_send_hcam_cmd(cmd);
1224}
1225
1226
1227/**
1228 * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
1229 *
1230 * @cmd: pointer to cmd that is used as cancelling command
1231 * @cmd_to_cancel: pointer to the command that needs to be cancelled
1232 */
1233static void pmcraid_prepare_cancel_cmd(
1234 struct pmcraid_cmd *cmd,
1235 struct pmcraid_cmd *cmd_to_cancel
1236)
1237{
1238 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
45c80be6
AB
1239 __be64 ioarcb_addr;
1240
1241 /* IOARCB address of the command to be cancelled is given in
1242 * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
1243 * IOARCB address are not masked.
1244 */
1245 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
89a36810
AR
1246
1247 /* Get the resource handle to where the command to be aborted has been
1248 * sent.
1249 */
1250 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1251 ioarcb->request_type = REQ_TYPE_IOACMD;
1252 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1253 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1254
89a36810
AR
1255 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1256}
1257
1258/**
1259 * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
1260 *
1261 * @cmd: command to be used as cancelling command
1262 * @type: HCAM type
1263 * @cmd_done: op done function for the cancelling command
1264 */
1265static void pmcraid_cancel_hcam(
1266 struct pmcraid_cmd *cmd,
1267 u8 type,
1268 void (*cmd_done) (struct pmcraid_cmd *)
1269)
1270{
1271 struct pmcraid_instance *pinstance;
1272 struct pmcraid_hostrcb *hcam;
1273
1274 pinstance = cmd->drv_inst;
1275 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1276 &pinstance->ldn : &pinstance->ccn;
1277
1278 /* prepare for cancelling previous hcam command. If the HCAM is
1279 * currently not pending with IOA, we would have hcam->cmd as non-null
1280 */
1281 if (hcam->cmd == NULL)
1282 return;
1283
1284 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1285
1286 /* writing to IOARRIN must be protected by host_lock, as mid-layer
1287 * schedule queuecommand while we are doing this
1288 */
1289 pmcraid_send_cmd(cmd, cmd_done,
1290 PMCRAID_INTERNAL_TIMEOUT,
1291 pmcraid_timeout_handler);
1292}
1293
1294/**
1295 * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
1296 *
1297 * @cmd: command block to be used for cancelling the HCAM
1298 */
1299static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1300{
1301 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1302 cmd->ioa_cb->ioarcb.cdb[0],
1303 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1304
1305 pmcraid_reinit_cmdblk(cmd);
1306
1307 pmcraid_cancel_hcam(cmd,
1308 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1309 pmcraid_ioa_shutdown);
1310}
1311
1312/**
1313 * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
1314 *
1315 * @cmd: command block to be used for cancelling the HCAM
1316 */
1317static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1318{
1319 pmcraid_cancel_hcam(cmd,
1320 PMCRAID_HCAM_CODE_LOG_DATA,
1321 pmcraid_cancel_ccn);
1322}
1323
1324/**
1325 * pmcraid_expose_resource - check if the resource can be exposed to OS
1326 *
c20c4267 1327 * @fw_version: firmware version code
89a36810
AR
1328 * @cfgte: pointer to configuration table entry of the resource
1329 *
1330 * Return value:
c20c4267 1331 * true if resource can be added to midlayer, false(0) otherwise
89a36810 1332 */
c20c4267
AR
1333static int pmcraid_expose_resource(u16 fw_version,
1334 struct pmcraid_config_table_entry *cfgte)
89a36810
AR
1335{
1336 int retval = 0;
1337
c20c4267
AR
1338 if (cfgte->resource_type == RES_TYPE_VSET) {
1339 if (fw_version <= PMCRAID_FW_VERSION_1)
1340 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1341 else
1342 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1343 (cfgte->unique_flags1 & 0x80) == 0);
1344
1345 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
89a36810
AR
1346 retval = (RES_BUS(cfgte->resource_address) !=
1347 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1348 return retval;
1349}
1350
1351/* attributes supported by pmcraid_event_family */
1352enum {
1353 PMCRAID_AEN_ATTR_UNSPEC,
1354 PMCRAID_AEN_ATTR_EVENT,
1355 __PMCRAID_AEN_ATTR_MAX,
1356};
1357#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1358
1359/* commands supported by pmcraid_event_family */
1360enum {
1361 PMCRAID_AEN_CMD_UNSPEC,
1362 PMCRAID_AEN_CMD_EVENT,
1363 __PMCRAID_AEN_CMD_MAX,
1364};
1365#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1366
5e53e689
JB
1367static struct genl_multicast_group pmcraid_mcgrps[] = {
1368 { .name = "events", /* not really used - see ID discussion below */ },
1369};
1370
56989f6d 1371static struct genl_family pmcraid_event_family __ro_after_init = {
489111e5 1372 .module = THIS_MODULE,
89a36810
AR
1373 .name = "pmcraid",
1374 .version = 1,
5e53e689
JB
1375 .maxattr = PMCRAID_AEN_ATTR_MAX,
1376 .mcgrps = pmcraid_mcgrps,
1377 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
89a36810
AR
1378};
1379
1380/**
1381 * pmcraid_netlink_init - registers pmcraid_event_family
1382 *
1383 * Return value:
c20c4267
AR
1384 * 0 if the pmcraid_event_family is successfully registered
1385 * with netlink generic, non-zero otherwise
89a36810 1386 */
56989f6d 1387static int __init pmcraid_netlink_init(void)
89a36810
AR
1388{
1389 int result;
1390
1391 result = genl_register_family(&pmcraid_event_family);
1392
1393 if (result)
1394 return result;
1395
1396 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1397 pmcraid_event_family.id);
1398
1399 return result;
1400}
1401
1402/**
1403 * pmcraid_netlink_release - unregisters pmcraid_event_family
1404 *
1405 * Return value:
c20c4267 1406 * none
89a36810
AR
1407 */
1408static void pmcraid_netlink_release(void)
1409{
1410 genl_unregister_family(&pmcraid_event_family);
1411}
1412
1413/**
1414 * pmcraid_notify_aen - sends event msg to user space application
1415 * @pinstance: pointer to adapter instance structure
1416 * @type: HCAM type
1417 *
1418 * Return value:
1419 * 0 if success, error value in case of any failure.
1420 */
c20c4267
AR
1421static int pmcraid_notify_aen(
1422 struct pmcraid_instance *pinstance,
1423 struct pmcraid_aen_msg *aen_msg,
1424 u32 data_size
1425)
89a36810
AR
1426{
1427 struct sk_buff *skb;
89a36810 1428 void *msg_header;
c20c4267 1429 u32 total_size, nla_genl_hdr_total_size;
89a36810
AR
1430 int result;
1431
89a36810
AR
1432 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1433 MINOR(pinstance->cdev.dev));
1434 aen_msg->length = data_size;
c20c4267 1435
89a36810
AR
1436 data_size += sizeof(*aen_msg);
1437
1438 total_size = nla_total_size(data_size);
c20c4267
AR
1439 /* Add GENL_HDR to total_size */
1440 nla_genl_hdr_total_size =
1441 (total_size + (GENL_HDRLEN +
1442 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1443 + NLMSG_HDRLEN);
1444 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
89a36810
AR
1445
1446
1447 if (!skb) {
1448 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1449 total_size);
1450 return -ENOMEM;
1451 }
1452
1453 /* add the genetlink message header */
1454 msg_header = genlmsg_put(skb, 0, 0,
1455 &pmcraid_event_family, 0,
1456 PMCRAID_AEN_CMD_EVENT);
1457 if (!msg_header) {
1458 pmcraid_err("failed to copy command details\n");
1459 nlmsg_free(skb);
1460 return -ENOMEM;
1461 }
1462
1463 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1464
1465 if (result) {
c20c4267 1466 pmcraid_err("failed to copy AEN attribute data\n");
89a36810
AR
1467 nlmsg_free(skb);
1468 return -EINVAL;
1469 }
1470
1471 /* send genetlink multicast message to notify appplications */
053c095a 1472 genlmsg_end(skb, msg_header);
89a36810 1473
5e53e689
JB
1474 result = genlmsg_multicast(&pmcraid_event_family, skb,
1475 0, 0, GFP_ATOMIC);
89a36810
AR
1476
1477 /* If there are no listeners, genlmsg_multicast may return non-zero
1478 * value.
1479 */
1480 if (result)
c20c4267 1481 pmcraid_info("error (%x) sending aen event message\n", result);
89a36810
AR
1482 return result;
1483}
1484
c20c4267
AR
1485/**
1486 * pmcraid_notify_ccn - notifies about CCN event msg to user space
1487 * @pinstance: pointer adapter instance structure
1488 *
1489 * Return value:
1490 * 0 if success, error value in case of any failure
1491 */
1492static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1493{
1494 return pmcraid_notify_aen(pinstance,
1495 pinstance->ccn.msg,
45c80be6 1496 le32_to_cpu(pinstance->ccn.hcam->data_len) +
c20c4267
AR
1497 sizeof(struct pmcraid_hcam_hdr));
1498}
1499
1500/**
1501 * pmcraid_notify_ldn - notifies about CCN event msg to user space
1502 * @pinstance: pointer adapter instance structure
1503 *
1504 * Return value:
1505 * 0 if success, error value in case of any failure
1506 */
1507static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1508{
1509 return pmcraid_notify_aen(pinstance,
1510 pinstance->ldn.msg,
45c80be6 1511 le32_to_cpu(pinstance->ldn.hcam->data_len) +
c20c4267
AR
1512 sizeof(struct pmcraid_hcam_hdr));
1513}
1514
1515/**
1516 * pmcraid_notify_ioastate - sends IOA state event msg to user space
1517 * @pinstance: pointer adapter instance structure
1518 * @evt: controller state event to be sent
1519 *
1520 * Return value:
1521 * 0 if success, error value in case of any failure
1522 */
1523static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1524{
1525 pinstance->scn.ioa_state = evt;
1526 pmcraid_notify_aen(pinstance,
1527 &pinstance->scn.msg,
1528 sizeof(u32));
1529}
1530
89a36810
AR
1531/**
1532 * pmcraid_handle_config_change - Handle a config change from the adapter
1533 * @pinstance: pointer to per adapter instance structure
1534 *
1535 * Return value:
1536 * none
1537 */
729c8456 1538
89a36810
AR
1539static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1540{
1541 struct pmcraid_config_table_entry *cfg_entry;
1542 struct pmcraid_hcam_ccn *ccn_hcam;
1543 struct pmcraid_cmd *cmd;
1544 struct pmcraid_cmd *cfgcmd;
1545 struct pmcraid_resource_entry *res = NULL;
89a36810
AR
1546 unsigned long lock_flags;
1547 unsigned long host_lock_flags;
729c8456
AR
1548 u32 new_entry = 1;
1549 u32 hidden_entry = 0;
c20c4267 1550 u16 fw_version;
89a36810
AR
1551 int rc;
1552
1553 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1554 cfg_entry = &ccn_hcam->cfg_entry;
c20c4267 1555 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810 1556
592488a3
AR
1557 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1558 res: %x:%x:%x:%x\n",
45c80be6 1559 le32_to_cpu(pinstance->ccn.hcam->ilid),
89a36810 1560 pinstance->ccn.hcam->op_code,
45c80be6
AB
1561 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1562 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
89a36810
AR
1563 pinstance->ccn.hcam->notification_type,
1564 pinstance->ccn.hcam->notification_lost,
1565 pinstance->ccn.hcam->flags,
1566 pinstance->host->unique_id,
1567 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1568 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1569 RES_BUS(cfg_entry->resource_address)),
c20c4267
AR
1570 RES_IS_VSET(*cfg_entry) ?
1571 (fw_version <= PMCRAID_FW_VERSION_1 ?
1572 cfg_entry->unique_flags1 :
45c80be6 1573 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
89a36810
AR
1574 RES_TARGET(cfg_entry->resource_address),
1575 RES_LUN(cfg_entry->resource_address));
1576
1577
1578 /* If this HCAM indicates a lost notification, read the config table */
1579 if (pinstance->ccn.hcam->notification_lost) {
1580 cfgcmd = pmcraid_get_free_cmd(pinstance);
1581 if (cfgcmd) {
1582 pmcraid_info("lost CCN, reading config table\b");
1583 pinstance->reinit_cfg_table = 1;
1584 pmcraid_querycfg(cfgcmd);
1585 } else {
1586 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1587 }
1588 goto out_notify_apps;
1589 }
1590
1591 /* If this resource is not going to be added to mid-layer, just notify
729c8456
AR
1592 * applications and return. If this notification is about hiding a VSET
1593 * resource, check if it was exposed already.
89a36810 1594 */
729c8456
AR
1595 if (pinstance->ccn.hcam->notification_type ==
1596 NOTIFICATION_TYPE_ENTRY_CHANGED &&
c20c4267
AR
1597 cfg_entry->resource_type == RES_TYPE_VSET) {
1598
1599 if (fw_version <= PMCRAID_FW_VERSION_1)
1600 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1601 else
1602 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1603
1604 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
89a36810 1605 goto out_notify_apps;
c20c4267 1606 }
89a36810
AR
1607
1608 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1609 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1610 rc = memcmp(&res->cfg_entry.resource_address,
1611 &cfg_entry->resource_address,
1612 sizeof(cfg_entry->resource_address));
1613 if (!rc) {
1614 new_entry = 0;
1615 break;
1616 }
1617 }
1618
1619 if (new_entry) {
1620
729c8456
AR
1621 if (hidden_entry) {
1622 spin_unlock_irqrestore(&pinstance->resource_lock,
1623 lock_flags);
1624 goto out_notify_apps;
1625 }
1626
89a36810
AR
1627 /* If there are more number of resources than what driver can
1628 * manage, do not notify the applications about the CCN. Just
1629 * ignore this notifications and re-register the same HCAM
1630 */
1631 if (list_empty(&pinstance->free_res_q)) {
1632 spin_unlock_irqrestore(&pinstance->resource_lock,
1633 lock_flags);
1634 pmcraid_err("too many resources attached\n");
1635 spin_lock_irqsave(pinstance->host->host_lock,
1636 host_lock_flags);
1637 pmcraid_send_hcam(pinstance,
1638 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1639 spin_unlock_irqrestore(pinstance->host->host_lock,
1640 host_lock_flags);
1641 return;
1642 }
1643
1644 res = list_entry(pinstance->free_res_q.next,
1645 struct pmcraid_resource_entry, queue);
1646
1647 list_del(&res->queue);
1648 res->scsi_dev = NULL;
1649 res->reset_progress = 0;
1650 list_add_tail(&res->queue, &pinstance->used_res_q);
1651 }
1652
c20c4267 1653 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
89a36810
AR
1654
1655 if (pinstance->ccn.hcam->notification_type ==
729c8456 1656 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
89a36810 1657 if (res->scsi_dev) {
c20c4267
AR
1658 if (fw_version <= PMCRAID_FW_VERSION_1)
1659 res->cfg_entry.unique_flags1 &= 0x7F;
1660 else
45c80be6 1661 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
89a36810
AR
1662 res->change_detected = RES_CHANGE_DEL;
1663 res->cfg_entry.resource_handle =
1664 PMCRAID_INVALID_RES_HANDLE;
1665 schedule_work(&pinstance->worker_q);
1666 } else {
1667 /* This may be one of the non-exposed resources */
1668 list_move_tail(&res->queue, &pinstance->free_res_q);
1669 }
1670 } else if (!res->scsi_dev) {
1671 res->change_detected = RES_CHANGE_ADD;
1672 schedule_work(&pinstance->worker_q);
1673 }
1674 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1675
1676out_notify_apps:
1677
1678 /* Notify configuration changes to registered applications.*/
1679 if (!pmcraid_disable_aen)
c20c4267 1680 pmcraid_notify_ccn(pinstance);
89a36810
AR
1681
1682 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1683 if (cmd)
1684 pmcraid_send_hcam_cmd(cmd);
1685}
1686
1687/**
1688 * pmcraid_get_error_info - return error string for an ioasc
1689 * @ioasc: ioasc code
1690 * Return Value
1691 * none
1692 */
1693static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1694{
1695 int i;
1696 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1697 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1698 return &pmcraid_ioasc_error_table[i];
1699 }
1700 return NULL;
1701}
1702
1703/**
1704 * pmcraid_ioasc_logger - log IOASC information based user-settings
1705 * @ioasc: ioasc code
1706 * @cmd: pointer to command that resulted in 'ioasc'
1707 */
61b96d5b 1708static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
89a36810
AR
1709{
1710 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1711
1712 if (error_info == NULL ||
1713 cmd->drv_inst->current_log_level < error_info->log_level)
1714 return;
1715
1716 /* log the error string */
c20c4267 1717 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
89a36810 1718 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6
AB
1719 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1720 ioasc, error_info->error_string);
89a36810
AR
1721}
1722
1723/**
1724 * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
1725 *
1726 * @pinstance: pointer to per adapter instance structure
1727 *
1728 * Return value:
1729 * none
1730 */
1731static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1732{
1733 struct pmcraid_hcam_ldn *hcam_ldn;
1734 u32 ioasc;
1735
1736 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1737
1738 pmcraid_info
1739 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1740 pinstance->ldn.hcam->ilid,
1741 pinstance->ldn.hcam->op_code,
1742 pinstance->ldn.hcam->notification_type,
1743 pinstance->ldn.hcam->notification_lost,
1744 pinstance->ldn.hcam->flags,
1745 pinstance->ldn.hcam->overlay_id);
1746
1747 /* log only the errors, no need to log informational log entries */
1748 if (pinstance->ldn.hcam->notification_type !=
1749 NOTIFICATION_TYPE_ERROR_LOG)
1750 return;
1751
1752 if (pinstance->ldn.hcam->notification_lost ==
1753 HOSTRCB_NOTIFICATIONS_LOST)
34876402 1754 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
89a36810
AR
1755
1756 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1757
1758 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1759 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
34876402 1760 dev_info(&pinstance->pdev->dev,
89a36810
AR
1761 "UnitAttention due to IOA Bus Reset\n");
1762 scsi_report_bus_reset(
1763 pinstance->host,
1764 RES_BUS(hcam_ldn->error_log.fd_ra));
1765 }
1766
1767 return;
1768}
1769
1770/**
1771 * pmcraid_process_ccn - Op done function for a CCN.
1772 * @cmd: pointer to command struct
1773 *
1774 * This function is the op done function for a configuration
1775 * change notification
1776 *
1777 * Return value:
1778 * none
1779 */
1780static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1781{
1782 struct pmcraid_instance *pinstance = cmd->drv_inst;
1783 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1784 unsigned long lock_flags;
1785
1786 pinstance->ccn.cmd = NULL;
1787 pmcraid_return_cmd(cmd);
1788
1789 /* If driver initiated IOA reset happened while this hcam was pending
1790 * with IOA, or IOA bringdown sequence is in progress, no need to
1791 * re-register the hcam
1792 */
1793 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1794 atomic_read(&pinstance->ccn.ignore) == 1) {
1795 return;
1796 } else if (ioasc) {
34876402 1797 dev_info(&pinstance->pdev->dev,
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AR
1798 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1799 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1800 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1801 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1802 } else {
1803 pmcraid_handle_config_change(pinstance);
1804 }
1805}
1806
1807/**
1808 * pmcraid_process_ldn - op done function for an LDN
1809 * @cmd: pointer to command block
1810 *
1811 * Return value
1812 * none
1813 */
1814static void pmcraid_initiate_reset(struct pmcraid_instance *);
592488a3 1815static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
89a36810
AR
1816
1817static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1818{
1819 struct pmcraid_instance *pinstance = cmd->drv_inst;
1820 struct pmcraid_hcam_ldn *ldn_hcam =
1821 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1822 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1823 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1824 unsigned long lock_flags;
1825
1826 /* return the command block back to freepool */
1827 pinstance->ldn.cmd = NULL;
1828 pmcraid_return_cmd(cmd);
1829
1830 /* If driver initiated IOA reset happened while this hcam was pending
1831 * with IOA, no need to re-register the hcam as reset engine will do it
1832 * once reset sequence is complete
1833 */
1834 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1835 atomic_read(&pinstance->ccn.ignore) == 1) {
1836 return;
1837 } else if (!ioasc) {
1838 pmcraid_handle_error_log(pinstance);
1839 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1840 spin_lock_irqsave(pinstance->host->host_lock,
1841 lock_flags);
1842 pmcraid_initiate_reset(pinstance);
1843 spin_unlock_irqrestore(pinstance->host->host_lock,
1844 lock_flags);
1845 return;
1846 }
592488a3
AR
1847 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1848 pinstance->timestamp_error = 1;
1849 pmcraid_set_timestamp(cmd);
1850 }
89a36810 1851 } else {
34876402 1852 dev_info(&pinstance->pdev->dev,
89a36810
AR
1853 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1854 }
1855 /* send netlink message for HCAM notification if enabled */
1856 if (!pmcraid_disable_aen)
c20c4267 1857 pmcraid_notify_ldn(pinstance);
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AR
1858
1859 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1860 if (cmd)
1861 pmcraid_send_hcam_cmd(cmd);
1862}
1863
1864/**
1865 * pmcraid_register_hcams - register HCAMs for CCN and LDN
1866 *
1867 * @pinstance: pointer per adapter instance structure
1868 *
1869 * Return Value
1870 * none
1871 */
1872static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1873{
1874 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1875 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1876}
1877
1878/**
1879 * pmcraid_unregister_hcams - cancel HCAMs registered already
1880 * @cmd: pointer to command used as part of reset sequence
1881 */
1882static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1883{
1884 struct pmcraid_instance *pinstance = cmd->drv_inst;
1885
1886 /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
1887 * handling hcam response though it is not necessary. In order to
1888 * prevent this, set 'ignore', so that bring-down sequence doesn't
1889 * re-send any more hcams
1890 */
1891 atomic_set(&pinstance->ccn.ignore, 1);
1892 atomic_set(&pinstance->ldn.ignore, 1);
1893
1894 /* If adapter reset was forced as part of runtime reset sequence,
c20c4267
AR
1895 * start the reset sequence. Reset will be triggered even in case
1896 * IOA unit_check.
89a36810 1897 */
c20c4267
AR
1898 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1899 pinstance->ioa_unit_check) {
89a36810 1900 pinstance->force_ioa_reset = 0;
c20c4267 1901 pinstance->ioa_unit_check = 0;
89a36810
AR
1902 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1903 pmcraid_reset_alert(cmd);
1904 return;
1905 }
1906
1907 /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
1908 * one after the other. So CCN cancellation will be triggered by
1909 * pmcraid_cancel_ldn itself.
1910 */
1911 pmcraid_cancel_ldn(cmd);
1912}
1913
1914/**
1915 * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
1916 * @pinstance: pointer to adapter instance structure
1917 * Return Value
1918 * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
1919 */
1920static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1921
1922static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1923{
1924 u32 intrs;
1925
1926 pmcraid_reinit_buffers(pinstance);
1927 intrs = pmcraid_read_interrupts(pinstance);
1928
1929 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1930
1931 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
c20c4267
AR
1932 if (!pinstance->interrupt_mode) {
1933 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1934 pinstance->int_regs.
1935 ioa_host_interrupt_mask_reg);
1936 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1937 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1938 }
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1939 return 1;
1940 } else {
1941 return 0;
1942 }
1943}
1944
1945/**
1946 * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
1947 * @cmd : pointer to reset command block
1948 *
1949 * Return Value
1950 * none
1951 */
1952static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1953{
1954 struct pmcraid_instance *pinstance = cmd->drv_inst;
1955 u32 int_reg;
1956 u32 doorbell;
1957
1958 /* There will be an interrupt when Transition to Operational bit is
1959 * set so tasklet would execute next reset task. The timeout handler
1960 * would re-initiate a reset
1961 */
1962 cmd->cmd_done = pmcraid_ioa_reset;
1963 cmd->timer.data = (unsigned long)cmd;
1964 cmd->timer.expires = jiffies +
1965 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
1966 cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
1967
1968 if (!timer_pending(&cmd->timer))
1969 add_timer(&cmd->timer);
1970
1971 /* Enable destructive diagnostics on IOA if it is not yet in
1972 * operational state
1973 */
1974 doorbell = DOORBELL_RUNTIME_RESET |
1975 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1976
c20c4267
AR
1977 /* Since we do RESET_ALERT and Start BIST we have to again write
1978 * MSIX Doorbell to indicate the interrupt mode
1979 */
1980 if (pinstance->interrupt_mode) {
1981 iowrite32(DOORBELL_INTR_MODE_MSIX,
1982 pinstance->int_regs.host_ioa_interrupt_reg);
1983 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1984 }
1985
89a36810 1986 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267 1987 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
89a36810 1988 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 1989
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AR
1990 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1991 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1992 int_reg);
1993}
1994
1995/**
1996 * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
1997 *
1998 * @pinstance: pointer to adapter instance structure
1999 *
2000 * Return Value
2001 * none
2002 */
2003static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
2004{
2005 pmcraid_info("%s is not yet implemented\n", __func__);
2006}
2007
2008/**
2009 * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
2010 * @pinstance: pointer to adapter instance structure
2011 *
2012 * This function fails all outstanding ops. If they are submitted to IOA
2013 * already, it sends cancel all messages if IOA is still accepting IOARCBs,
2014 * otherwise just completes the commands and returns the cmd blocks to free
2015 * pool.
2016 *
2017 * Return value:
2018 * none
2019 */
2020static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
2021{
2022 struct pmcraid_cmd *cmd, *temp;
2023 unsigned long lock_flags;
2024
2025 /* pending command list is protected by pending_pool_lock. Its
2026 * traversal must be done as within this lock
2027 */
2028 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2029 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
2030 free_list) {
2031 list_del(&cmd->free_list);
2032 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2033 lock_flags);
2034 cmd->ioa_cb->ioasa.ioasc =
2035 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2036 cmd->ioa_cb->ioasa.ilid =
45c80be6 2037 cpu_to_le32(PMCRAID_DRIVER_ILID);
89a36810
AR
2038
2039 /* In case the command timer is still running */
2040 del_timer(&cmd->timer);
2041
2042 /* If this is an IO command, complete it by invoking scsi_done
2043 * function. If this is one of the internal commands other
2044 * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
2045 * complete it
2046 */
2047 if (cmd->scsi_cmd) {
2048
2049 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2050 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2051
2052 scsi_cmd->result |= DID_ERROR << 16;
2053
2054 scsi_dma_unmap(scsi_cmd);
2055 pmcraid_return_cmd(cmd);
2056
89a36810
AR
2057 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2058 le32_to_cpu(resp) >> 2,
2059 cmd->ioa_cb->ioarcb.cdb[0],
2060 scsi_cmd->result);
2061 scsi_cmd->scsi_done(scsi_cmd);
2062 } else if (cmd->cmd_done == pmcraid_internal_done ||
2063 cmd->cmd_done == pmcraid_erp_done) {
2064 cmd->cmd_done(cmd);
c20c4267
AR
2065 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2066 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
89a36810
AR
2067 pmcraid_return_cmd(cmd);
2068 }
2069
2070 atomic_dec(&pinstance->outstanding_cmds);
2071 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2072 }
2073
2074 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2075}
2076
2077/**
2078 * pmcraid_ioa_reset - Implementation of IOA reset logic
2079 *
2080 * @cmd: pointer to the cmd block to be used for entire reset process
2081 *
2082 * This function executes most of the steps required for IOA reset. This gets
2083 * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
25985edc 2084 * 'eh_' thread. Access to variables used for controlling the reset sequence is
89a36810
AR
2085 * synchronized using host lock. Various functions called during reset process
2086 * would make use of a single command block, pointer to which is also stored in
2087 * adapter instance structure.
2088 *
2089 * Return Value
2090 * None
2091 */
2092static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2093{
2094 struct pmcraid_instance *pinstance = cmd->drv_inst;
2095 u8 reset_complete = 0;
2096
2097 pinstance->ioa_reset_in_progress = 1;
2098
2099 if (pinstance->reset_cmd != cmd) {
2100 pmcraid_err("reset is called with different command block\n");
2101 pinstance->reset_cmd = cmd;
2102 }
2103
2104 pmcraid_info("reset_engine: state = %d, command = %p\n",
2105 pinstance->ioa_state, cmd);
2106
2107 switch (pinstance->ioa_state) {
2108
2109 case IOA_STATE_DEAD:
2110 /* If IOA is offline, whatever may be the reset reason, just
2111 * return. callers might be waiting on the reset wait_q, wake
2112 * up them
2113 */
2114 pmcraid_err("IOA is offline no reset is possible\n");
2115 reset_complete = 1;
2116 break;
2117
2118 case IOA_STATE_IN_BRINGDOWN:
2119 /* we enter here, once ioa shutdown command is processed by IOA
2120 * Alert IOA for a possible reset. If reset alert fails, IOA
2121 * goes through hard-reset
2122 */
2123 pmcraid_disable_interrupts(pinstance, ~0);
2124 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2125 pmcraid_reset_alert(cmd);
2126 break;
2127
2128 case IOA_STATE_UNKNOWN:
2129 /* We may be called during probe or resume. Some pre-processing
2130 * is required for prior to reset
2131 */
2132 scsi_block_requests(pinstance->host);
2133
2134 /* If asked to reset while IOA was processing responses or
2135 * there are any error responses then IOA may require
2136 * hard-reset.
2137 */
2138 if (pinstance->ioa_hard_reset == 0) {
2139 if (ioread32(pinstance->ioa_status) &
2140 INTRS_TRANSITION_TO_OPERATIONAL) {
2141 pmcraid_info("sticky bit set, bring-up\n");
2142 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2143 pmcraid_reinit_cmdblk(cmd);
2144 pmcraid_identify_hrrq(cmd);
2145 } else {
2146 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2147 pmcraid_soft_reset(cmd);
2148 }
2149 } else {
2150 /* Alert IOA of a possible reset and wait for critical
2151 * operation in progress bit to reset
2152 */
2153 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2154 pmcraid_reset_alert(cmd);
2155 }
2156 break;
2157
2158 case IOA_STATE_IN_RESET_ALERT:
2159 /* If critical operation in progress bit is reset or wait gets
2160 * timed out, reset proceeds with starting BIST on the IOA.
2161 * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
2162 * they are 3 or more, reset engine marks IOA dead and returns
2163 */
2164 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2165 pmcraid_start_bist(cmd);
2166 break;
2167
2168 case IOA_STATE_IN_HARD_RESET:
2169 pinstance->ioa_reset_attempts++;
2170
2171 /* retry reset if we haven't reached maximum allowed limit */
2172 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2173 pinstance->ioa_reset_attempts = 0;
2174 pmcraid_err("IOA didn't respond marking it as dead\n");
2175 pinstance->ioa_state = IOA_STATE_DEAD;
c20c4267
AR
2176
2177 if (pinstance->ioa_bringdown)
2178 pmcraid_notify_ioastate(pinstance,
2179 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2180 else
2181 pmcraid_notify_ioastate(pinstance,
2182 PMC_DEVICE_EVENT_RESET_FAILED);
89a36810
AR
2183 reset_complete = 1;
2184 break;
2185 }
2186
2187 /* Once either bist or pci reset is done, restore PCI config
2188 * space. If this fails, proceed with hard reset again
2189 */
1d3c16a8 2190 pci_restore_state(pinstance->pdev);
89a36810
AR
2191
2192 /* fail all pending commands */
2193 pmcraid_fail_outstanding_cmds(pinstance);
2194
2195 /* check if unit check is active, if so extract dump */
2196 if (pinstance->ioa_unit_check) {
2197 pmcraid_info("unit check is active\n");
2198 pinstance->ioa_unit_check = 0;
2199 pmcraid_get_dump(pinstance);
2200 pinstance->ioa_reset_attempts--;
2201 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2202 pmcraid_reset_alert(cmd);
2203 break;
2204 }
2205
2206 /* if the reset reason is to bring-down the ioa, we might be
2207 * done with the reset restore pci_config_space and complete
2208 * the reset
2209 */
2210 if (pinstance->ioa_bringdown) {
2211 pmcraid_info("bringing down the adapter\n");
2212 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2213 pinstance->ioa_bringdown = 0;
2214 pinstance->ioa_state = IOA_STATE_UNKNOWN;
c20c4267
AR
2215 pmcraid_notify_ioastate(pinstance,
2216 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
89a36810
AR
2217 reset_complete = 1;
2218 } else {
2219 /* bring-up IOA, so proceed with soft reset
2220 * Reinitialize hrrq_buffers and their indices also
2221 * enable interrupts after a pci_restore_state
2222 */
2223 if (pmcraid_reset_enable_ioa(pinstance)) {
2224 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2225 pmcraid_info("bringing up the adapter\n");
2226 pmcraid_reinit_cmdblk(cmd);
2227 pmcraid_identify_hrrq(cmd);
2228 } else {
2229 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2230 pmcraid_soft_reset(cmd);
2231 }
2232 }
2233 break;
2234
2235 case IOA_STATE_IN_SOFT_RESET:
2236 /* TRANSITION TO OPERATIONAL is on so start initialization
2237 * sequence
2238 */
2239 pmcraid_info("In softreset proceeding with bring-up\n");
2240 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2241
2242 /* Initialization commands start with HRRQ identification. From
2243 * now on tasklet completes most of the commands as IOA is up
2244 * and intrs are enabled
2245 */
2246 pmcraid_identify_hrrq(cmd);
2247 break;
2248
2249 case IOA_STATE_IN_BRINGUP:
2250 /* we are done with bringing up of IOA, change the ioa_state to
2251 * operational and wake up any waiters
2252 */
2253 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2254 reset_complete = 1;
2255 break;
2256
2257 case IOA_STATE_OPERATIONAL:
2258 default:
2259 /* When IOA is operational and a reset is requested, check for
2260 * the reset reason. If reset is to bring down IOA, unregister
2261 * HCAMs and initiate shutdown; if adapter reset is forced then
2262 * restart reset sequence again
2263 */
2264 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2265 pinstance->force_ioa_reset == 0) {
c20c4267
AR
2266 pmcraid_notify_ioastate(pinstance,
2267 PMC_DEVICE_EVENT_RESET_SUCCESS);
89a36810
AR
2268 reset_complete = 1;
2269 } else {
2270 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2271 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2272 pmcraid_reinit_cmdblk(cmd);
2273 pmcraid_unregister_hcams(cmd);
2274 }
2275 break;
2276 }
2277
2278 /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
2279 * OPERATIONAL. Reset all control variables used during reset, wake up
2280 * any waiting threads and let the SCSI mid-layer send commands. Note
2281 * that host_lock must be held before invoking scsi_report_bus_reset.
2282 */
2283 if (reset_complete) {
2284 pinstance->ioa_reset_in_progress = 0;
2285 pinstance->ioa_reset_attempts = 0;
2286 pinstance->reset_cmd = NULL;
2287 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2288 pinstance->ioa_bringdown = 0;
2289 pmcraid_return_cmd(cmd);
2290
2291 /* If target state is to bring up the adapter, proceed with
2292 * hcam registration and resource exposure to mid-layer.
2293 */
2294 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2295 pmcraid_register_hcams(pinstance);
2296
2297 wake_up_all(&pinstance->reset_wait_q);
2298 }
2299
2300 return;
2301}
2302
2303/**
2304 * pmcraid_initiate_reset - initiates reset sequence. This is called from
2305 * ISR/tasklet during error interrupts including IOA unit check. If reset
2306 * is already in progress, it just returns, otherwise initiates IOA reset
2307 * to bring IOA up to operational state.
2308 *
2309 * @pinstance: pointer to adapter instance structure
2310 *
2311 * Return value
2312 * none
2313 */
2314static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2315{
2316 struct pmcraid_cmd *cmd;
2317
2318 /* If the reset is already in progress, just return, otherwise start
2319 * reset sequence and return
2320 */
2321 if (!pinstance->ioa_reset_in_progress) {
2322 scsi_block_requests(pinstance->host);
2323 cmd = pmcraid_get_free_cmd(pinstance);
2324
2325 if (cmd == NULL) {
2326 pmcraid_err("no cmnd blocks for initiate_reset\n");
2327 return;
2328 }
2329
2330 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2331 pinstance->reset_cmd = cmd;
2332 pinstance->force_ioa_reset = 1;
c20c4267
AR
2333 pmcraid_notify_ioastate(pinstance,
2334 PMC_DEVICE_EVENT_RESET_START);
89a36810
AR
2335 pmcraid_ioa_reset(cmd);
2336 }
2337}
2338
2339/**
2340 * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
2341 * or bringdown IOA
2342 * @pinstance: pointer adapter instance structure
2343 * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
2344 * @target_state: expected target state after reset
2345 *
2346 * Note: This command initiates reset and waits for its completion. Hence this
2347 * should not be called from isr/timer/tasklet functions (timeout handlers,
2348 * error response handlers and interrupt handlers).
2349 *
2350 * Return Value
2351 * 1 in case ioa_state is not target_state, 0 otherwise.
2352 */
2353static int pmcraid_reset_reload(
2354 struct pmcraid_instance *pinstance,
2355 u8 shutdown_type,
2356 u8 target_state
2357)
2358{
2359 struct pmcraid_cmd *reset_cmd = NULL;
2360 unsigned long lock_flags;
2361 int reset = 1;
2362
2363 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2364
2365 if (pinstance->ioa_reset_in_progress) {
2366 pmcraid_info("reset_reload: reset is already in progress\n");
2367
2368 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2369
2370 wait_event(pinstance->reset_wait_q,
2371 !pinstance->ioa_reset_in_progress);
2372
2373 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2374
2375 if (pinstance->ioa_state == IOA_STATE_DEAD) {
89a36810 2376 pmcraid_info("reset_reload: IOA is dead\n");
91402608
CH
2377 goto out_unlock;
2378 }
2379
2380 if (pinstance->ioa_state == target_state) {
89a36810 2381 reset = 0;
91402608 2382 goto out_unlock;
89a36810
AR
2383 }
2384 }
2385
91402608
CH
2386 pmcraid_info("reset_reload: proceeding with reset\n");
2387 scsi_block_requests(pinstance->host);
2388 reset_cmd = pmcraid_get_free_cmd(pinstance);
2389 if (reset_cmd == NULL) {
2390 pmcraid_err("no free cmnd for reset_reload\n");
2391 goto out_unlock;
2392 }
89a36810 2393
91402608
CH
2394 if (shutdown_type == SHUTDOWN_NORMAL)
2395 pinstance->ioa_bringdown = 1;
89a36810 2396
91402608
CH
2397 pinstance->ioa_shutdown_type = shutdown_type;
2398 pinstance->reset_cmd = reset_cmd;
2399 pinstance->force_ioa_reset = reset;
2400 pmcraid_info("reset_reload: initiating reset\n");
2401 pmcraid_ioa_reset(reset_cmd);
2402 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2403 pmcraid_info("reset_reload: waiting for reset to complete\n");
2404 wait_event(pinstance->reset_wait_q,
2405 !pinstance->ioa_reset_in_progress);
89a36810 2406
91402608
CH
2407 pmcraid_info("reset_reload: reset is complete !!\n");
2408 scsi_unblock_requests(pinstance->host);
2409 return pinstance->ioa_state != target_state;
89a36810 2410
91402608
CH
2411out_unlock:
2412 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810
AR
2413 return reset;
2414}
2415
2416/**
2417 * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
2418 *
2419 * @pinstance: pointer to adapter instance structure
2420 *
2421 * Return Value
2422 * whatever is returned from pmcraid_reset_reload
2423 */
2424static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2425{
2426 return pmcraid_reset_reload(pinstance,
2427 SHUTDOWN_NORMAL,
2428 IOA_STATE_UNKNOWN);
2429}
2430
2431/**
2432 * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
2433 *
2434 * @pinstance: pointer to adapter instance structure
2435 *
2436 * Return Value
2437 * whatever is returned from pmcraid_reset_reload
2438 */
2439static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2440{
c20c4267
AR
2441 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2442
89a36810
AR
2443 return pmcraid_reset_reload(pinstance,
2444 SHUTDOWN_NONE,
2445 IOA_STATE_OPERATIONAL);
2446}
2447
2448/**
2449 * pmcraid_request_sense - Send request sense to a device
2450 * @cmd: pmcraid command struct
2451 *
2452 * This function sends a request sense to a device as a result of a check
2453 * condition. This method re-uses the same command block that failed earlier.
2454 */
2455static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2456{
2457 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2458 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2459
2460 /* allocate DMAable memory for sense buffers */
2461 cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
2462 SCSI_SENSE_BUFFERSIZE,
2463 &cmd->sense_buffer_dma);
2464
2465 if (cmd->sense_buffer == NULL) {
2466 pmcraid_err
2467 ("couldn't allocate sense buffer for request sense\n");
2468 pmcraid_erp_done(cmd);
2469 return;
2470 }
2471
2472 /* re-use the command block */
2473 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2474 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2475 ioarcb->request_flags0 = (SYNC_COMPLETE |
2476 NO_LINK_DESCS |
2477 INHIBIT_UL_CHECK);
2478 ioarcb->request_type = REQ_TYPE_SCSI;
2479 ioarcb->cdb[0] = REQUEST_SENSE;
2480 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2481
2482 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2483 offsetof(struct pmcraid_ioarcb,
2484 add_data.u.ioadl[0]));
2485 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2486
2487 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2488
2489 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2490 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
88197966 2491 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
2492
2493 /* request sense might be called as part of error response processing
2494 * which runs in tasklets context. It is possible that mid-layer might
2495 * schedule queuecommand during this time, hence, writting to IOARRIN
2496 * must be protect by host_lock
2497 */
2498 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2499 PMCRAID_REQUEST_SENSE_TIMEOUT,
2500 pmcraid_timeout_handler);
2501}
2502
2503/**
2504 * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
2505 * @cmd: command that failed
2506 * @sense: true if request_sense is required after cancel all
2507 *
2508 * This function sends a cancel all to a device to clear the queue.
2509 */
2510static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
2511{
2512 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2513 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2514 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2515 void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
2516 : pmcraid_request_sense;
2517
2518 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2519 ioarcb->request_flags0 = SYNC_OVERRIDE;
2520 ioarcb->request_type = REQ_TYPE_IOACMD;
2521 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2522
2523 if (RES_IS_GSCSI(res->cfg_entry))
2524 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2525
2526 ioarcb->ioadl_bus_addr = 0;
2527 ioarcb->ioadl_length = 0;
2528 ioarcb->data_transfer_length = 0;
45c80be6 2529 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
89a36810
AR
2530
2531 /* writing to IOARRIN must be protected by host_lock, as mid-layer
2532 * schedule queuecommand while we are doing this
2533 */
2534 pmcraid_send_cmd(cmd, cmd_done,
2535 PMCRAID_REQUEST_SENSE_TIMEOUT,
2536 pmcraid_timeout_handler);
2537}
2538
2539/**
2540 * pmcraid_frame_auto_sense: frame fixed format sense information
2541 *
2542 * @cmd: pointer to failing command block
2543 *
2544 * Return value
2545 * none
2546 */
2547static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2548{
2549 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2550 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2551 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2552 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2553 u32 failing_lba = 0;
2554
2555 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2556 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2557
2558 if (RES_IS_VSET(res->cfg_entry) &&
2559 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2560 ioasa->u.vset.failing_lba_hi != 0) {
2561
2562 sense_buf[0] = 0x72;
2563 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2564 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2565 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2566
2567 sense_buf[7] = 12;
2568 sense_buf[8] = 0;
2569 sense_buf[9] = 0x0A;
2570 sense_buf[10] = 0x80;
2571
2572 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2573
2574 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2575 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2576 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2577 sense_buf[15] = failing_lba & 0x000000ff;
2578
2579 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2580
2581 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2582 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2583 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2584 sense_buf[19] = failing_lba & 0x000000ff;
2585 } else {
2586 sense_buf[0] = 0x70;
2587 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2588 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2589 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2590
2591 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2592 if (RES_IS_VSET(res->cfg_entry))
2593 failing_lba =
2594 le32_to_cpu(ioasa->u.
2595 vset.failing_lba_lo);
2596 sense_buf[0] |= 0x80;
2597 sense_buf[3] = (failing_lba >> 24) & 0xff;
2598 sense_buf[4] = (failing_lba >> 16) & 0xff;
2599 sense_buf[5] = (failing_lba >> 8) & 0xff;
2600 sense_buf[6] = failing_lba & 0xff;
2601 }
2602
2603 sense_buf[7] = 6; /* additional length */
2604 }
2605}
2606
2607/**
2608 * pmcraid_error_handler - Error response handlers for a SCSI op
2609 * @cmd: pointer to pmcraid_cmd that has failed
2610 *
2611 * This function determines whether or not to initiate ERP on the affected
2612 * device. This is called from a tasklet, which doesn't hold any locks.
2613 *
2614 * Return value:
2615 * 0 it caller can complete the request, otherwise 1 where in error
2616 * handler itself completes the request and returns the command block
2617 * back to free-pool
2618 */
2619static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2620{
2621 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2622 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2623 struct pmcraid_instance *pinstance = cmd->drv_inst;
2624 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2625 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2626 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2627 u32 sense_copied = 0;
2628
2629 if (!res) {
2630 pmcraid_info("resource pointer is NULL\n");
2631 return 0;
2632 }
2633
2634 /* If this was a SCSI read/write command keep count of errors */
2635 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2636 atomic_inc(&res->read_failures);
2637 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2638 atomic_inc(&res->write_failures);
2639
2640 if (!RES_IS_GSCSI(res->cfg_entry) &&
2641 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2642 pmcraid_frame_auto_sense(cmd);
2643 }
2644
2645 /* Log IOASC/IOASA information based on user settings */
2646 pmcraid_ioasc_logger(ioasc, cmd);
2647
2648 switch (masked_ioasc) {
2649
2650 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2651 scsi_cmd->result |= (DID_ABORT << 16);
2652 break;
2653
2654 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2655 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2656 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2657 break;
2658
2659 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2660 res->sync_reqd = 1;
2661 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2662 break;
2663
2664 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2665 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2666 break;
2667
2668 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2669 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2670 if (!res->reset_progress)
2671 scsi_report_bus_reset(pinstance->host,
2672 scsi_cmd->device->channel);
2673 scsi_cmd->result |= (DID_ERROR << 16);
2674 break;
2675
2676 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2677 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2678 res->sync_reqd = 1;
2679
2680 /* if check_condition is not active return with error otherwise
2681 * get/frame the sense buffer
2682 */
2683 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2684 SAM_STAT_CHECK_CONDITION &&
2685 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2686 return 0;
2687
2688 /* If we have auto sense data as part of IOASA pass it to
2689 * mid-layer
2690 */
2691 if (ioasa->auto_sense_length != 0) {
45c80be6
AB
2692 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2693 int data_size = min_t(u16, sense_len,
89a36810
AR
2694 SCSI_SENSE_BUFFERSIZE);
2695
2696 memcpy(scsi_cmd->sense_buffer,
2697 ioasa->sense_data,
2698 data_size);
2699 sense_copied = 1;
2700 }
2701
a70757ba 2702 if (RES_IS_GSCSI(res->cfg_entry))
89a36810 2703 pmcraid_cancel_all(cmd, sense_copied);
a70757ba 2704 else if (sense_copied)
89a36810 2705 pmcraid_erp_done(cmd);
a70757ba 2706 else
89a36810 2707 pmcraid_request_sense(cmd);
89a36810
AR
2708
2709 return 1;
2710
2711 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2712 break;
2713
2714 default:
2715 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2716 scsi_cmd->result |= (DID_ERROR << 16);
2717 break;
2718 }
2719 return 0;
2720}
2721
2722/**
2723 * pmcraid_reset_device - device reset handler functions
2724 *
2725 * @scsi_cmd: scsi command struct
2726 * @modifier: reset modifier indicating the reset sequence to be performed
2727 *
2728 * This function issues a device reset to the affected device.
2729 * A LUN reset will be sent to the device first. If that does
2730 * not work, a target reset will be sent.
2731 *
2732 * Return value:
2733 * SUCCESS / FAILED
2734 */
2735static int pmcraid_reset_device(
2736 struct scsi_cmnd *scsi_cmd,
2737 unsigned long timeout,
2738 u8 modifier
2739)
2740{
2741 struct pmcraid_cmd *cmd;
2742 struct pmcraid_instance *pinstance;
2743 struct pmcraid_resource_entry *res;
2744 struct pmcraid_ioarcb *ioarcb;
2745 unsigned long lock_flags;
2746 u32 ioasc;
2747
2748 pinstance =
2749 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2750 res = scsi_cmd->device->hostdata;
2751
2752 if (!res) {
34876402
AR
2753 sdev_printk(KERN_ERR, scsi_cmd->device,
2754 "reset_device: NULL resource pointer\n");
89a36810
AR
2755 return FAILED;
2756 }
2757
2758 /* If adapter is currently going through reset/reload, return failed.
2759 * This will force the mid-layer to call _eh_bus/host reset, which
2760 * will then go to sleep and wait for the reset to complete
2761 */
2762 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2763 if (pinstance->ioa_reset_in_progress ||
2764 pinstance->ioa_state == IOA_STATE_DEAD) {
2765 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2766 return FAILED;
2767 }
2768
2769 res->reset_progress = 1;
2770 pmcraid_info("Resetting %s resource with addr %x\n",
2771 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2772 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2773 le32_to_cpu(res->cfg_entry.resource_address));
2774
2775 /* get a free cmd block */
2776 cmd = pmcraid_get_free_cmd(pinstance);
2777
2778 if (cmd == NULL) {
2779 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2780 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2781 return FAILED;
2782 }
2783
2784 ioarcb = &cmd->ioa_cb->ioarcb;
2785 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2786 ioarcb->request_type = REQ_TYPE_IOACMD;
2787 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2788
2789 /* Initialize reset modifier bits */
2790 if (modifier)
2791 modifier = ENABLE_RESET_MODIFIER | modifier;
2792
2793 ioarcb->cdb[1] = modifier;
2794
2795 init_completion(&cmd->wait_for_completion);
2796 cmd->completion_req = 1;
2797
2798 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2799 cmd->ioa_cb->ioarcb.cdb[0],
2800 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2801 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2802
2803 pmcraid_send_cmd(cmd,
2804 pmcraid_internal_done,
2805 timeout,
2806 pmcraid_timeout_handler);
2807
2808 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2809
2810 /* RESET_DEVICE command completes after all pending IOARCBs are
2811 * completed. Once this command is completed, pmcraind_internal_done
2812 * will wake up the 'completion' queue.
2813 */
2814 wait_for_completion(&cmd->wait_for_completion);
2815
2816 /* complete the command here itself and return the command block
2817 * to free list
2818 */
2819 pmcraid_return_cmd(cmd);
2820 res->reset_progress = 0;
2821 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2822
2823 /* set the return value based on the returned ioasc */
2824 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2825}
2826
2827/**
2828 * _pmcraid_io_done - helper for pmcraid_io_done function
2829 *
2830 * @cmd: pointer to pmcraid command struct
2831 * @reslen: residual data length to be set in the ioasa
2832 * @ioasc: ioasc either returned by IOA or set by driver itself.
2833 *
2834 * This function is invoked by pmcraid_io_done to complete mid-layer
2835 * scsi ops.
2836 *
2837 * Return value:
2838 * 0 if caller is required to return it to free_pool. Returns 1 if
2839 * caller need not worry about freeing command block as error handler
2840 * will take care of that.
2841 */
2842
2843static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2844{
2845 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2846 int rc = 0;
2847
2848 scsi_set_resid(scsi_cmd, reslen);
2849
2850 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2851 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2852 cmd->ioa_cb->ioarcb.cdb[0],
2853 ioasc, scsi_cmd->result);
2854
2855 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2856 rc = pmcraid_error_handler(cmd);
2857
2858 if (rc == 0) {
2859 scsi_dma_unmap(scsi_cmd);
2860 scsi_cmd->scsi_done(scsi_cmd);
2861 }
2862
2863 return rc;
2864}
2865
2866/**
2867 * pmcraid_io_done - SCSI completion function
2868 *
2869 * @cmd: pointer to pmcraid command struct
2870 *
2871 * This function is invoked by tasklet/mid-layer error handler to completing
2872 * the SCSI ops sent from mid-layer.
2873 *
2874 * Return value
2875 * none
2876 */
2877
2878static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2879{
2880 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2881 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2882
2883 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2884 pmcraid_return_cmd(cmd);
2885}
2886
2887/**
2888 * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
2889 *
2890 * @cmd: command block of the command to be aborted
2891 *
2892 * Return Value:
2893 * returns pointer to command structure used as cancelling cmd
2894 */
2895static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2896{
2897 struct pmcraid_cmd *cancel_cmd;
2898 struct pmcraid_instance *pinstance;
2899 struct pmcraid_resource_entry *res;
2900
2901 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2902 res = cmd->scsi_cmd->device->hostdata;
2903
2904 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2905
2906 if (cancel_cmd == NULL) {
2907 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2908 return NULL;
2909 }
2910
2911 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2912
2913 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2914 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6 2915 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
89a36810
AR
2916
2917 init_completion(&cancel_cmd->wait_for_completion);
2918 cancel_cmd->completion_req = 1;
2919
2920 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2921 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
c20c4267 2922 cancel_cmd->ioa_cb->ioarcb.cdb[0],
89a36810
AR
2923 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2924
2925 pmcraid_send_cmd(cancel_cmd,
2926 pmcraid_internal_done,
2927 PMCRAID_INTERNAL_TIMEOUT,
2928 pmcraid_timeout_handler);
2929 return cancel_cmd;
2930}
2931
2932/**
2933 * pmcraid_abort_complete - Waits for ABORT TASK completion
2934 *
2935 * @cancel_cmd: command block use as cancelling command
2936 *
2937 * Return Value:
2938 * returns SUCCESS if ABORT TASK has good completion
2939 * otherwise FAILED
2940 */
2941static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2942{
2943 struct pmcraid_resource_entry *res;
2944 u32 ioasc;
2945
2946 wait_for_completion(&cancel_cmd->wait_for_completion);
c20c4267
AR
2947 res = cancel_cmd->res;
2948 cancel_cmd->res = NULL;
89a36810
AR
2949 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2950
2951 /* If the abort task is not timed out we will get a Good completion
2952 * as sense_key, otherwise we may get one the following responses
25985edc 2953 * due to subsequent bus reset or device reset. In case IOASC is
89a36810
AR
2954 * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
2955 */
2956 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2957 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2958 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2959 res->sync_reqd = 1;
2960 ioasc = 0;
2961 }
2962
2963 /* complete the command here itself */
2964 pmcraid_return_cmd(cancel_cmd);
2965 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2966}
2967
2968/**
2969 * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
2970 *
2971 * @scsi_cmd: scsi command struct given by mid-layer. When this is called
2972 * mid-layer ensures that no other commands are queued. This
2973 * never gets called under interrupt, but a separate eh thread.
2974 *
2975 * Return value:
2976 * SUCCESS / FAILED
2977 */
2978static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2979{
2980 struct pmcraid_instance *pinstance;
2981 struct pmcraid_cmd *cmd;
2982 struct pmcraid_resource_entry *res;
2983 unsigned long host_lock_flags;
2984 unsigned long pending_lock_flags;
2985 struct pmcraid_cmd *cancel_cmd = NULL;
2986 int cmd_found = 0;
2987 int rc = FAILED;
2988
2989 pinstance =
2990 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2991
34876402
AR
2992 scmd_printk(KERN_INFO, scsi_cmd,
2993 "I/O command timed out, aborting it.\n");
89a36810
AR
2994
2995 res = scsi_cmd->device->hostdata;
2996
2997 if (res == NULL)
2998 return rc;
2999
3000 /* If we are currently going through reset/reload, return failed.
3001 * This will force the mid-layer to eventually call
3002 * pmcraid_eh_host_reset which will then go to sleep and wait for the
3003 * reset to complete
3004 */
3005 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
3006
3007 if (pinstance->ioa_reset_in_progress ||
3008 pinstance->ioa_state == IOA_STATE_DEAD) {
3009 spin_unlock_irqrestore(pinstance->host->host_lock,
3010 host_lock_flags);
3011 return rc;
3012 }
3013
3014 /* loop over pending cmd list to find cmd corresponding to this
3015 * scsi_cmd. Note that this command might not have been completed
3016 * already. locking: all pending commands are protected with
3017 * pending_pool_lock.
3018 */
3019 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
3020 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
3021
3022 if (cmd->scsi_cmd == scsi_cmd) {
3023 cmd_found = 1;
3024 break;
3025 }
3026 }
3027
3028 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
3029 pending_lock_flags);
3030
3031 /* If the command to be aborted was given to IOA and still pending with
3032 * it, send ABORT_TASK to abort this and wait for its completion
3033 */
3034 if (cmd_found)
3035 cancel_cmd = pmcraid_abort_cmd(cmd);
3036
3037 spin_unlock_irqrestore(pinstance->host->host_lock,
3038 host_lock_flags);
3039
3040 if (cancel_cmd) {
c20c4267 3041 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
89a36810
AR
3042 rc = pmcraid_abort_complete(cancel_cmd);
3043 }
3044
3045 return cmd_found ? rc : SUCCESS;
3046}
3047
3048/**
3049 * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
3050 *
3051 * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
3052 *
3053 * All these routines invokve pmcraid_reset_device with appropriate parameters.
3054 * Since these are called from mid-layer EH thread, no other IO will be queued
3055 * to the resource being reset. However, control path (IOCTL) may be active so
3056 * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
3057 * takes care by locking/unlocking host_lock.
3058 *
3059 * Return value
c20c4267 3060 * SUCCESS or FAILED
89a36810
AR
3061 */
3062static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3063{
34876402
AR
3064 scmd_printk(KERN_INFO, scmd,
3065 "resetting device due to an I/O command timeout.\n");
89a36810
AR
3066 return pmcraid_reset_device(scmd,
3067 PMCRAID_INTERNAL_TIMEOUT,
3068 RESET_DEVICE_LUN);
3069}
3070
3071static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3072{
34876402
AR
3073 scmd_printk(KERN_INFO, scmd,
3074 "Doing bus reset due to an I/O command timeout.\n");
89a36810
AR
3075 return pmcraid_reset_device(scmd,
3076 PMCRAID_RESET_BUS_TIMEOUT,
3077 RESET_DEVICE_BUS);
3078}
3079
3080static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3081{
34876402
AR
3082 scmd_printk(KERN_INFO, scmd,
3083 "Doing target reset due to an I/O command timeout.\n");
89a36810
AR
3084 return pmcraid_reset_device(scmd,
3085 PMCRAID_INTERNAL_TIMEOUT,
3086 RESET_DEVICE_TARGET);
3087}
3088
3089/**
3090 * pmcraid_eh_host_reset_handler - adapter reset handler callback
3091 *
3092 * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
3093 *
3094 * Initiates adapter reset to bring it up to operational state
3095 *
3096 * Return value
c20c4267 3097 * SUCCESS or FAILED
89a36810
AR
3098 */
3099static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3100{
3101 unsigned long interval = 10000; /* 10 seconds interval */
3102 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3103 struct pmcraid_instance *pinstance =
3104 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3105
3106
3107 /* wait for an additional 150 seconds just in case firmware could come
3108 * up and if it could complete all the pending commands excluding the
3109 * two HCAM (CCN and LDN).
3110 */
3111 while (waits--) {
3112 if (atomic_read(&pinstance->outstanding_cmds) <=
3113 PMCRAID_MAX_HCAM_CMD)
3114 return SUCCESS;
3115 msleep(interval);
3116 }
3117
3118 dev_err(&pinstance->pdev->dev,
3119 "Adapter being reset due to an I/O command timeout.\n");
3120 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3121}
3122
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AR
3123/**
3124 * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
3125 * @cmd: pmcraid command struct
3126 * @sgcount: count of scatter-gather elements
3127 *
3128 * Return value
3129 * returns pointer pmcraid_ioadl_desc, initialized to point to internal
3130 * or external IOADLs
3131 */
61b96d5b 3132static struct pmcraid_ioadl_desc *
89a36810
AR
3133pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3134{
3135 struct pmcraid_ioadl_desc *ioadl;
3136 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3137 int ioadl_count = 0;
3138
3139 if (ioarcb->add_cmd_param_length)
45c80be6
AB
3140 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3141 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
89a36810
AR
3142
3143 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3144 /* external ioadls start at offset 0x80 from control_block
3145 * structure, re-using 24 out of 27 ioadls part of IOARCB.
3146 * It is necessary to indicate to firmware that driver is
3147 * using ioadls to be treated as external to IOARCB.
3148 */
45c80be6 3149 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
89a36810
AR
3150 ioarcb->ioadl_bus_addr =
3151 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3152 offsetof(struct pmcraid_ioarcb,
3153 add_data.u.ioadl[3]));
3154 ioadl = &ioarcb->add_data.u.ioadl[3];
3155 } else {
3156 ioarcb->ioadl_bus_addr =
3157 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3158 offsetof(struct pmcraid_ioarcb,
3159 add_data.u.ioadl[ioadl_count]));
3160
3161 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3162 ioarcb->ioarcb_bus_addr |=
45c80be6 3163 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
89a36810
AR
3164 }
3165
3166 return ioadl;
3167}
3168
3169/**
3170 * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
3171 * @pinstance: pointer to adapter instance structure
3172 * @cmd: pmcraid command struct
3173 *
3174 * This function is invoked by queuecommand entry point while sending a command
3175 * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
3176 *
3177 * Return value:
c20c4267 3178 * 0 on success or -1 on failure
89a36810
AR
3179 */
3180static int pmcraid_build_ioadl(
3181 struct pmcraid_instance *pinstance,
3182 struct pmcraid_cmd *cmd
3183)
3184{
3185 int i, nseg;
3186 struct scatterlist *sglist;
3187
3188 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3189 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3190 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
3191
3192 u32 length = scsi_bufflen(scsi_cmd);
3193
3194 if (!length)
3195 return 0;
3196
3197 nseg = scsi_dma_map(scsi_cmd);
3198
3199 if (nseg < 0) {
34876402 3200 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
89a36810
AR
3201 return -1;
3202 } else if (nseg > PMCRAID_MAX_IOADLS) {
3203 scsi_dma_unmap(scsi_cmd);
34876402 3204 scmd_printk(KERN_ERR, scsi_cmd,
89a36810
AR
3205 "sg count is (%d) more than allowed!\n", nseg);
3206 return -1;
3207 }
3208
3209 /* Initialize IOARCB data transfer length fields */
3210 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3211 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3212
3213 ioarcb->request_flags0 |= NO_LINK_DESCS;
3214 ioarcb->data_transfer_length = cpu_to_le32(length);
3215 ioadl = pmcraid_init_ioadls(cmd, nseg);
3216
3217 /* Initialize IOADL descriptor addresses */
3218 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3219 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3220 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3221 ioadl[i].flags = 0;
3222 }
3223 /* setup last descriptor */
88197966 3224 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3225
3226 return 0;
3227}
3228
3229/**
3230 * pmcraid_free_sglist - Frees an allocated SG buffer list
3231 * @sglist: scatter/gather list pointer
3232 *
3233 * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
3234 *
3235 * Return value:
c20c4267 3236 * none
89a36810
AR
3237 */
3238static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3239{
3240 int i;
3241
3242 for (i = 0; i < sglist->num_sg; i++)
3243 __free_pages(sg_page(&(sglist->scatterlist[i])),
3244 sglist->order);
3245
3246 kfree(sglist);
3247}
3248
3249/**
3250 * pmcraid_alloc_sglist - Allocates memory for a SG list
3251 * @buflen: buffer length
3252 *
3253 * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
3254 * list.
3255 *
3256 * Return value
c20c4267 3257 * pointer to sglist / NULL on failure
89a36810
AR
3258 */
3259static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3260{
3261 struct pmcraid_sglist *sglist;
3262 struct scatterlist *scatterlist;
3263 struct page *page;
3264 int num_elem, i, j;
3265 int sg_size;
3266 int order;
3267 int bsize_elem;
3268
3269 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3270 order = (sg_size > 0) ? get_order(sg_size) : 0;
3271 bsize_elem = PAGE_SIZE * (1 << order);
3272
3273 /* Determine the actual number of sg entries needed */
3274 if (buflen % bsize_elem)
3275 num_elem = (buflen / bsize_elem) + 1;
3276 else
3277 num_elem = buflen / bsize_elem;
3278
3279 /* Allocate a scatter/gather list for the DMA */
3280 sglist = kzalloc(sizeof(struct pmcraid_sglist) +
3281 (sizeof(struct scatterlist) * (num_elem - 1)),
3282 GFP_KERNEL);
3283
3284 if (sglist == NULL)
3285 return NULL;
3286
3287 scatterlist = sglist->scatterlist;
3288 sg_init_table(scatterlist, num_elem);
3289 sglist->order = order;
3290 sglist->num_sg = num_elem;
3291 sg_size = buflen;
3292
3293 for (i = 0; i < num_elem; i++) {
592488a3 3294 page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
89a36810
AR
3295 if (!page) {
3296 for (j = i - 1; j >= 0; j--)
3297 __free_pages(sg_page(&scatterlist[j]), order);
3298 kfree(sglist);
3299 return NULL;
3300 }
3301
3302 sg_set_page(&scatterlist[i], page,
3303 sg_size < bsize_elem ? sg_size : bsize_elem, 0);
3304 sg_size -= bsize_elem;
3305 }
3306
3307 return sglist;
3308}
3309
3310/**
3311 * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
3312 * @sglist: scatter/gather list pointer
3313 * @buffer: buffer pointer
3314 * @len: buffer length
3315 * @direction: data transfer direction
3316 *
3317 * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
3318 *
3319 * Return value:
3320 * 0 on success / other on failure
3321 */
3322static int pmcraid_copy_sglist(
3323 struct pmcraid_sglist *sglist,
3397623b 3324 void __user *buffer,
89a36810
AR
3325 u32 len,
3326 int direction
3327)
3328{
3329 struct scatterlist *scatterlist;
3330 void *kaddr;
3331 int bsize_elem;
3332 int i;
3333 int rc = 0;
3334
3335 /* Determine the actual number of bytes per element */
3336 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3337
3338 scatterlist = sglist->scatterlist;
3339
3340 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
3341 struct page *page = sg_page(&scatterlist[i]);
3342
3343 kaddr = kmap(page);
3344 if (direction == DMA_TO_DEVICE)
edb88cef 3345 rc = copy_from_user(kaddr, buffer, bsize_elem);
89a36810 3346 else
edb88cef 3347 rc = copy_to_user(buffer, kaddr, bsize_elem);
89a36810
AR
3348
3349 kunmap(page);
3350
3351 if (rc) {
3352 pmcraid_err("failed to copy user data into sg list\n");
3353 return -EFAULT;
3354 }
3355
3356 scatterlist[i].length = bsize_elem;
3357 }
3358
3359 if (len % bsize_elem) {
3360 struct page *page = sg_page(&scatterlist[i]);
3361
3362 kaddr = kmap(page);
3363
3364 if (direction == DMA_TO_DEVICE)
edb88cef 3365 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
89a36810 3366 else
edb88cef 3367 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
89a36810
AR
3368
3369 kunmap(page);
3370
3371 scatterlist[i].length = len % bsize_elem;
3372 }
3373
3374 if (rc) {
3375 pmcraid_err("failed to copy user data into sg list\n");
3376 rc = -EFAULT;
3377 }
3378
3379 return rc;
3380}
3381
3382/**
3383 * pmcraid_queuecommand - Queue a mid-layer request
3384 * @scsi_cmd: scsi command struct
3385 * @done: done function
3386 *
3387 * This function queues a request generated by the mid-layer. Midlayer calls
3388 * this routine within host->lock. Some of the functions called by queuecommand
3389 * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
3390 *
3391 * Return value:
3392 * 0 on success
3393 * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
3394 * SCSI_MLQUEUE_HOST_BUSY if host is busy
3395 */
f281233d 3396static int pmcraid_queuecommand_lck(
89a36810
AR
3397 struct scsi_cmnd *scsi_cmd,
3398 void (*done) (struct scsi_cmnd *)
3399)
3400{
3401 struct pmcraid_instance *pinstance;
3402 struct pmcraid_resource_entry *res;
3403 struct pmcraid_ioarcb *ioarcb;
3404 struct pmcraid_cmd *cmd;
c20c4267 3405 u32 fw_version;
89a36810
AR
3406 int rc = 0;
3407
3408 pinstance =
3409 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
c20c4267 3410 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810
AR
3411 scsi_cmd->scsi_done = done;
3412 res = scsi_cmd->device->hostdata;
3413 scsi_cmd->result = (DID_OK << 16);
3414
3415 /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
3416 * the command
3417 */
3418 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3419 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3420 scsi_cmd->result = (DID_NO_CONNECT << 16);
3421 scsi_cmd->scsi_done(scsi_cmd);
3422 return 0;
3423 }
3424
3425 /* If IOA reset is in progress, can't queue the commands */
3426 if (pinstance->ioa_reset_in_progress)
3427 return SCSI_MLQUEUE_HOST_BUSY;
3428
c20c4267
AR
3429 /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
3430 * the command here itself with success return
3431 */
3432 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3433 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3434 scsi_cmd->scsi_done(scsi_cmd);
3435 return 0;
3436 }
3437
89a36810
AR
3438 /* initialize the command and IOARCB to be sent to IOA */
3439 cmd = pmcraid_get_free_cmd(pinstance);
3440
3441 if (cmd == NULL) {
3442 pmcraid_err("free command block is not available\n");
3443 return SCSI_MLQUEUE_HOST_BUSY;
3444 }
3445
3446 cmd->scsi_cmd = scsi_cmd;
3447 ioarcb = &(cmd->ioa_cb->ioarcb);
3448 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3449 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3450 ioarcb->request_type = REQ_TYPE_SCSI;
3451
c20c4267
AR
3452 /* set hrrq number where the IOA should respond to. Note that all cmds
3453 * generated internally uses hrrq_id 0, exception to this is the cmd
3454 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3455 * hrrq_id assigned here in queuecommand
3456 */
3457 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3458 pinstance->num_hrrq;
89a36810
AR
3459 cmd->cmd_done = pmcraid_io_done;
3460
3461 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3462 if (scsi_cmd->underflow == 0)
3463 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3464
3465 if (res->sync_reqd) {
3466 ioarcb->request_flags0 |= SYNC_COMPLETE;
3467 res->sync_reqd = 0;
3468 }
3469
3470 ioarcb->request_flags0 |= NO_LINK_DESCS;
50668633
CH
3471
3472 if (scsi_cmd->flags & SCMD_TAGGED)
3473 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
89a36810
AR
3474
3475 if (RES_IS_GSCSI(res->cfg_entry))
3476 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3477 }
3478
3479 rc = pmcraid_build_ioadl(pinstance, cmd);
3480
3481 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3482 le32_to_cpu(ioarcb->response_handle) >> 2,
3483 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3484 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3485 PMCRAID_PHYS_BUS_ID,
3486 RES_IS_VSET(res->cfg_entry) ?
c20c4267
AR
3487 (fw_version <= PMCRAID_FW_VERSION_1 ?
3488 res->cfg_entry.unique_flags1 :
45c80be6 3489 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
89a36810
AR
3490 RES_TARGET(res->cfg_entry.resource_address),
3491 RES_LUN(res->cfg_entry.resource_address));
3492
3493 if (likely(rc == 0)) {
3494 _pmcraid_fire_command(cmd);
3495 } else {
3496 pmcraid_err("queuecommand could not build ioadl\n");
3497 pmcraid_return_cmd(cmd);
3498 rc = SCSI_MLQUEUE_HOST_BUSY;
3499 }
3500
3501 return rc;
3502}
3503
f281233d
JG
3504static DEF_SCSI_QCMD(pmcraid_queuecommand)
3505
89a36810
AR
3506/**
3507 * pmcraid_open -char node "open" entry, allowed only users with admin access
3508 */
3509static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3510{
3511 struct pmcraid_instance *pinstance;
3512
3513 if (!capable(CAP_SYS_ADMIN))
3514 return -EACCES;
3515
3516 /* Populate adapter instance * pointer for use by ioctl */
3517 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3518 filep->private_data = pinstance;
3519
3520 return 0;
3521}
3522
89a36810
AR
3523/**
3524 * pmcraid_fasync - Async notifier registration from applications
3525 *
3526 * This function adds the calling process to a driver global queue. When an
3527 * event occurs, SIGIO will be sent to all processes in this queue.
3528 */
3529static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3530{
3531 struct pmcraid_instance *pinstance;
3532 int rc;
3533
660bdddb 3534 pinstance = filep->private_data;
89a36810
AR
3535 mutex_lock(&pinstance->aen_queue_lock);
3536 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3537 mutex_unlock(&pinstance->aen_queue_lock);
3538
3539 return rc;
3540}
3541
3542
3543/**
3544 * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
3545 * commands sent over IOCTL interface
3546 *
3547 * @cmd : pointer to struct pmcraid_cmd
3548 * @buflen : length of the request buffer
3549 * @direction : data transfer direction
3550 *
3551 * Return value
af901ca1 3552 * 0 on success, non-zero error code on failure
89a36810
AR
3553 */
3554static int pmcraid_build_passthrough_ioadls(
3555 struct pmcraid_cmd *cmd,
3556 int buflen,
3557 int direction
3558)
3559{
3560 struct pmcraid_sglist *sglist = NULL;
3561 struct scatterlist *sg = NULL;
3562 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3563 struct pmcraid_ioadl_desc *ioadl;
3564 int i;
3565
3566 sglist = pmcraid_alloc_sglist(buflen);
3567
3568 if (!sglist) {
3569 pmcraid_err("can't allocate memory for passthrough SGls\n");
3570 return -ENOMEM;
3571 }
3572
3573 sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
3574 sglist->scatterlist,
3575 sglist->num_sg, direction);
3576
3577 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3578 dev_err(&cmd->drv_inst->pdev->dev,
3579 "Failed to map passthrough buffer!\n");
3580 pmcraid_free_sglist(sglist);
3581 return -EIO;
3582 }
3583
3584 cmd->sglist = sglist;
3585 ioarcb->request_flags0 |= NO_LINK_DESCS;
3586
3587 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3588
3589 /* Initialize IOADL descriptor addresses */
3590 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3591 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3592 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3593 ioadl[i].flags = 0;
3594 }
3595
3596 /* setup the last descriptor */
88197966 3597 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3598
3599 return 0;
3600}
3601
3602
3603/**
3604 * pmcraid_release_passthrough_ioadls - release passthrough ioadls
3605 *
3606 * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
3607 * @buflen: size of the request buffer
3608 * @direction: data transfer direction
3609 *
3610 * Return value
af901ca1 3611 * 0 on success, non-zero error code on failure
89a36810
AR
3612 */
3613static void pmcraid_release_passthrough_ioadls(
3614 struct pmcraid_cmd *cmd,
3615 int buflen,
3616 int direction
3617)
3618{
3619 struct pmcraid_sglist *sglist = cmd->sglist;
3620
3621 if (buflen > 0) {
3622 pci_unmap_sg(cmd->drv_inst->pdev,
3623 sglist->scatterlist,
3624 sglist->num_sg,
3625 direction);
3626 pmcraid_free_sglist(sglist);
3627 cmd->sglist = NULL;
3628 }
3629}
3630
3631/**
3632 * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
3633 *
3634 * @pinstance: pointer to adapter instance structure
3635 * @cmd: ioctl code
3636 * @arg: pointer to pmcraid_passthrough_buffer user buffer
3637 *
3638 * Return value
af901ca1 3639 * 0 on success, non-zero error code on failure
89a36810
AR
3640 */
3641static long pmcraid_ioctl_passthrough(
3642 struct pmcraid_instance *pinstance,
3643 unsigned int ioctl_cmd,
3644 unsigned int buflen,
3397623b 3645 void __user *arg
89a36810
AR
3646)
3647{
3648 struct pmcraid_passthrough_ioctl_buffer *buffer;
3649 struct pmcraid_ioarcb *ioarcb;
3650 struct pmcraid_cmd *cmd;
3651 struct pmcraid_cmd *cancel_cmd;
3397623b 3652 void __user *request_buffer;
89a36810
AR
3653 unsigned long request_offset;
3654 unsigned long lock_flags;
3397623b 3655 void __user *ioasa;
c20c4267 3656 u32 ioasc;
89a36810
AR
3657 int request_size;
3658 int buffer_size;
3659 u8 access, direction;
3660 int rc = 0;
3661
3662 /* If IOA reset is in progress, wait 10 secs for reset to complete */
3663 if (pinstance->ioa_reset_in_progress) {
3664 rc = wait_event_interruptible_timeout(
3665 pinstance->reset_wait_q,
3666 !pinstance->ioa_reset_in_progress,
3667 msecs_to_jiffies(10000));
3668
3669 if (!rc)
3670 return -ETIMEDOUT;
3671 else if (rc < 0)
3672 return -ERESTARTSYS;
3673 }
3674
3675 /* If adapter is not in operational state, return error */
3676 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3677 pmcraid_err("IOA is not operational\n");
3678 return -ENOTTY;
3679 }
3680
3681 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3682 buffer = kmalloc(buffer_size, GFP_KERNEL);
3683
3684 if (!buffer) {
3685 pmcraid_err("no memory for passthrough buffer\n");
3686 return -ENOMEM;
3687 }
3688
3689 request_offset =
3690 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3691
3692 request_buffer = arg + request_offset;
3693
edb88cef 3694 rc = copy_from_user(buffer, arg,
89a36810 3695 sizeof(struct pmcraid_passthrough_ioctl_buffer));
592488a3 3696
3397623b 3697 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
592488a3 3698
89a36810
AR
3699 if (rc) {
3700 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3701 rc = -EFAULT;
3702 goto out_free_buffer;
3703 }
3704
45c80be6 3705 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
89a36810
AR
3706
3707 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3708 access = VERIFY_READ;
3709 direction = DMA_TO_DEVICE;
3710 } else {
3711 access = VERIFY_WRITE;
3712 direction = DMA_FROM_DEVICE;
3713 }
3714
edb88cef 3715 if (request_size < 0) {
5f6279da
DR
3716 rc = -EINVAL;
3717 goto out_free_buffer;
89a36810
AR
3718 }
3719
3720 /* check if we have any additional command parameters */
45c80be6
AB
3721 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3722 > PMCRAID_ADD_CMD_PARAM_LEN) {
89a36810
AR
3723 rc = -EINVAL;
3724 goto out_free_buffer;
3725 }
3726
3727 cmd = pmcraid_get_free_cmd(pinstance);
3728
3729 if (!cmd) {
3730 pmcraid_err("free command block is not available\n");
3731 rc = -ENOMEM;
3732 goto out_free_buffer;
3733 }
3734
3735 cmd->scsi_cmd = NULL;
3736 ioarcb = &(cmd->ioa_cb->ioarcb);
3737
3738 /* Copy the user-provided IOARCB stuff field by field */
3739 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3740 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3741 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3742 ioarcb->request_type = buffer->ioarcb.request_type;
3743 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3744 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3745 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3746
3747 if (buffer->ioarcb.add_cmd_param_length) {
3748 ioarcb->add_cmd_param_length =
3749 buffer->ioarcb.add_cmd_param_length;
3750 ioarcb->add_cmd_param_offset =
3751 buffer->ioarcb.add_cmd_param_offset;
3752 memcpy(ioarcb->add_data.u.add_cmd_params,
3753 buffer->ioarcb.add_data.u.add_cmd_params,
45c80be6 3754 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
89a36810
AR
3755 }
3756
c20c4267
AR
3757 /* set hrrq number where the IOA should respond to. Note that all cmds
3758 * generated internally uses hrrq_id 0, exception to this is the cmd
3759 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3760 * hrrq_id assigned here in queuecommand
3761 */
3762 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3763 pinstance->num_hrrq;
3764
89a36810
AR
3765 if (request_size) {
3766 rc = pmcraid_build_passthrough_ioadls(cmd,
3767 request_size,
3768 direction);
3769 if (rc) {
3770 pmcraid_err("couldn't build passthrough ioadls\n");
2d76a247 3771 goto out_free_cmd;
89a36810
AR
3772 }
3773 }
3774
3775 /* If data is being written into the device, copy the data from user
3776 * buffers
3777 */
3778 if (direction == DMA_TO_DEVICE && request_size > 0) {
3779 rc = pmcraid_copy_sglist(cmd->sglist,
3780 request_buffer,
3781 request_size,
3782 direction);
3783 if (rc) {
3784 pmcraid_err("failed to copy user buffer\n");
3785 goto out_free_sglist;
3786 }
3787 }
3788
3789 /* passthrough ioctl is a blocking command so, put the user to sleep
3790 * until timeout. Note that a timeout value of 0 means, do timeout.
3791 */
3792 cmd->cmd_done = pmcraid_internal_done;
3793 init_completion(&cmd->wait_for_completion);
3794 cmd->completion_req = 1;
3795
3796 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3797 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3798 cmd->ioa_cb->ioarcb.cdb[0],
3799 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3800
3801 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3802 _pmcraid_fire_command(cmd);
3803 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3804
c20c4267
AR
3805 /* NOTE ! Remove the below line once abort_task is implemented
3806 * in firmware. This line disables ioctl command timeout handling logic
3807 * similar to IO command timeout handling, making ioctl commands to wait
3808 * until the command completion regardless of timeout value specified in
3809 * ioarcb
3810 */
3811 buffer->ioarcb.cmd_timeout = 0;
3812
89a36810
AR
3813 /* If command timeout is specified put caller to wait till that time,
3814 * otherwise it would be blocking wait. If command gets timed out, it
3815 * will be aborted.
3816 */
3817 if (buffer->ioarcb.cmd_timeout == 0) {
3818 wait_for_completion(&cmd->wait_for_completion);
3819 } else if (!wait_for_completion_timeout(
3820 &cmd->wait_for_completion,
45c80be6 3821 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
89a36810
AR
3822
3823 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
45c80be6 3824 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
89a36810
AR
3825 cmd->ioa_cb->ioarcb.cdb[0]);
3826
89a36810
AR
3827 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3828 cancel_cmd = pmcraid_abort_cmd(cmd);
3829 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3830
3831 if (cancel_cmd) {
3832 wait_for_completion(&cancel_cmd->wait_for_completion);
45c80be6 3833 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
89a36810 3834 pmcraid_return_cmd(cancel_cmd);
c20c4267
AR
3835
3836 /* if abort task couldn't find the command i.e it got
3837 * completed prior to aborting, return good completion.
25985edc 3838 * if command got aborted successfully or there was IOA
c20c4267
AR
3839 * reset due to abort task itself getting timedout then
3840 * return -ETIMEDOUT
3841 */
3842 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3843 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3844 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3845 rc = -ETIMEDOUT;
3846 goto out_handle_response;
3847 }
89a36810
AR
3848 }
3849
c20c4267
AR
3850 /* no command block for abort task or abort task failed to abort
3851 * the IOARCB, then wait for 150 more seconds and initiate reset
3852 * sequence after timeout
3853 */
3854 if (!wait_for_completion_timeout(
3855 &cmd->wait_for_completion,
3856 msecs_to_jiffies(150 * 1000))) {
3857 pmcraid_reset_bringup(cmd->drv_inst);
3858 rc = -ETIMEDOUT;
3859 }
89a36810
AR
3860 }
3861
c20c4267 3862out_handle_response:
592488a3
AR
3863 /* copy entire IOASA buffer and return IOCTL success.
3864 * If copying IOASA to user-buffer fails, return
89a36810
AR
3865 * EFAULT
3866 */
592488a3
AR
3867 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3868 sizeof(struct pmcraid_ioasa))) {
3869 pmcraid_err("failed to copy ioasa buffer to user\n");
3870 rc = -EFAULT;
89a36810 3871 }
c20c4267 3872
89a36810
AR
3873 /* If the data transfer was from device, copy the data onto user
3874 * buffers
3875 */
3876 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3877 rc = pmcraid_copy_sglist(cmd->sglist,
3878 request_buffer,
3879 request_size,
3880 direction);
3881 if (rc) {
3882 pmcraid_err("failed to copy user buffer\n");
3883 rc = -EFAULT;
3884 }
3885 }
3886
3887out_free_sglist:
3888 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
2d76a247
QL
3889
3890out_free_cmd:
89a36810
AR
3891 pmcraid_return_cmd(cmd);
3892
3893out_free_buffer:
3894 kfree(buffer);
3895
3896 return rc;
3897}
3898
3899
3900
3901
3902/**
3903 * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
3904 *
3905 * @pinstance: pointer to adapter instance structure
3906 * @cmd: ioctl command passed in
3907 * @buflen: length of user_buffer
3908 * @user_buffer: user buffer pointer
3909 *
3910 * Return Value
3911 * 0 in case of success, otherwise appropriate error code
3912 */
3913static long pmcraid_ioctl_driver(
3914 struct pmcraid_instance *pinstance,
3915 unsigned int cmd,
3916 unsigned int buflen,
3917 void __user *user_buffer
3918)
3919{
3920 int rc = -ENOSYS;
3921
89a36810
AR
3922 switch (cmd) {
3923 case PMCRAID_IOCTL_RESET_ADAPTER:
3924 pmcraid_reset_bringup(pinstance);
3925 rc = 0;
3926 break;
3927
3928 default:
3929 break;
3930 }
3931
3932 return rc;
3933}
3934
3935/**
3936 * pmcraid_check_ioctl_buffer - check for proper access to user buffer
3937 *
3938 * @cmd: ioctl command
3939 * @arg: user buffer
3940 * @hdr: pointer to kernel memory for pmcraid_ioctl_header
3941 *
3942 * Return Value
3943 * negetive error code if there are access issues, otherwise zero.
3944 * Upon success, returns ioctl header copied out of user buffer.
3945 */
3946
3947static int pmcraid_check_ioctl_buffer(
3948 int cmd,
3949 void __user *arg,
3950 struct pmcraid_ioctl_header *hdr
3951)
3952{
edb88cef 3953 int rc;
89a36810
AR
3954
3955 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3956 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3957 return -EFAULT;
3958 }
3959
3960 /* check for valid driver signature */
3961 rc = memcmp(hdr->signature,
3962 PMCRAID_IOCTL_SIGNATURE,
3963 sizeof(hdr->signature));
3964 if (rc) {
3965 pmcraid_err("signature verification failed\n");
3966 return -EINVAL;
3967 }
3968
89a36810
AR
3969 return 0;
3970}
3971
3972/**
3973 * pmcraid_ioctl - char node ioctl entry point
3974 */
3975static long pmcraid_chr_ioctl(
3976 struct file *filep,
3977 unsigned int cmd,
3978 unsigned long arg
3979)
3980{
3981 struct pmcraid_instance *pinstance = NULL;
3982 struct pmcraid_ioctl_header *hdr = NULL;
3397623b 3983 void __user *argp = (void __user *)arg;
89a36810
AR
3984 int retval = -ENOTTY;
3985
a63ec376 3986 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
89a36810
AR
3987
3988 if (!hdr) {
4f91b114 3989 pmcraid_err("failed to allocate memory for ioctl header\n");
89a36810
AR
3990 return -ENOMEM;
3991 }
3992
3397623b 3993 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
89a36810
AR
3994
3995 if (retval) {
3996 pmcraid_info("chr_ioctl: header check failed\n");
3997 kfree(hdr);
3998 return retval;
3999 }
4000
660bdddb 4001 pinstance = filep->private_data;
89a36810
AR
4002
4003 if (!pinstance) {
4004 pmcraid_info("adapter instance is not found\n");
4005 kfree(hdr);
4006 return -ENOTTY;
4007 }
4008
4009 switch (_IOC_TYPE(cmd)) {
4010
4011 case PMCRAID_PASSTHROUGH_IOCTL:
4012 /* If ioctl code is to download microcode, we need to block
4013 * mid-layer requests.
4014 */
4015 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4016 scsi_block_requests(pinstance->host);
4017
3397623b
AB
4018 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
4019 hdr->buffer_length, argp);
89a36810
AR
4020
4021 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4022 scsi_unblock_requests(pinstance->host);
4023 break;
4024
4025 case PMCRAID_DRIVER_IOCTL:
4026 arg += sizeof(struct pmcraid_ioctl_header);
3397623b
AB
4027 retval = pmcraid_ioctl_driver(pinstance, cmd,
4028 hdr->buffer_length, argp);
89a36810
AR
4029 break;
4030
4031 default:
4032 retval = -ENOTTY;
4033 break;
4034 }
4035
4036 kfree(hdr);
4037
4038 return retval;
4039}
4040
4041/**
4042 * File operations structure for management interface
4043 */
4044static const struct file_operations pmcraid_fops = {
4045 .owner = THIS_MODULE,
4046 .open = pmcraid_chr_open,
89a36810
AR
4047 .fasync = pmcraid_chr_fasync,
4048 .unlocked_ioctl = pmcraid_chr_ioctl,
4049#ifdef CONFIG_COMPAT
4050 .compat_ioctl = pmcraid_chr_ioctl,
4051#endif
6038f373 4052 .llseek = noop_llseek,
89a36810
AR
4053};
4054
4055
4056
4057
4058/**
4059 * pmcraid_show_log_level - Display adapter's error logging level
4060 * @dev: class device struct
4061 * @buf: buffer
4062 *
4063 * Return value:
4064 * number of bytes printed to buffer
4065 */
4066static ssize_t pmcraid_show_log_level(
4067 struct device *dev,
4068 struct device_attribute *attr,
4069 char *buf)
4070{
4071 struct Scsi_Host *shost = class_to_shost(dev);
4072 struct pmcraid_instance *pinstance =
4073 (struct pmcraid_instance *)shost->hostdata;
4074 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4075}
4076
4077/**
4078 * pmcraid_store_log_level - Change the adapter's error logging level
4079 * @dev: class device struct
4080 * @buf: buffer
4081 * @count: not used
4082 *
4083 * Return value:
4084 * number of bytes printed to buffer
4085 */
4086static ssize_t pmcraid_store_log_level(
4087 struct device *dev,
4088 struct device_attribute *attr,
4089 const char *buf,
4090 size_t count
4091)
4092{
4093 struct Scsi_Host *shost;
4094 struct pmcraid_instance *pinstance;
f7c65af5 4095 u8 val;
89a36810 4096
f7c65af5 4097 if (kstrtou8(buf, 10, &val))
89a36810
AR
4098 return -EINVAL;
4099 /* log-level should be from 0 to 2 */
4100 if (val > 2)
4101 return -EINVAL;
4102
4103 shost = class_to_shost(dev);
4104 pinstance = (struct pmcraid_instance *)shost->hostdata;
4105 pinstance->current_log_level = val;
4106
4107 return strlen(buf);
4108}
4109
4110static struct device_attribute pmcraid_log_level_attr = {
4111 .attr = {
4112 .name = "log_level",
4113 .mode = S_IRUGO | S_IWUSR,
4114 },
4115 .show = pmcraid_show_log_level,
4116 .store = pmcraid_store_log_level,
4117};
4118
4119/**
4120 * pmcraid_show_drv_version - Display driver version
4121 * @dev: class device struct
4122 * @buf: buffer
4123 *
4124 * Return value:
4125 * number of bytes printed to buffer
4126 */
4127static ssize_t pmcraid_show_drv_version(
4128 struct device *dev,
4129 struct device_attribute *attr,
4130 char *buf
4131)
4132{
a1b66665
MM
4133 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4134 PMCRAID_DRIVER_VERSION);
89a36810
AR
4135}
4136
4137static struct device_attribute pmcraid_driver_version_attr = {
4138 .attr = {
4139 .name = "drv_version",
4140 .mode = S_IRUGO,
4141 },
4142 .show = pmcraid_show_drv_version,
4143};
4144
4145/**
4146 * pmcraid_show_io_adapter_id - Display driver assigned adapter id
4147 * @dev: class device struct
4148 * @buf: buffer
4149 *
4150 * Return value:
4151 * number of bytes printed to buffer
4152 */
4153static ssize_t pmcraid_show_adapter_id(
4154 struct device *dev,
4155 struct device_attribute *attr,
4156 char *buf
4157)
4158{
4159 struct Scsi_Host *shost = class_to_shost(dev);
4160 struct pmcraid_instance *pinstance =
4161 (struct pmcraid_instance *)shost->hostdata;
4162 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4163 pinstance->pdev->devfn;
4164 u32 aen_group = pmcraid_event_family.id;
4165
4166 return snprintf(buf, PAGE_SIZE,
4167 "adapter id: %d\nminor: %d\naen group: %d\n",
4168 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4169}
4170
4171static struct device_attribute pmcraid_adapter_id_attr = {
4172 .attr = {
4173 .name = "adapter_id",
5a0ccb6b 4174 .mode = S_IRUGO,
89a36810
AR
4175 },
4176 .show = pmcraid_show_adapter_id,
4177};
4178
4179static struct device_attribute *pmcraid_host_attrs[] = {
4180 &pmcraid_log_level_attr,
4181 &pmcraid_driver_version_attr,
4182 &pmcraid_adapter_id_attr,
4183 NULL,
4184};
4185
4186
4187/* host template structure for pmcraid driver */
4188static struct scsi_host_template pmcraid_host_template = {
4189 .module = THIS_MODULE,
4190 .name = PMCRAID_DRIVER_NAME,
4191 .queuecommand = pmcraid_queuecommand,
4192 .eh_abort_handler = pmcraid_eh_abort_handler,
4193 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4194 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4195 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4196 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4197
4198 .slave_alloc = pmcraid_slave_alloc,
4199 .slave_configure = pmcraid_slave_configure,
4200 .slave_destroy = pmcraid_slave_destroy,
4201 .change_queue_depth = pmcraid_change_queue_depth,
89a36810
AR
4202 .can_queue = PMCRAID_MAX_IO_CMD,
4203 .this_id = -1,
4204 .sg_tablesize = PMCRAID_MAX_IOADLS,
4205 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
54b2b50c 4206 .no_write_same = 1,
89a36810
AR
4207 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4208 .use_clustering = ENABLE_CLUSTERING,
4209 .shost_attrs = pmcraid_host_attrs,
2ecb204d 4210 .proc_name = PMCRAID_DRIVER_NAME,
89a36810
AR
4211};
4212
c20c4267
AR
4213/*
4214 * pmcraid_isr_msix - implements MSI-X interrupt handling routine
4215 * @irq: interrupt vector number
4216 * @dev_id: pointer hrrq_vector
89a36810
AR
4217 *
4218 * Return Value
c20c4267 4219 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
89a36810 4220 */
c20c4267
AR
4221
4222static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
89a36810 4223{
c20c4267
AR
4224 struct pmcraid_isr_param *hrrq_vector;
4225 struct pmcraid_instance *pinstance;
4226 unsigned long lock_flags;
4227 u32 intrs_val;
4228 int hrrq_id;
4229
4230 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4231 hrrq_id = hrrq_vector->hrrq_id;
4232 pinstance = hrrq_vector->drv_inst;
4233
4234 if (!hrrq_id) {
4235 /* Read the interrupt */
4236 intrs_val = pmcraid_read_interrupts(pinstance);
4237 if (intrs_val &&
4238 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4239 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4240 /* Any error interrupts including unit_check,
4241 * initiate IOA reset.In case of unit check indicate
4242 * to reset_sequence that IOA unit checked and prepare
4243 * for a dump during reset sequence
4244 */
4245 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4246 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4247 pinstance->ioa_unit_check = 1;
4248
4249 pmcraid_err("ISR: error interrupts: %x \
4250 initiating reset\n", intrs_val);
4251 spin_lock_irqsave(pinstance->host->host_lock,
4252 lock_flags);
4253 pmcraid_initiate_reset(pinstance);
4254 spin_unlock_irqrestore(
4255 pinstance->host->host_lock,
4256 lock_flags);
4257 }
4258 /* If interrupt was as part of the ioa initialization,
4259 * clear it. Delete the timer and wakeup the
4260 * reset engine to proceed with reset sequence
4261 */
4262 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4263 pmcraid_clr_trans_op(pinstance);
4264
4265 /* Clear the interrupt register by writing
4266 * to host to ioa doorbell. Once done
4267 * FW will clear the interrupt.
4268 */
4269 iowrite32(DOORBELL_INTR_MSIX_CLR,
4270 pinstance->int_regs.host_ioa_interrupt_reg);
4271 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4272
89a36810 4273
c20c4267
AR
4274 }
4275 }
4276
4277 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4278
4279 return IRQ_HANDLED;
89a36810
AR
4280}
4281
4282/**
c20c4267 4283 * pmcraid_isr - implements legacy interrupt handling routine
89a36810
AR
4284 *
4285 * @irq: interrupt vector number
4286 * @dev_id: pointer hrrq_vector
4287 *
4288 * Return Value
4289 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
4290 */
4291static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4292{
4293 struct pmcraid_isr_param *hrrq_vector;
4294 struct pmcraid_instance *pinstance;
89a36810 4295 u32 intrs;
c20c4267
AR
4296 unsigned long lock_flags;
4297 int hrrq_id = 0;
89a36810
AR
4298
4299 /* In case of legacy interrupt mode where interrupts are shared across
4300 * isrs, it may be possible that the current interrupt is not from IOA
4301 */
4302 if (!dev_id) {
4303 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4304 return IRQ_NONE;
4305 }
89a36810
AR
4306 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4307 pinstance = hrrq_vector->drv_inst;
4308
89a36810
AR
4309 intrs = pmcraid_read_interrupts(pinstance);
4310
c20c4267 4311 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
89a36810 4312 return IRQ_NONE;
89a36810
AR
4313
4314 /* Any error interrupts including unit_check, initiate IOA reset.
4315 * In case of unit check indicate to reset_sequence that IOA unit
4316 * checked and prepare for a dump during reset sequence
4317 */
4318 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4319
4320 if (intrs & INTRS_IOA_UNIT_CHECK)
4321 pinstance->ioa_unit_check = 1;
4322
4323 iowrite32(intrs,
4324 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4325 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4326 intrs);
c20c4267
AR
4327 intrs = ioread32(
4328 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4329 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
89a36810 4330 pmcraid_initiate_reset(pinstance);
c20c4267 4331 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810 4332 } else {
c20c4267
AR
4333 /* If interrupt was as part of the ioa initialization,
4334 * clear. Delete the timer and wakeup the
4335 * reset engine to proceed with reset sequence
4336 */
4337 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4338 pmcraid_clr_trans_op(pinstance);
4339 } else {
4340 iowrite32(intrs,
4341 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4342 ioread32(
4343 pinstance->int_regs.ioa_host_interrupt_clr_reg);
89a36810 4344
c20c4267
AR
4345 tasklet_schedule(
4346 &(pinstance->isr_tasklet[hrrq_id]));
4347 }
4348 }
89a36810
AR
4349
4350 return IRQ_HANDLED;
4351}
4352
4353
4354/**
4355 * pmcraid_worker_function - worker thread function
4356 *
4357 * @workp: pointer to struct work queue
4358 *
4359 * Return Value
4360 * None
4361 */
4362
4363static void pmcraid_worker_function(struct work_struct *workp)
4364{
4365 struct pmcraid_instance *pinstance;
4366 struct pmcraid_resource_entry *res;
4367 struct pmcraid_resource_entry *temp;
4368 struct scsi_device *sdev;
4369 unsigned long lock_flags;
4370 unsigned long host_lock_flags;
c20c4267 4371 u16 fw_version;
89a36810
AR
4372 u8 bus, target, lun;
4373
4374 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4375 /* add resources only after host is added into system */
4376 if (!atomic_read(&pinstance->expose_resources))
4377 return;
4378
c20c4267
AR
4379 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4380
89a36810
AR
4381 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4382 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4383
4384 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4385 sdev = res->scsi_dev;
4386
4387 /* host_lock must be held before calling
4388 * scsi_device_get
4389 */
4390 spin_lock_irqsave(pinstance->host->host_lock,
4391 host_lock_flags);
4392 if (!scsi_device_get(sdev)) {
4393 spin_unlock_irqrestore(
4394 pinstance->host->host_lock,
4395 host_lock_flags);
4396 pmcraid_info("deleting %x from midlayer\n",
4397 res->cfg_entry.resource_address);
4398 list_move_tail(&res->queue,
4399 &pinstance->free_res_q);
4400 spin_unlock_irqrestore(
4401 &pinstance->resource_lock,
4402 lock_flags);
4403 scsi_remove_device(sdev);
4404 scsi_device_put(sdev);
4405 spin_lock_irqsave(&pinstance->resource_lock,
4406 lock_flags);
4407 res->change_detected = 0;
4408 } else {
4409 spin_unlock_irqrestore(
4410 pinstance->host->host_lock,
4411 host_lock_flags);
4412 }
4413 }
4414 }
4415
4416 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4417
4418 if (res->change_detected == RES_CHANGE_ADD) {
4419
c20c4267
AR
4420 if (!pmcraid_expose_resource(fw_version,
4421 &res->cfg_entry))
89a36810
AR
4422 continue;
4423
4424 if (RES_IS_VSET(res->cfg_entry)) {
4425 bus = PMCRAID_VSET_BUS_ID;
c20c4267
AR
4426 if (fw_version <= PMCRAID_FW_VERSION_1)
4427 target = res->cfg_entry.unique_flags1;
4428 else
45c80be6 4429 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
89a36810
AR
4430 lun = PMCRAID_VSET_LUN_ID;
4431 } else {
4432 bus = PMCRAID_PHYS_BUS_ID;
4433 target =
4434 RES_TARGET(
4435 res->cfg_entry.resource_address);
4436 lun = RES_LUN(res->cfg_entry.resource_address);
4437 }
4438
4439 res->change_detected = 0;
4440 spin_unlock_irqrestore(&pinstance->resource_lock,
4441 lock_flags);
4442 scsi_add_device(pinstance->host, bus, target, lun);
4443 spin_lock_irqsave(&pinstance->resource_lock,
4444 lock_flags);
4445 }
4446 }
4447
4448 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4449}
4450
4451/**
4452 * pmcraid_tasklet_function - Tasklet function
4453 *
4454 * @instance: pointer to msix param structure
4455 *
4456 * Return Value
4457 * None
4458 */
c20c4267 4459static void pmcraid_tasklet_function(unsigned long instance)
89a36810
AR
4460{
4461 struct pmcraid_isr_param *hrrq_vector;
4462 struct pmcraid_instance *pinstance;
4463 unsigned long hrrq_lock_flags;
4464 unsigned long pending_lock_flags;
4465 unsigned long host_lock_flags;
4466 spinlock_t *lockp; /* hrrq buffer lock */
4467 int id;
45c80be6 4468 u32 resp;
89a36810
AR
4469
4470 hrrq_vector = (struct pmcraid_isr_param *)instance;
4471 pinstance = hrrq_vector->drv_inst;
4472 id = hrrq_vector->hrrq_id;
4473 lockp = &(pinstance->hrrq_lock[id]);
89a36810
AR
4474
4475 /* loop through each of the commands responded by IOA. Each HRRQ buf is
4476 * protected by its own lock. Traversals must be done within this lock
4477 * as there may be multiple tasklets running on multiple CPUs. Note
4478 * that the lock is held just for picking up the response handle and
4479 * manipulating hrrq_curr/toggle_bit values.
4480 */
4481 spin_lock_irqsave(lockp, hrrq_lock_flags);
4482
4483 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4484
4485 while ((resp & HRRQ_TOGGLE_BIT) ==
4486 pinstance->host_toggle_bit[id]) {
4487
4488 int cmd_index = resp >> 2;
4489 struct pmcraid_cmd *cmd = NULL;
4490
89a36810
AR
4491 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4492 pinstance->hrrq_curr[id]++;
4493 } else {
4494 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4495 pinstance->host_toggle_bit[id] ^= 1u;
4496 }
4497
c20c4267
AR
4498 if (cmd_index >= PMCRAID_MAX_CMD) {
4499 /* In case of invalid response handle, log message */
4500 pmcraid_err("Invalid response handle %d\n", cmd_index);
4501 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4502 continue;
4503 }
4504
4505 cmd = pinstance->cmd_list[cmd_index];
89a36810
AR
4506 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4507
4508 spin_lock_irqsave(&pinstance->pending_pool_lock,
4509 pending_lock_flags);
4510 list_del(&cmd->free_list);
4511 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4512 pending_lock_flags);
4513 del_timer(&cmd->timer);
4514 atomic_dec(&pinstance->outstanding_cmds);
4515
4516 if (cmd->cmd_done == pmcraid_ioa_reset) {
4517 spin_lock_irqsave(pinstance->host->host_lock,
4518 host_lock_flags);
4519 cmd->cmd_done(cmd);
4520 spin_unlock_irqrestore(pinstance->host->host_lock,
4521 host_lock_flags);
4522 } else if (cmd->cmd_done != NULL) {
4523 cmd->cmd_done(cmd);
4524 }
4525 /* loop over until we are done with all responses */
4526 spin_lock_irqsave(lockp, hrrq_lock_flags);
4527 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4528 }
4529
4530 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4531}
4532
4533/**
4534 * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
4535 * @pinstance: pointer to adapter instance structure
4536 *
4537 * This routine un-registers registered interrupt handler and
4538 * also frees irqs/vectors.
4539 *
4540 * Retun Value
4541 * None
4542 */
4543static
4544void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4545{
eab5c150 4546 struct pci_dev *pdev = pinstance->pdev;
c20c4267
AR
4547 int i;
4548
4549 for (i = 0; i < pinstance->num_hrrq; i++)
eab5c150 4550 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
c20c4267 4551
eab5c150
CH
4552 pinstance->interrupt_mode = 0;
4553 pci_free_irq_vectors(pdev);
89a36810
AR
4554}
4555
4556/**
4557 * pmcraid_register_interrupt_handler - registers interrupt handler
4558 * @pinstance: pointer to per-adapter instance structure
4559 *
4560 * Return Value
4561 * 0 on success, non-zero error code otherwise.
4562 */
4563static int
4564pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4565{
4566 struct pci_dev *pdev = pinstance->pdev;
eab5c150
CH
4567 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4568 int num_hrrq, rc, i;
4569 irq_handler_t isr;
89a36810 4570
eab5c150
CH
4571 if (pmcraid_enable_msix)
4572 irq_flag |= PCI_IRQ_MSIX;
4573
4574 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4575 irq_flag);
4576 if (num_hrrq < 0)
4577 return num_hrrq;
4578
4579 if (pdev->msix_enabled) {
4580 flag = 0;
4581 isr = pmcraid_isr_msix;
4582 } else {
4583 flag = IRQF_SHARED;
4584 isr = pmcraid_isr;
4585 }
4586
4587 for (i = 0; i < num_hrrq; i++) {
4588 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4589
4590 vec->hrrq_id = i;
4591 vec->drv_inst = pinstance;
4592 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4593 PMCRAID_DRIVER_NAME, vec);
4594 if (rc)
4595 goto out_unwind;
4596 }
c20c4267 4597
eab5c150
CH
4598 pinstance->num_hrrq = num_hrrq;
4599 if (pdev->msix_enabled) {
c20c4267
AR
4600 pinstance->interrupt_mode = 1;
4601 iowrite32(DOORBELL_INTR_MODE_MSIX,
4602 pinstance->int_regs.host_ioa_interrupt_reg);
4603 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267
AR
4604 }
4605
eab5c150
CH
4606 return 0;
4607
4608out_unwind:
4609 while (--i > 0)
4610 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4611 pci_free_irq_vectors(pdev);
c20c4267 4612 return rc;
89a36810
AR
4613}
4614
4615/**
4616 * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
4617 * @pinstance: per adapter instance structure pointer
4618 * @max_index: number of buffer blocks to release
4619 *
4620 * Return Value
4621 * None
4622 */
4623static void
4624pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4625{
4626 int i;
4627 for (i = 0; i < max_index; i++) {
4628 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4629 pinstance->cmd_list[i] = NULL;
4630 }
4631 kmem_cache_destroy(pinstance->cmd_cachep);
4632 pinstance->cmd_cachep = NULL;
4633}
4634
4635/**
4636 * pmcraid_release_control_blocks - releases buffers alloced for control blocks
4637 * @pinstance: pointer to per adapter instance structure
4638 * @max_index: number of buffers (from 0 onwards) to release
4639 *
4640 * This function assumes that the command blocks for which control blocks are
4641 * linked are not released.
4642 *
4643 * Return Value
4644 * None
4645 */
4646static void
4647pmcraid_release_control_blocks(
4648 struct pmcraid_instance *pinstance,
4649 int max_index
4650)
4651{
4652 int i;
4653
4654 if (pinstance->control_pool == NULL)
4655 return;
4656
4657 for (i = 0; i < max_index; i++) {
4658 pci_pool_free(pinstance->control_pool,
4659 pinstance->cmd_list[i]->ioa_cb,
4660 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4661 pinstance->cmd_list[i]->ioa_cb = NULL;
4662 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4663 }
4664 pci_pool_destroy(pinstance->control_pool);
4665 pinstance->control_pool = NULL;
4666}
4667
4668/**
4669 * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
4670 * @pinstance - pointer to per adapter instance structure
4671 *
4672 * Allocates memory for command blocks using kernel slab allocator.
4673 *
4674 * Return Value
4675 * 0 in case of success; -ENOMEM in case of failure
4676 */
6f039790 4677static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4678{
4679 int i;
4680
4681 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4682 pinstance->host->unique_id);
4683
4684
4685 pinstance->cmd_cachep = kmem_cache_create(
4686 pinstance->cmd_pool_name,
4687 sizeof(struct pmcraid_cmd), 0,
4688 SLAB_HWCACHE_ALIGN, NULL);
4689 if (!pinstance->cmd_cachep)
4690 return -ENOMEM;
4691
4692 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4693 pinstance->cmd_list[i] =
4694 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4695 if (!pinstance->cmd_list[i]) {
4696 pmcraid_release_cmd_blocks(pinstance, i);
4697 return -ENOMEM;
4698 }
4699 }
4700 return 0;
4701}
4702
4703/**
4704 * pmcraid_allocate_control_blocks - allocates memory control blocks
4705 * @pinstance : pointer to per adapter instance structure
4706 *
4707 * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
4708 * and IOASAs. This is called after command blocks are already allocated.
4709 *
4710 * Return Value
4711 * 0 in case it can allocate all control blocks, otherwise -ENOMEM
4712 */
6f039790 4713static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4714{
4715 int i;
4716
4717 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4718 pinstance->host->unique_id);
4719
4720 pinstance->control_pool =
4721 pci_pool_create(pinstance->ctl_pool_name,
4722 pinstance->pdev,
4723 sizeof(struct pmcraid_control_block),
4724 PMCRAID_IOARCB_ALIGNMENT, 0);
4725
4726 if (!pinstance->control_pool)
4727 return -ENOMEM;
4728
4729 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4730 pinstance->cmd_list[i]->ioa_cb =
4731 pci_pool_alloc(
4732 pinstance->control_pool,
4733 GFP_KERNEL,
4734 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4735
4736 if (!pinstance->cmd_list[i]->ioa_cb) {
4737 pmcraid_release_control_blocks(pinstance, i);
4738 return -ENOMEM;
4739 }
4740 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4741 sizeof(struct pmcraid_control_block));
4742 }
4743 return 0;
4744}
4745
4746/**
4747 * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
4748 * @pinstance: pointer to per adapter instance structure
4749 * @maxindex: size of hrrq buffer pointer array
4750 *
4751 * Return Value
4752 * None
4753 */
4754static void
4755pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4756{
4757 int i;
4758 for (i = 0; i < maxindex; i++) {
4759
4760 pci_free_consistent(pinstance->pdev,
4761 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4762 pinstance->hrrq_start[i],
4763 pinstance->hrrq_start_bus_addr[i]);
4764
4765 /* reset pointers and toggle bit to zeros */
4766 pinstance->hrrq_start[i] = NULL;
4767 pinstance->hrrq_start_bus_addr[i] = 0;
4768 pinstance->host_toggle_bit[i] = 0;
4769 }
4770}
4771
4772/**
4773 * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
4774 * @pinstance: pointer to per adapter instance structure
4775 *
4776 * Return value
4777 * 0 hrrq buffers are allocated, -ENOMEM otherwise.
4778 */
6f039790 4779static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
89a36810 4780{
c20c4267 4781 int i, buffer_size;
89a36810 4782
c20c4267 4783 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
89a36810 4784
c20c4267 4785 for (i = 0; i < pinstance->num_hrrq; i++) {
89a36810
AR
4786 pinstance->hrrq_start[i] =
4787 pci_alloc_consistent(
4788 pinstance->pdev,
4789 buffer_size,
4790 &(pinstance->hrrq_start_bus_addr[i]));
4791
144b139c 4792 if (!pinstance->hrrq_start[i]) {
c20c4267
AR
4793 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4794 i);
89a36810
AR
4795 pmcraid_release_host_rrqs(pinstance, i);
4796 return -ENOMEM;
4797 }
4798
4799 memset(pinstance->hrrq_start[i], 0, buffer_size);
4800 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4801 pinstance->hrrq_end[i] =
c20c4267 4802 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
89a36810
AR
4803 pinstance->host_toggle_bit[i] = 1;
4804 spin_lock_init(&pinstance->hrrq_lock[i]);
4805 }
4806 return 0;
4807}
4808
4809/**
4810 * pmcraid_release_hcams - release HCAM buffers
4811 *
4812 * @pinstance: pointer to per adapter instance structure
4813 *
4814 * Return value
4815 * none
4816 */
4817static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4818{
4819 if (pinstance->ccn.msg != NULL) {
4820 pci_free_consistent(pinstance->pdev,
4821 PMCRAID_AEN_HDR_SIZE +
c20c4267 4822 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4823 pinstance->ccn.msg,
4824 pinstance->ccn.baddr);
4825
4826 pinstance->ccn.msg = NULL;
4827 pinstance->ccn.hcam = NULL;
4828 pinstance->ccn.baddr = 0;
4829 }
4830
4831 if (pinstance->ldn.msg != NULL) {
4832 pci_free_consistent(pinstance->pdev,
4833 PMCRAID_AEN_HDR_SIZE +
4834 sizeof(struct pmcraid_hcam_ldn),
4835 pinstance->ldn.msg,
4836 pinstance->ldn.baddr);
4837
4838 pinstance->ldn.msg = NULL;
4839 pinstance->ldn.hcam = NULL;
4840 pinstance->ldn.baddr = 0;
4841 }
4842}
4843
4844/**
4845 * pmcraid_allocate_hcams - allocates HCAM buffers
4846 * @pinstance : pointer to per adapter instance structure
4847 *
4848 * Return Value:
4849 * 0 in case of successful allocation, non-zero otherwise
4850 */
4851static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4852{
4853 pinstance->ccn.msg = pci_alloc_consistent(
4854 pinstance->pdev,
4855 PMCRAID_AEN_HDR_SIZE +
c20c4267 4856 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4857 &(pinstance->ccn.baddr));
4858
4859 pinstance->ldn.msg = pci_alloc_consistent(
4860 pinstance->pdev,
4861 PMCRAID_AEN_HDR_SIZE +
4862 sizeof(struct pmcraid_hcam_ldn),
4863 &(pinstance->ldn.baddr));
4864
4865 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4866 pmcraid_release_hcams(pinstance);
4867 } else {
4868 pinstance->ccn.hcam =
4869 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4870 pinstance->ldn.hcam =
4871 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4872
4873 atomic_set(&pinstance->ccn.ignore, 0);
4874 atomic_set(&pinstance->ldn.ignore, 0);
4875 }
4876
4877 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4878}
4879
4880/**
4881 * pmcraid_release_config_buffers - release config.table buffers
4882 * @pinstance: pointer to per adapter instance structure
4883 *
4884 * Return Value
4885 * none
4886 */
4887static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4888{
4889 if (pinstance->cfg_table != NULL &&
4890 pinstance->cfg_table_bus_addr != 0) {
4891 pci_free_consistent(pinstance->pdev,
4892 sizeof(struct pmcraid_config_table),
4893 pinstance->cfg_table,
4894 pinstance->cfg_table_bus_addr);
4895 pinstance->cfg_table = NULL;
4896 pinstance->cfg_table_bus_addr = 0;
4897 }
4898
4899 if (pinstance->res_entries != NULL) {
4900 int i;
4901
4902 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4903 list_del(&pinstance->res_entries[i].queue);
4904 kfree(pinstance->res_entries);
4905 pinstance->res_entries = NULL;
4906 }
4907
4908 pmcraid_release_hcams(pinstance);
4909}
4910
4911/**
4912 * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
4913 * @pinstance : pointer to per adapter instance structure
4914 *
4915 * Return Value
4916 * 0 for successful allocation, -ENOMEM for any failure
4917 */
6f039790 4918static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4919{
4920 int i;
4921
4922 pinstance->res_entries =
4923 kzalloc(sizeof(struct pmcraid_resource_entry) *
4924 PMCRAID_MAX_RESOURCES, GFP_KERNEL);
4925
4926 if (NULL == pinstance->res_entries) {
4927 pmcraid_err("failed to allocate memory for resource table\n");
4928 return -ENOMEM;
4929 }
4930
4931 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4932 list_add_tail(&pinstance->res_entries[i].queue,
4933 &pinstance->free_res_q);
4934
4935 pinstance->cfg_table =
4936 pci_alloc_consistent(pinstance->pdev,
4937 sizeof(struct pmcraid_config_table),
4938 &pinstance->cfg_table_bus_addr);
4939
4940 if (NULL == pinstance->cfg_table) {
4941 pmcraid_err("couldn't alloc DMA memory for config table\n");
4942 pmcraid_release_config_buffers(pinstance);
4943 return -ENOMEM;
4944 }
4945
4946 if (pmcraid_allocate_hcams(pinstance)) {
4947 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4948 pmcraid_release_config_buffers(pinstance);
4949 return -ENOMEM;
4950 }
4951
4952 return 0;
4953}
4954
4955/**
4956 * pmcraid_init_tasklets - registers tasklets for response handling
4957 *
4958 * @pinstance: pointer adapter instance structure
4959 *
4960 * Return value
4961 * none
4962 */
4963static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4964{
4965 int i;
4966 for (i = 0; i < pinstance->num_hrrq; i++)
4967 tasklet_init(&pinstance->isr_tasklet[i],
4968 pmcraid_tasklet_function,
4969 (unsigned long)&pinstance->hrrq_vector[i]);
4970}
4971
4972/**
4973 * pmcraid_kill_tasklets - destroys tasklets registered for response handling
4974 *
4975 * @pinstance: pointer to adapter instance structure
4976 *
4977 * Return value
4978 * none
4979 */
4980static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4981{
4982 int i;
4983 for (i = 0; i < pinstance->num_hrrq; i++)
4984 tasklet_kill(&pinstance->isr_tasklet[i]);
4985}
4986
c20c4267
AR
4987/**
4988 * pmcraid_release_buffers - release per-adapter buffers allocated
4989 *
4990 * @pinstance: pointer to adapter soft state
4991 *
4992 * Return Value
4993 * none
4994 */
4995static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4996{
4997 pmcraid_release_config_buffers(pinstance);
4998 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4999 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5000 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5001
5002 if (pinstance->inq_data != NULL) {
5003 pci_free_consistent(pinstance->pdev,
5004 sizeof(struct pmcraid_inquiry_data),
5005 pinstance->inq_data,
5006 pinstance->inq_data_baddr);
5007
5008 pinstance->inq_data = NULL;
5009 pinstance->inq_data_baddr = 0;
5010 }
592488a3
AR
5011
5012 if (pinstance->timestamp_data != NULL) {
5013 pci_free_consistent(pinstance->pdev,
5014 sizeof(struct pmcraid_timestamp_data),
5015 pinstance->timestamp_data,
5016 pinstance->timestamp_data_baddr);
5017
5018 pinstance->timestamp_data = NULL;
5019 pinstance->timestamp_data_baddr = 0;
5020 }
c20c4267
AR
5021}
5022
89a36810
AR
5023/**
5024 * pmcraid_init_buffers - allocates memory and initializes various structures
5025 * @pinstance: pointer to per adapter instance structure
5026 *
5027 * This routine pre-allocates memory based on the type of block as below:
5028 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
5029 * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
5030 * config-table entries : DMAable memory using pci_alloc_consistent
5031 * HostRRQs : DMAable memory, using pci_alloc_consistent
5032 *
5033 * Return Value
5034 * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
5035 */
6f039790 5036static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
5037{
5038 int i;
5039
5040 if (pmcraid_allocate_host_rrqs(pinstance)) {
5041 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
5042 pinstance->num_hrrq);
5043 return -ENOMEM;
5044 }
5045
5046 if (pmcraid_allocate_config_buffers(pinstance)) {
5047 pmcraid_err("couldn't allocate memory for config buffers\n");
5048 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5049 return -ENOMEM;
5050 }
5051
5052 if (pmcraid_allocate_cmd_blocks(pinstance)) {
c20c4267 5053 pmcraid_err("couldn't allocate memory for cmd blocks\n");
89a36810
AR
5054 pmcraid_release_config_buffers(pinstance);
5055 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5056 return -ENOMEM;
5057 }
5058
5059 if (pmcraid_allocate_control_blocks(pinstance)) {
c20c4267 5060 pmcraid_err("couldn't allocate memory control blocks\n");
89a36810
AR
5061 pmcraid_release_config_buffers(pinstance);
5062 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5063 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5064 return -ENOMEM;
5065 }
5066
c20c4267
AR
5067 /* allocate DMAable memory for page D0 INQUIRY buffer */
5068 pinstance->inq_data = pci_alloc_consistent(
5069 pinstance->pdev,
5070 sizeof(struct pmcraid_inquiry_data),
5071 &pinstance->inq_data_baddr);
5072
5073 if (pinstance->inq_data == NULL) {
5074 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
5075 pmcraid_release_buffers(pinstance);
5076 return -ENOMEM;
5077 }
5078
592488a3
AR
5079 /* allocate DMAable memory for set timestamp data buffer */
5080 pinstance->timestamp_data = pci_alloc_consistent(
5081 pinstance->pdev,
5082 sizeof(struct pmcraid_timestamp_data),
5083 &pinstance->timestamp_data_baddr);
5084
5085 if (pinstance->timestamp_data == NULL) {
5086 pmcraid_err("couldn't allocate DMA memory for \
5087 set time_stamp \n");
5088 pmcraid_release_buffers(pinstance);
5089 return -ENOMEM;
5090 }
5091
5092
89a36810
AR
5093 /* Initialize all the command blocks and add them to free pool. No
5094 * need to lock (free_pool_lock) as this is done in initialization
5095 * itself
5096 */
5097 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5098 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5099 pmcraid_init_cmdblk(cmdp, i);
5100 cmdp->drv_inst = pinstance;
5101 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5102 }
5103
5104 return 0;
5105}
5106
5107/**
5108 * pmcraid_reinit_buffers - resets various buffer pointers
5109 * @pinstance: pointer to adapter instance
5110 * Return value
c20c4267 5111 * none
89a36810
AR
5112 */
5113static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5114{
5115 int i;
5116 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5117
5118 for (i = 0; i < pinstance->num_hrrq; i++) {
5119 memset(pinstance->hrrq_start[i], 0, buffer_size);
5120 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5121 pinstance->hrrq_end[i] =
5122 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5123 pinstance->host_toggle_bit[i] = 1;
5124 }
5125}
5126
5127/**
5128 * pmcraid_init_instance - initialize per instance data structure
5129 * @pdev: pointer to pci device structure
5130 * @host: pointer to Scsi_Host structure
5131 * @mapped_pci_addr: memory mapped IOA configuration registers
5132 *
5133 * Return Value
5134 * 0 on success, non-zero in case of any failure
5135 */
6f039790
GKH
5136static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5137 void __iomem *mapped_pci_addr)
89a36810
AR
5138{
5139 struct pmcraid_instance *pinstance =
5140 (struct pmcraid_instance *)host->hostdata;
5141
5142 pinstance->host = host;
5143 pinstance->pdev = pdev;
5144
5145 /* Initialize register addresses */
5146 pinstance->mapped_dma_addr = mapped_pci_addr;
5147
5148 /* Initialize chip-specific details */
5149 {
5150 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5151 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5152
5153 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5154
5155 pint_regs->ioa_host_interrupt_reg =
5156 mapped_pci_addr + chip_cfg->ioa_host_intr;
5157 pint_regs->ioa_host_interrupt_clr_reg =
5158 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
c20c4267
AR
5159 pint_regs->ioa_host_msix_interrupt_reg =
5160 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
89a36810
AR
5161 pint_regs->host_ioa_interrupt_reg =
5162 mapped_pci_addr + chip_cfg->host_ioa_intr;
5163 pint_regs->host_ioa_interrupt_clr_reg =
5164 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5165
5166 /* Current version of firmware exposes interrupt mask set
5167 * and mask clr registers through memory mapped bar0.
5168 */
5169 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5170 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5171 pint_regs->ioa_host_interrupt_mask_reg =
5172 mapped_pci_addr + chip_cfg->ioa_host_mask;
5173 pint_regs->ioa_host_interrupt_mask_clr_reg =
5174 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5175 pint_regs->global_interrupt_mask_reg =
5176 mapped_pci_addr + chip_cfg->global_intr_mask;
5177 };
5178
5179 pinstance->ioa_reset_attempts = 0;
5180 init_waitqueue_head(&pinstance->reset_wait_q);
5181
5182 atomic_set(&pinstance->outstanding_cmds, 0);
c20c4267 5183 atomic_set(&pinstance->last_message_id, 0);
89a36810
AR
5184 atomic_set(&pinstance->expose_resources, 0);
5185
5186 INIT_LIST_HEAD(&pinstance->free_res_q);
5187 INIT_LIST_HEAD(&pinstance->used_res_q);
5188 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5189 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5190
5191 spin_lock_init(&pinstance->free_pool_lock);
5192 spin_lock_init(&pinstance->pending_pool_lock);
5193 spin_lock_init(&pinstance->resource_lock);
5194 mutex_init(&pinstance->aen_queue_lock);
5195
5196 /* Work-queue (Shared) for deferred processing error handling */
5197 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5198
5199 /* Initialize the default log_level */
5200 pinstance->current_log_level = pmcraid_log_level;
5201
5202 /* Setup variables required for reset engine */
5203 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5204 pinstance->reset_cmd = NULL;
5205 return 0;
5206}
5207
89a36810
AR
5208/**
5209 * pmcraid_shutdown - shutdown adapter controller.
5210 * @pdev: pci device struct
5211 *
5212 * Issues an adapter shutdown to the card waits for its completion
5213 *
5214 * Return value
5215 * none
5216 */
5217static void pmcraid_shutdown(struct pci_dev *pdev)
5218{
5219 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5220 pmcraid_reset_bringdown(pinstance);
5221}
5222
5223
5224/**
5225 * pmcraid_get_minor - returns unused minor number from minor number bitmap
5226 */
5227static unsigned short pmcraid_get_minor(void)
5228{
5229 int minor;
5230
5231 minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
5232 __set_bit(minor, pmcraid_minor);
5233 return minor;
5234}
5235
5236/**
5237 * pmcraid_release_minor - releases given minor back to minor number bitmap
5238 */
5239static void pmcraid_release_minor(unsigned short minor)
5240{
5241 __clear_bit(minor, pmcraid_minor);
5242}
5243
5244/**
5245 * pmcraid_setup_chrdev - allocates a minor number and registers a char device
5246 *
5247 * @pinstance: pointer to adapter instance for which to register device
5248 *
5249 * Return value
5250 * 0 in case of success, otherwise non-zero
5251 */
5252static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5253{
5254 int minor;
5255 int error;
5256
5257 minor = pmcraid_get_minor();
5258 cdev_init(&pinstance->cdev, &pmcraid_fops);
5259 pinstance->cdev.owner = THIS_MODULE;
5260
5261 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5262
5263 if (error)
5264 pmcraid_release_minor(minor);
5265 else
5266 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
c20c4267 5267 NULL, "%s%u", PMCRAID_DEVFILE, minor);
89a36810
AR
5268 return error;
5269}
5270
5271/**
5272 * pmcraid_release_chrdev - unregisters per-adapter management interface
5273 *
5274 * @pinstance: pointer to adapter instance structure
5275 *
5276 * Return value
5277 * none
5278 */
5279static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5280{
5281 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5282 device_destroy(pmcraid_class,
5283 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5284 cdev_del(&pinstance->cdev);
5285}
5286
5287/**
5288 * pmcraid_remove - IOA hot plug remove entry point
5289 * @pdev: pci device struct
5290 *
5291 * Return value
5292 * none
5293 */
6f039790 5294static void pmcraid_remove(struct pci_dev *pdev)
89a36810
AR
5295{
5296 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5297
5298 /* remove the management interface (/dev file) for this device */
5299 pmcraid_release_chrdev(pinstance);
5300
5301 /* remove host template from scsi midlayer */
5302 scsi_remove_host(pinstance->host);
5303
5304 /* block requests from mid-layer */
5305 scsi_block_requests(pinstance->host);
5306
5307 /* initiate shutdown adapter */
5308 pmcraid_shutdown(pdev);
5309
5310 pmcraid_disable_interrupts(pinstance, ~0);
43829731 5311 flush_work(&pinstance->worker_q);
89a36810
AR
5312
5313 pmcraid_kill_tasklets(pinstance);
5314 pmcraid_unregister_interrupt_handler(pinstance);
5315 pmcraid_release_buffers(pinstance);
5316 iounmap(pinstance->mapped_dma_addr);
5317 pci_release_regions(pdev);
5318 scsi_host_put(pinstance->host);
5319 pci_disable_device(pdev);
5320
5321 return;
5322}
5323
5324#ifdef CONFIG_PM
5325/**
5326 * pmcraid_suspend - driver suspend entry point for power management
5327 * @pdev: PCI device structure
5328 * @state: PCI power state to suspend routine
5329 *
5330 * Return Value - 0 always
5331 */
5332static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5333{
5334 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5335
5336 pmcraid_shutdown(pdev);
5337 pmcraid_disable_interrupts(pinstance, ~0);
5338 pmcraid_kill_tasklets(pinstance);
5339 pci_set_drvdata(pinstance->pdev, pinstance);
5340 pmcraid_unregister_interrupt_handler(pinstance);
5341 pci_save_state(pdev);
5342 pci_disable_device(pdev);
5343 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5344
5345 return 0;
5346}
5347
5348/**
5349 * pmcraid_resume - driver resume entry point PCI power management
5350 * @pdev: PCI device structure
5351 *
5352 * Return Value - 0 in case of success. Error code in case of any failure
5353 */
5354static int pmcraid_resume(struct pci_dev *pdev)
5355{
5356 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5357 struct Scsi_Host *host = pinstance->host;
5358 int rc;
89a36810
AR
5359
5360 pci_set_power_state(pdev, PCI_D0);
5361 pci_enable_wake(pdev, PCI_D0, 0);
5362 pci_restore_state(pdev);
5363
5364 rc = pci_enable_device(pdev);
5365
5366 if (rc) {
34876402 5367 dev_err(&pdev->dev, "resume: Enable device failed\n");
89a36810
AR
5368 return rc;
5369 }
5370
5371 pci_set_master(pdev);
5372
5373 if ((sizeof(dma_addr_t) == 4) ||
5374 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5375 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5376
5377 if (rc == 0)
5378 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5379
5380 if (rc != 0) {
34876402 5381 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
89a36810
AR
5382 goto disable_device;
5383 }
5384
c20c4267 5385 pmcraid_disable_interrupts(pinstance, ~0);
89a36810 5386 atomic_set(&pinstance->outstanding_cmds, 0);
89a36810
AR
5387 rc = pmcraid_register_interrupt_handler(pinstance);
5388
5389 if (rc) {
34876402
AR
5390 dev_err(&pdev->dev,
5391 "resume: couldn't register interrupt handlers\n");
89a36810
AR
5392 rc = -ENODEV;
5393 goto release_host;
5394 }
5395
5396 pmcraid_init_tasklets(pinstance);
5397 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5398
5399 /* Start with hard reset sequence which brings up IOA to operational
5400 * state as well as completes the reset sequence.
5401 */
5402 pinstance->ioa_hard_reset = 1;
5403
5404 /* Start IOA firmware initialization and bring card to Operational
5405 * state.
5406 */
5407 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5408 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5409 rc = -ENODEV;
5410 goto release_tasklets;
5411 }
5412
5413 return 0;
5414
5415release_tasklets:
c20c4267 5416 pmcraid_disable_interrupts(pinstance, ~0);
89a36810
AR
5417 pmcraid_kill_tasklets(pinstance);
5418 pmcraid_unregister_interrupt_handler(pinstance);
5419
5420release_host:
5421 scsi_host_put(host);
5422
5423disable_device:
5424 pci_disable_device(pdev);
5425
5426 return rc;
5427}
5428
5429#else
5430
5431#define pmcraid_suspend NULL
5432#define pmcraid_resume NULL
5433
5434#endif /* CONFIG_PM */
5435
5436/**
5437 * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
c20c4267 5438 * completion of the ioa reset
89a36810
AR
5439 * @cmd: pointer to reset command block
5440 */
5441static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5442{
5443 struct pmcraid_instance *pinstance = cmd->drv_inst;
5444 unsigned long flags;
5445
5446 spin_lock_irqsave(pinstance->host->host_lock, flags);
5447 pmcraid_ioa_reset(cmd);
5448 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5449 scsi_unblock_requests(pinstance->host);
5450 schedule_work(&pinstance->worker_q);
5451}
5452
5453/**
5454 * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
5455 *
5456 * @cmd: pointer to pmcraid_cmd structure
5457 *
5458 * Return Value
5459 * 0 for success or non-zero for failure cases
5460 */
5461static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5462{
5463 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5464 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5465
5466 pmcraid_reinit_cmdblk(cmd);
5467
5468 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5469 ioarcb->request_type = REQ_TYPE_IOACMD;
5470 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5471 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5472
5473 /* If this was called as part of resource table reinitialization due to
5474 * lost CCN, it is enough to return the command block back to free pool
5475 * as part of set_supported_devs completion function.
5476 */
5477 if (cmd->drv_inst->reinit_cfg_table) {
5478 cmd->drv_inst->reinit_cfg_table = 0;
5479 cmd->release = 1;
5480 cmd_done = pmcraid_reinit_cfgtable_done;
5481 }
5482
5483 /* we will be done with the reset sequence after set supported devices,
5484 * setup the done function to return the command block back to free
5485 * pool
5486 */
5487 pmcraid_send_cmd(cmd,
5488 cmd_done,
5489 PMCRAID_SET_SUP_DEV_TIMEOUT,
5490 pmcraid_timeout_handler);
5491 return;
5492}
5493
592488a3
AR
5494/**
5495 * pmcraid_set_timestamp - set the timestamp to IOAFP
5496 *
5497 * @cmd: pointer to pmcraid_cmd structure
5498 *
5499 * Return Value
5500 * 0 for success or non-zero for failure cases
5501 */
5502static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5503{
5504 struct pmcraid_instance *pinstance = cmd->drv_inst;
5505 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5506 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5507 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
45c80be6 5508 u64 timestamp;
592488a3 5509
9c9bd593 5510 timestamp = ktime_get_real_seconds() * 1000;
592488a3
AR
5511
5512 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5513 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5514 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5515 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5516 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5517 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5518
5519 pmcraid_reinit_cmdblk(cmd);
5520 ioarcb->request_type = REQ_TYPE_SCSI;
5521 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5522 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5523 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5524 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5525
5526 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5527 offsetof(struct pmcraid_ioarcb,
5528 add_data.u.ioadl[0]));
5529 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5530 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
592488a3
AR
5531
5532 ioarcb->request_flags0 |= NO_LINK_DESCS;
5533 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5534 ioarcb->data_transfer_length =
5535 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5536 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5537 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5538 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5539 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5540
5541 if (!pinstance->timestamp_error) {
5542 pinstance->timestamp_error = 0;
5543 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5544 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5545 } else {
5546 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5547 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5548 return;
5549 }
5550}
5551
5552
89a36810
AR
5553/**
5554 * pmcraid_init_res_table - Initialize the resource table
5555 * @cmd: pointer to pmcraid command struct
5556 *
5557 * This function looks through the existing resource table, comparing
5558 * it with the config table. This function will take care of old/new
5559 * devices and schedule adding/removing them from the mid-layer
5560 * as appropriate.
5561 *
5562 * Return value
5563 * None
5564 */
5565static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5566{
5567 struct pmcraid_instance *pinstance = cmd->drv_inst;
5568 struct pmcraid_resource_entry *res, *temp;
5569 struct pmcraid_config_table_entry *cfgte;
5570 unsigned long lock_flags;
5571 int found, rc, i;
c20c4267 5572 u16 fw_version;
89a36810
AR
5573 LIST_HEAD(old_res);
5574
5575 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
34876402 5576 pmcraid_err("IOA requires microcode download\n");
89a36810 5577
c20c4267
AR
5578 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5579
89a36810
AR
5580 /* resource list is protected by pinstance->resource_lock.
5581 * init_res_table can be called from probe (user-thread) or runtime
5582 * reset (timer/tasklet)
5583 */
5584 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5585
5586 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5587 list_move_tail(&res->queue, &old_res);
5588
45c80be6 5589 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
c20c4267
AR
5590 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5591 PMCRAID_FW_VERSION_1)
5592 cfgte = &pinstance->cfg_table->entries[i];
5593 else
5594 cfgte = (struct pmcraid_config_table_entry *)
5595 &pinstance->cfg_table->entries_ext[i];
89a36810 5596
c20c4267 5597 if (!pmcraid_expose_resource(fw_version, cfgte))
89a36810
AR
5598 continue;
5599
5600 found = 0;
5601
5602 /* If this entry was already detected and initialized */
5603 list_for_each_entry_safe(res, temp, &old_res, queue) {
5604
5605 rc = memcmp(&res->cfg_entry.resource_address,
5606 &cfgte->resource_address,
5607 sizeof(cfgte->resource_address));
5608 if (!rc) {
5609 list_move_tail(&res->queue,
5610 &pinstance->used_res_q);
5611 found = 1;
5612 break;
5613 }
5614 }
5615
5616 /* If this is new entry, initialize it and add it the queue */
5617 if (!found) {
5618
5619 if (list_empty(&pinstance->free_res_q)) {
34876402 5620 pmcraid_err("Too many devices attached\n");
89a36810
AR
5621 break;
5622 }
5623
5624 found = 1;
5625 res = list_entry(pinstance->free_res_q.next,
5626 struct pmcraid_resource_entry, queue);
5627
5628 res->scsi_dev = NULL;
5629 res->change_detected = RES_CHANGE_ADD;
5630 res->reset_progress = 0;
5631 list_move_tail(&res->queue, &pinstance->used_res_q);
5632 }
5633
5634 /* copy new configuration table entry details into driver
5635 * maintained resource entry
5636 */
5637 if (found) {
5638 memcpy(&res->cfg_entry, cfgte,
c20c4267 5639 pinstance->config_table_entry_size);
89a36810
AR
5640 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5641 res->cfg_entry.resource_type,
c20c4267
AR
5642 (fw_version <= PMCRAID_FW_VERSION_1 ?
5643 res->cfg_entry.unique_flags1 :
45c80be6 5644 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
89a36810
AR
5645 le32_to_cpu(res->cfg_entry.resource_address));
5646 }
5647 }
5648
5649 /* Detect any deleted entries, mark them for deletion from mid-layer */
5650 list_for_each_entry_safe(res, temp, &old_res, queue) {
5651
5652 if (res->scsi_dev) {
5653 res->change_detected = RES_CHANGE_DEL;
5654 res->cfg_entry.resource_handle =
5655 PMCRAID_INVALID_RES_HANDLE;
5656 list_move_tail(&res->queue, &pinstance->used_res_q);
5657 } else {
5658 list_move_tail(&res->queue, &pinstance->free_res_q);
5659 }
5660 }
5661
5662 /* release the resource list lock */
5663 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
592488a3 5664 pmcraid_set_timestamp(cmd);
89a36810
AR
5665}
5666
5667/**
5668 * pmcraid_querycfg - Send a Query IOA Config to the adapter.
5669 * @cmd: pointer pmcraid_cmd struct
5670 *
5671 * This function sends a Query IOA Configuration command to the adapter to
5672 * retrieve the IOA configuration table.
5673 *
5674 * Return value:
5675 * none
5676 */
5677static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5678{
5679 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5680 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
5681 struct pmcraid_instance *pinstance = cmd->drv_inst;
45c80be6 5682 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
89a36810 5683
c20c4267
AR
5684 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5685 PMCRAID_FW_VERSION_1)
5686 pinstance->config_table_entry_size =
5687 sizeof(struct pmcraid_config_table_entry);
5688 else
5689 pinstance->config_table_entry_size =
5690 sizeof(struct pmcraid_config_table_entry_ext);
5691
89a36810
AR
5692 ioarcb->request_type = REQ_TYPE_IOACMD;
5693 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5694
5695 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5696
5697 /* firmware requires 4-byte length field, specified in B.E format */
5698 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5699
5700 /* Since entire config table can be described by single IOADL, it can
5701 * be part of IOARCB itself
5702 */
5703 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5704 offsetof(struct pmcraid_ioarcb,
5705 add_data.u.ioadl[0]));
5706 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5707 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
89a36810
AR
5708
5709 ioarcb->request_flags0 |= NO_LINK_DESCS;
5710 ioarcb->data_transfer_length =
5711 cpu_to_le32(sizeof(struct pmcraid_config_table));
5712
5713 ioadl = &(ioarcb->add_data.u.ioadl[0]);
88197966 5714 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
5715 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5716 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5717
5718 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5719 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5720}
5721
5722
5723/**
c20c4267 5724 * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
89a36810
AR
5725 * @pdev: pointer to pci device structure
5726 * @dev_id: pointer to device ids structure
5727 *
5728 * Return Value
5729 * returns 0 if the device is claimed and successfully configured.
5730 * returns non-zero error code in case of any failure
5731 */
6f039790
GKH
5732static int pmcraid_probe(struct pci_dev *pdev,
5733 const struct pci_device_id *dev_id)
89a36810
AR
5734{
5735 struct pmcraid_instance *pinstance;
5736 struct Scsi_Host *host;
5737 void __iomem *mapped_pci_addr;
5738 int rc = PCIBIOS_SUCCESSFUL;
5739
5740 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5741 pmcraid_err
5742 ("maximum number(%d) of supported adapters reached\n",
5743 atomic_read(&pmcraid_adapter_count));
5744 return -ENOMEM;
5745 }
5746
5747 atomic_inc(&pmcraid_adapter_count);
5748 rc = pci_enable_device(pdev);
5749
5750 if (rc) {
5751 dev_err(&pdev->dev, "Cannot enable adapter\n");
5752 atomic_dec(&pmcraid_adapter_count);
5753 return rc;
5754 }
5755
5756 dev_info(&pdev->dev,
5757 "Found new IOA(%x:%x), Total IOA count: %d\n",
5758 pdev->vendor, pdev->device,
5759 atomic_read(&pmcraid_adapter_count));
5760
5761 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5762
5763 if (rc < 0) {
5764 dev_err(&pdev->dev,
5765 "Couldn't register memory range of registers\n");
5766 goto out_disable_device;
5767 }
5768
5769 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5770
5771 if (!mapped_pci_addr) {
5772 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5773 rc = -ENOMEM;
5774 goto out_release_regions;
5775 }
5776
5777 pci_set_master(pdev);
5778
5779 /* Firmware requires the system bus address of IOARCB to be within
5780 * 32-bit addressable range though it has 64-bit IOARRIN register.
5781 * However, firmware supports 64-bit streaming DMA buffers, whereas
5782 * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
5783 * returns memory within 4GB (if not, change this logic), coherent
25985edc 5784 * buffers are within firmware acceptable address ranges.
89a36810
AR
5785 */
5786 if ((sizeof(dma_addr_t) == 4) ||
5787 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5788 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5789
5790 /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
5791 * bit mask for pci_alloc_consistent to return addresses within 4GB
5792 */
5793 if (rc == 0)
5794 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5795
5796 if (rc != 0) {
5797 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5798 goto cleanup_nomem;
5799 }
5800
5801 host = scsi_host_alloc(&pmcraid_host_template,
5802 sizeof(struct pmcraid_instance));
5803
5804 if (!host) {
5805 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5806 rc = -ENOMEM;
5807 goto cleanup_nomem;
5808 }
5809
5810 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5811 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5812 host->unique_id = host->host_no;
5813 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5814 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5815
5816 /* zero out entire instance structure */
5817 pinstance = (struct pmcraid_instance *)host->hostdata;
5818 memset(pinstance, 0, sizeof(*pinstance));
5819
5820 pinstance->chip_cfg =
5821 (struct pmcraid_chip_details *)(dev_id->driver_data);
5822
5823 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5824
5825 if (rc < 0) {
5826 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5827 goto out_scsi_host_put;
5828 }
5829
5830 pci_set_drvdata(pdev, pinstance);
5831
5832 /* Save PCI config-space for use following the reset */
5833 rc = pci_save_state(pinstance->pdev);
5834
5835 if (rc != 0) {
5836 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5837 goto out_scsi_host_put;
5838 }
5839
5840 pmcraid_disable_interrupts(pinstance, ~0);
5841
5842 rc = pmcraid_register_interrupt_handler(pinstance);
5843
5844 if (rc) {
34876402 5845 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
89a36810
AR
5846 goto out_scsi_host_put;
5847 }
5848
5849 pmcraid_init_tasklets(pinstance);
5850
5851 /* allocate verious buffers used by LLD.*/
5852 rc = pmcraid_init_buffers(pinstance);
5853
5854 if (rc) {
5855 pmcraid_err("couldn't allocate memory blocks\n");
5856 goto out_unregister_isr;
5857 }
5858
5859 /* check the reset type required */
5860 pmcraid_reset_type(pinstance);
5861
5862 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5863
5864 /* Start IOA firmware initialization and bring card to Operational
5865 * state.
5866 */
5867 pmcraid_info("starting IOA initialization sequence\n");
5868 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5869 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5870 rc = 1;
5871 goto out_release_bufs;
5872 }
5873
5874 /* Add adapter instance into mid-layer list */
5875 rc = scsi_add_host(pinstance->host, &pdev->dev);
5876 if (rc != 0) {
5877 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5878 goto out_release_bufs;
5879 }
5880
5881 scsi_scan_host(pinstance->host);
5882
5883 rc = pmcraid_setup_chrdev(pinstance);
5884
5885 if (rc != 0) {
5886 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5887 rc);
5888 goto out_remove_host;
5889 }
5890
5891 /* Schedule worker thread to handle CCN and take care of adding and
5892 * removing devices to OS
5893 */
5894 atomic_set(&pinstance->expose_resources, 1);
5895 schedule_work(&pinstance->worker_q);
5896 return rc;
5897
5898out_remove_host:
5899 scsi_remove_host(host);
5900
5901out_release_bufs:
5902 pmcraid_release_buffers(pinstance);
5903
5904out_unregister_isr:
5905 pmcraid_kill_tasklets(pinstance);
5906 pmcraid_unregister_interrupt_handler(pinstance);
5907
5908out_scsi_host_put:
5909 scsi_host_put(host);
5910
5911cleanup_nomem:
5912 iounmap(mapped_pci_addr);
5913
5914out_release_regions:
5915 pci_release_regions(pdev);
5916
5917out_disable_device:
5918 atomic_dec(&pmcraid_adapter_count);
89a36810
AR
5919 pci_disable_device(pdev);
5920 return -ENODEV;
5921}
5922
5923/*
5924 * PCI driver structure of pcmraid driver
5925 */
5926static struct pci_driver pmcraid_driver = {
5927 .name = PMCRAID_DRIVER_NAME,
5928 .id_table = pmcraid_pci_table,
5929 .probe = pmcraid_probe,
5930 .remove = pmcraid_remove,
5931 .suspend = pmcraid_suspend,
5932 .resume = pmcraid_resume,
5933 .shutdown = pmcraid_shutdown
5934};
5935
89a36810
AR
5936/**
5937 * pmcraid_init - module load entry point
5938 */
5939static int __init pmcraid_init(void)
5940{
5941 dev_t dev;
5942 int error;
5943
a1b66665
MM
5944 pmcraid_info("%s Device Driver version: %s\n",
5945 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
89a36810
AR
5946
5947 error = alloc_chrdev_region(&dev, 0,
5948 PMCRAID_MAX_ADAPTERS,
5949 PMCRAID_DEVFILE);
5950
5951 if (error) {
5952 pmcraid_err("failed to get a major number for adapters\n");
5953 goto out_init;
5954 }
5955
5956 pmcraid_major = MAJOR(dev);
5957 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5958
5959 if (IS_ERR(pmcraid_class)) {
5960 error = PTR_ERR(pmcraid_class);
278cee05 5961 pmcraid_err("failed to register with sysfs, error = %x\n",
89a36810
AR
5962 error);
5963 goto out_unreg_chrdev;
5964 }
5965
89a36810
AR
5966 error = pmcraid_netlink_init();
5967
2d76a247
QL
5968 if (error) {
5969 class_destroy(pmcraid_class);
89a36810 5970 goto out_unreg_chrdev;
2d76a247 5971 }
89a36810
AR
5972
5973 error = pci_register_driver(&pmcraid_driver);
5974
5975 if (error == 0)
5976 goto out_init;
5977
5978 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5979 error);
5980 class_destroy(pmcraid_class);
5981 pmcraid_netlink_release();
5982
5983out_unreg_chrdev:
5984 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
34876402 5985
89a36810
AR
5986out_init:
5987 return error;
5988}
5989
5990/**
5991 * pmcraid_exit - module unload entry point
5992 */
5993static void __exit pmcraid_exit(void)
5994{
5995 pmcraid_netlink_release();
89a36810
AR
5996 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5997 PMCRAID_MAX_ADAPTERS);
5998 pci_unregister_driver(&pmcraid_driver);
592488a3 5999 class_destroy(pmcraid_class);
89a36810
AR
6000}
6001
6002module_init(pmcraid_init);
6003module_exit(pmcraid_exit);