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CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4
LT
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/ctype.h>
27
28#include <asm/io.h>
1da177e4 29#include <asm/dma.h>
17e5ad6c 30#include <asm/scatterlist.h>
1da177e4
LT
31
32#include <linux/init.h>
33#include <linux/bootmem.h>
a8522509 34#include <linux/iommu-helper.h>
1da177e4
LT
35
36#define OFFSET(val,align) ((unsigned long) \
37 ( (val) & ( (align) - 1)))
38
f9527f12 39#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
93fbff63 40#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
1da177e4
LT
41
42/*
43 * Maximum allowable number of contiguous slabs to map,
44 * must be a power of 2. What is the appropriate value ?
45 * The complexity of {map,unmap}_single is linearly dependent on this value.
46 */
47#define IO_TLB_SEGSIZE 128
48
49/*
50 * log of the size of each IO TLB slab. The number of slabs is command line
51 * controllable.
52 */
53#define IO_TLB_SHIFT 11
54
0b9afede
AW
55#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
56
57/*
58 * Minimum IO TLB size to bother booting with. Systems with mainly
59 * 64bit capable cards will only lightly use the swiotlb. If we can't
60 * allocate a contiguous 1MB, we're probably in trouble anyway.
61 */
62#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
63
de69e0f0
JL
64/*
65 * Enumeration for sync targets
66 */
67enum dma_sync_target {
68 SYNC_FOR_CPU = 0,
69 SYNC_FOR_DEVICE = 1,
70};
71
1da177e4
LT
72int swiotlb_force;
73
74/*
75 * Used to do a quick range check in swiotlb_unmap_single and
76 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
77 * API.
78 */
79static char *io_tlb_start, *io_tlb_end;
80
81/*
82 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
83 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
84 */
85static unsigned long io_tlb_nslabs;
86
87/*
88 * When the IOMMU overflows we return a fallback buffer. This sets the size.
89 */
90static unsigned long io_tlb_overflow = 32*1024;
91
92void *io_tlb_overflow_buffer;
93
94/*
95 * This is a free list describing the number of free entries available from
96 * each index
97 */
98static unsigned int *io_tlb_list;
99static unsigned int io_tlb_index;
100
101/*
102 * We need to save away the original address corresponding to a mapped entry
103 * for the sync operations.
104 */
25667d67 105static unsigned char **io_tlb_orig_addr;
1da177e4
LT
106
107/*
108 * Protect the above data structures in the map and unmap calls
109 */
110static DEFINE_SPINLOCK(io_tlb_lock);
111
112static int __init
113setup_io_tlb_npages(char *str)
114{
115 if (isdigit(*str)) {
e8579e72 116 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
119 }
120 if (*str == ',')
121 ++str;
122 if (!strcmp(str, "force"))
123 swiotlb_force = 1;
124 return 1;
125}
126__setup("swiotlb=", setup_io_tlb_npages);
127/* make io_tlb_overflow tunable too? */
128
129/*
130 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 131 * structures for the software IO TLB used to implement the DMA API.
1da177e4 132 */
563aaf06
JB
133void __init
134swiotlb_init_with_default_size(size_t default_size)
1da177e4 135{
563aaf06 136 unsigned long i, bytes;
1da177e4
LT
137
138 if (!io_tlb_nslabs) {
e8579e72 139 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
140 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
141 }
142
563aaf06
JB
143 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
144
1da177e4
LT
145 /*
146 * Get IO TLB memory from the low pages
147 */
563aaf06 148 io_tlb_start = alloc_bootmem_low_pages(bytes);
1da177e4
LT
149 if (!io_tlb_start)
150 panic("Cannot allocate SWIOTLB buffer");
563aaf06 151 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
152
153 /*
154 * Allocate and initialize the free list array. This array is used
155 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
156 * between io_tlb_start and io_tlb_end.
157 */
158 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 159 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
160 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
161 io_tlb_index = 0;
25667d67 162 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
1da177e4
LT
163
164 /*
165 * Get the overflow emergency buffer
166 */
167 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
168 if (!io_tlb_overflow_buffer)
169 panic("Cannot allocate SWIOTLB overflow buffer!\n");
170
25667d67
TL
171 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
172 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
1da177e4
LT
173}
174
563aaf06
JB
175void __init
176swiotlb_init(void)
1da177e4 177{
25667d67 178 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
179}
180
0b9afede
AW
181/*
182 * Systems with larger DMA zones (those that don't support ISA) can
183 * initialize the swiotlb later using the slab allocator if needed.
184 * This should be just like above, but with some error catching.
185 */
186int
563aaf06 187swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 188{
563aaf06 189 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
190 unsigned int order;
191
192 if (!io_tlb_nslabs) {
193 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
194 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
195 }
196
197 /*
198 * Get IO TLB memory from the low pages
199 */
563aaf06 200 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 201 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 202 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
203
204 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
205 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
206 order);
207 if (io_tlb_start)
208 break;
209 order--;
210 }
211
212 if (!io_tlb_start)
213 goto cleanup1;
214
563aaf06 215 if (order != get_order(bytes)) {
0b9afede
AW
216 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
217 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
218 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 219 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 220 }
563aaf06
JB
221 io_tlb_end = io_tlb_start + bytes;
222 memset(io_tlb_start, 0, bytes);
0b9afede
AW
223
224 /*
225 * Allocate and initialize the free list array. This array is used
226 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
227 * between io_tlb_start and io_tlb_end.
228 */
229 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
230 get_order(io_tlb_nslabs * sizeof(int)));
231 if (!io_tlb_list)
232 goto cleanup2;
233
234 for (i = 0; i < io_tlb_nslabs; i++)
235 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
236 io_tlb_index = 0;
237
25667d67
TL
238 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
239 get_order(io_tlb_nslabs * sizeof(char *)));
0b9afede
AW
240 if (!io_tlb_orig_addr)
241 goto cleanup3;
242
25667d67 243 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
0b9afede
AW
244
245 /*
246 * Get the overflow emergency buffer
247 */
248 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
249 get_order(io_tlb_overflow));
250 if (!io_tlb_overflow_buffer)
251 goto cleanup4;
252
25667d67
TL
253 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
254 "0x%lx\n", bytes >> 20,
255 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
0b9afede
AW
256
257 return 0;
258
259cleanup4:
25667d67
TL
260 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
261 sizeof(char *)));
0b9afede
AW
262 io_tlb_orig_addr = NULL;
263cleanup3:
25667d67
TL
264 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
265 sizeof(int)));
0b9afede 266 io_tlb_list = NULL;
0b9afede 267cleanup2:
563aaf06 268 io_tlb_end = NULL;
0b9afede
AW
269 free_pages((unsigned long)io_tlb_start, order);
270 io_tlb_start = NULL;
271cleanup1:
272 io_tlb_nslabs = req_nslabs;
273 return -ENOMEM;
274}
275
be6b0267 276static int
2797982e 277address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 278{
07a2c01a 279 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
280}
281
640aebfe
FT
282static int is_swiotlb_buffer(char *addr)
283{
284 return addr >= io_tlb_start && addr < io_tlb_end;
285}
286
1da177e4
LT
287/*
288 * Allocates bounce buffer and returns its kernel virtual address.
289 */
290static void *
25667d67 291map_single(struct device *hwdev, char *buffer, size_t size, int dir)
1da177e4
LT
292{
293 unsigned long flags;
294 char *dma_addr;
295 unsigned int nslots, stride, index, wrap;
296 int i;
681cc5cd
FT
297 unsigned long start_dma_addr;
298 unsigned long mask;
299 unsigned long offset_slots;
300 unsigned long max_slots;
301
302 mask = dma_get_seg_boundary(hwdev);
303 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
304
305 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
b15a3891
JB
306 max_slots = mask + 1
307 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
308 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
309
310 /*
311 * For mappings greater than a page, we limit the stride (and
312 * hence alignment) to a page size.
313 */
314 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
315 if (size > PAGE_SIZE)
316 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
317 else
318 stride = 1;
319
34814545 320 BUG_ON(!nslots);
1da177e4
LT
321
322 /*
323 * Find suitable number of IO TLB entries size that will fit this
324 * request and allocate a buffer from that IO TLB pool.
325 */
326 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
327 index = ALIGN(io_tlb_index, stride);
328 if (index >= io_tlb_nslabs)
329 index = 0;
330 wrap = index;
331
332 do {
a8522509
FT
333 while (iommu_is_span_boundary(index, nslots, offset_slots,
334 max_slots)) {
b15a3891
JB
335 index += stride;
336 if (index >= io_tlb_nslabs)
337 index = 0;
a7133a15
AM
338 if (index == wrap)
339 goto not_found;
340 }
341
342 /*
343 * If we find a slot that indicates we have 'nslots' number of
344 * contiguous buffers, we allocate the buffers from that slot
345 * and mark the entries as '0' indicating unavailable.
346 */
347 if (io_tlb_list[index] >= nslots) {
348 int count = 0;
349
350 for (i = index; i < (int) (index + nslots); i++)
351 io_tlb_list[i] = 0;
352 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
353 io_tlb_list[i] = ++count;
354 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 355
a7133a15
AM
356 /*
357 * Update the indices to avoid searching in the next
358 * round.
359 */
360 io_tlb_index = ((index + nslots) < io_tlb_nslabs
361 ? (index + nslots) : 0);
362
363 goto found;
364 }
365 index += stride;
366 if (index >= io_tlb_nslabs)
367 index = 0;
368 } while (index != wrap);
369
370not_found:
371 spin_unlock_irqrestore(&io_tlb_lock, flags);
372 return NULL;
373found:
1da177e4
LT
374 spin_unlock_irqrestore(&io_tlb_lock, flags);
375
376 /*
377 * Save away the mapping from the original address to the DMA address.
378 * This is needed when we sync the memory. Then we sync the buffer if
379 * needed.
380 */
df336d1c
KF
381 for (i = 0; i < nslots; i++)
382 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
1da177e4 383 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
25667d67 384 memcpy(dma_addr, buffer, size);
1da177e4
LT
385
386 return dma_addr;
387}
388
389/*
390 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
391 */
392static void
393unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
394{
395 unsigned long flags;
396 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
397 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 398 char *buffer = io_tlb_orig_addr[index];
1da177e4
LT
399
400 /*
401 * First, sync the memory before unmapping the entry
402 */
25667d67 403 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
1da177e4
LT
404 /*
405 * bounce... copy the data back into the original buffer * and
406 * delete the bounce buffer.
407 */
25667d67 408 memcpy(buffer, dma_addr, size);
1da177e4
LT
409
410 /*
411 * Return the buffer to the free list by setting the corresponding
412 * entries to indicate the number of contigous entries available.
413 * While returning the entries to the free list, we merge the entries
414 * with slots below and above the pool being returned.
415 */
416 spin_lock_irqsave(&io_tlb_lock, flags);
417 {
418 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
419 io_tlb_list[index + nslots] : 0);
420 /*
421 * Step 1: return the slots to the free list, merging the
422 * slots with superceeding slots
423 */
424 for (i = index + nslots - 1; i >= index; i--)
425 io_tlb_list[i] = ++count;
426 /*
427 * Step 2: merge the returned slots with the preceding slots,
428 * if available (non zero)
429 */
430 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
431 io_tlb_list[i] = ++count;
432 }
433 spin_unlock_irqrestore(&io_tlb_lock, flags);
434}
435
436static void
de69e0f0
JL
437sync_single(struct device *hwdev, char *dma_addr, size_t size,
438 int dir, int target)
1da177e4
LT
439{
440 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 441 char *buffer = io_tlb_orig_addr[index];
1da177e4 442
df336d1c
KF
443 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
444
de69e0f0
JL
445 switch (target) {
446 case SYNC_FOR_CPU:
447 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 448 memcpy(buffer, dma_addr, size);
34814545
ES
449 else
450 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
451 break;
452 case SYNC_FOR_DEVICE:
453 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 454 memcpy(dma_addr, buffer, size);
34814545
ES
455 else
456 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
457 break;
458 default:
1da177e4 459 BUG();
de69e0f0 460 }
1da177e4
LT
461}
462
463void *
464swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 465 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 466{
563aaf06 467 dma_addr_t dev_addr;
1da177e4
LT
468 void *ret;
469 int order = get_order(size);
470
25667d67 471 ret = (void *)__get_free_pages(flags, order);
2797982e 472 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret), size)) {
1da177e4
LT
473 /*
474 * The allocated memory isn't reachable by the device.
475 * Fall back on swiotlb_map_single().
476 */
477 free_pages((unsigned long) ret, order);
478 ret = NULL;
479 }
480 if (!ret) {
481 /*
482 * We are either out of memory or the device can't DMA
483 * to GFP_DMA memory; fall back on
484 * swiotlb_map_single(), which will grab memory from
485 * the lowest available address range.
486 */
9dfda12b
FT
487 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
488 if (!ret)
1da177e4 489 return NULL;
1da177e4
LT
490 }
491
492 memset(ret, 0, size);
93fbff63 493 dev_addr = virt_to_bus(ret);
1da177e4
LT
494
495 /* Confirm address can be DMA'd by device */
2797982e 496 if (address_needs_mapping(hwdev, dev_addr, size)) {
563aaf06
JB
497 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
498 (unsigned long long)*hwdev->dma_mask,
499 (unsigned long long)dev_addr);
1da177e4
LT
500 panic("swiotlb_alloc_coherent: allocated memory is out of "
501 "range for device");
502 }
503 *dma_handle = dev_addr;
504 return ret;
505}
506
507void
508swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
509 dma_addr_t dma_handle)
510{
aa24886e 511 WARN_ON(irqs_disabled());
640aebfe 512 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
513 free_pages((unsigned long) vaddr, get_order(size));
514 else
515 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 516 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4
LT
517}
518
519static void
520swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
521{
522 /*
523 * Ran out of IOMMU space for this operation. This is very bad.
524 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 525 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
526 * When the mapping is small enough return a static buffer to limit
527 * the damage, or panic when the transfer is too big.
528 */
563aaf06 529 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
530 "device %s\n", size, dev ? dev->bus_id : "?");
531
532 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
533 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
534 panic("DMA: Memory would be corrupted\n");
535 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
536 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
537 }
538}
539
540/*
541 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 542 * physical address to use is returned.
1da177e4
LT
543 *
544 * Once the device is given the dma address, the device owns this memory until
545 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
546 */
547dma_addr_t
309df0c5
AK
548swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
549 int dir, struct dma_attrs *attrs)
1da177e4 550{
563aaf06 551 dma_addr_t dev_addr = virt_to_bus(ptr);
1da177e4
LT
552 void *map;
553
34814545 554 BUG_ON(dir == DMA_NONE);
1da177e4
LT
555 /*
556 * If the pointer passed in happens to be in the device's DMA window,
557 * we can safely return the device addr and not worry about bounce
558 * buffering it.
559 */
2797982e 560 if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force)
1da177e4
LT
561 return dev_addr;
562
563 /*
564 * Oh well, have to allocate and map a bounce buffer.
565 */
25667d67 566 map = map_single(hwdev, ptr, size, dir);
1da177e4
LT
567 if (!map) {
568 swiotlb_full(hwdev, size, dir, 1);
569 map = io_tlb_overflow_buffer;
570 }
571
93fbff63 572 dev_addr = virt_to_bus(map);
1da177e4
LT
573
574 /*
575 * Ensure that the address returned is DMA'ble
576 */
2797982e 577 if (address_needs_mapping(hwdev, dev_addr, size))
1da177e4
LT
578 panic("map_single: bounce buffer is not DMA'ble");
579
580 return dev_addr;
581}
309df0c5
AK
582EXPORT_SYMBOL(swiotlb_map_single_attrs);
583
584dma_addr_t
585swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
586{
587 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
588}
1da177e4 589
1da177e4
LT
590/*
591 * Unmap a single streaming mode DMA translation. The dma_addr and size must
592 * match what was provided for in a previous swiotlb_map_single call. All
593 * other usages are undefined.
594 *
595 * After this call, reads by the cpu to the buffer are guaranteed to see
596 * whatever the device wrote there.
597 */
598void
309df0c5
AK
599swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
600 size_t size, int dir, struct dma_attrs *attrs)
1da177e4 601{
93fbff63 602 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 603
34814545 604 BUG_ON(dir == DMA_NONE);
640aebfe 605 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
606 unmap_single(hwdev, dma_addr, size, dir);
607 else if (dir == DMA_FROM_DEVICE)
cde14bbf 608 dma_mark_clean(dma_addr, size);
1da177e4 609}
309df0c5 610EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
1da177e4 611
309df0c5
AK
612void
613swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
614 int dir)
615{
616 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
617}
1da177e4
LT
618/*
619 * Make physical memory consistent for a single streaming mode DMA translation
620 * after a transfer.
621 *
622 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
623 * using the cpu, yet do not wish to teardown the dma mapping, you must
624 * call this function before doing so. At the next point you give the dma
1da177e4
LT
625 * address back to the card, you must first perform a
626 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
627 */
be6b0267 628static void
8270f3f1 629swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 630 size_t size, int dir, int target)
1da177e4 631{
93fbff63 632 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 633
34814545 634 BUG_ON(dir == DMA_NONE);
640aebfe 635 if (is_swiotlb_buffer(dma_addr))
de69e0f0 636 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 637 else if (dir == DMA_FROM_DEVICE)
cde14bbf 638 dma_mark_clean(dma_addr, size);
1da177e4
LT
639}
640
8270f3f1
JL
641void
642swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
643 size_t size, int dir)
644{
de69e0f0 645 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
646}
647
1da177e4
LT
648void
649swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
650 size_t size, int dir)
651{
de69e0f0 652 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
653}
654
878a97cf
JL
655/*
656 * Same as above, but for a sub-range of the mapping.
657 */
be6b0267 658static void
878a97cf 659swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
660 unsigned long offset, size_t size,
661 int dir, int target)
878a97cf 662{
93fbff63 663 char *dma_addr = bus_to_virt(dev_addr) + offset;
878a97cf 664
34814545 665 BUG_ON(dir == DMA_NONE);
640aebfe 666 if (is_swiotlb_buffer(dma_addr))
de69e0f0 667 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 668 else if (dir == DMA_FROM_DEVICE)
cde14bbf 669 dma_mark_clean(dma_addr, size);
878a97cf
JL
670}
671
672void
673swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
674 unsigned long offset, size_t size, int dir)
675{
de69e0f0
JL
676 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
677 SYNC_FOR_CPU);
878a97cf
JL
678}
679
680void
681swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
682 unsigned long offset, size_t size, int dir)
683{
de69e0f0
JL
684 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
685 SYNC_FOR_DEVICE);
878a97cf
JL
686}
687
309df0c5
AK
688void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
689 struct dma_attrs *);
1da177e4
LT
690/*
691 * Map a set of buffers described by scatterlist in streaming mode for DMA.
692 * This is the scatter-gather version of the above swiotlb_map_single
693 * interface. Here the scatter gather list elements are each tagged with the
694 * appropriate dma address and length. They are obtained via
695 * sg_dma_{address,length}(SG).
696 *
697 * NOTE: An implementation may be able to use a smaller number of
698 * DMA address/length pairs than there are SG table elements.
699 * (for example via virtual mapping capabilities)
700 * The routine returns the number of addr/length pairs actually
701 * used, at most nents.
702 *
703 * Device ownership issues as mentioned above for swiotlb_map_single are the
704 * same here.
705 */
706int
309df0c5
AK
707swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
708 int dir, struct dma_attrs *attrs)
1da177e4 709{
dbfd49fe 710 struct scatterlist *sg;
25667d67 711 void *addr;
563aaf06 712 dma_addr_t dev_addr;
1da177e4
LT
713 int i;
714
34814545 715 BUG_ON(dir == DMA_NONE);
1da177e4 716
dbfd49fe 717 for_each_sg(sgl, sg, nelems, i) {
25667d67
TL
718 addr = SG_ENT_VIRT_ADDRESS(sg);
719 dev_addr = virt_to_bus(addr);
2797982e
FT
720 if (swiotlb_force ||
721 address_needs_mapping(hwdev, dev_addr, sg->length)) {
25667d67 722 void *map = map_single(hwdev, addr, sg->length, dir);
7e870233 723 if (!map) {
1da177e4
LT
724 /* Don't panic here, we expect map_sg users
725 to do proper error handling. */
726 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
727 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
728 attrs);
dbfd49fe 729 sgl[0].dma_length = 0;
1da177e4
LT
730 return 0;
731 }
cde14bbf 732 sg->dma_address = virt_to_bus(map);
1da177e4
LT
733 } else
734 sg->dma_address = dev_addr;
735 sg->dma_length = sg->length;
736 }
737 return nelems;
738}
309df0c5
AK
739EXPORT_SYMBOL(swiotlb_map_sg_attrs);
740
741int
742swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
743 int dir)
744{
745 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
746}
1da177e4
LT
747
748/*
749 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
750 * concerning calls here are the same as for swiotlb_unmap_single() above.
751 */
752void
309df0c5
AK
753swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
754 int nelems, int dir, struct dma_attrs *attrs)
1da177e4 755{
dbfd49fe 756 struct scatterlist *sg;
1da177e4
LT
757 int i;
758
34814545 759 BUG_ON(dir == DMA_NONE);
1da177e4 760
dbfd49fe 761 for_each_sg(sgl, sg, nelems, i) {
1da177e4 762 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63
JB
763 unmap_single(hwdev, bus_to_virt(sg->dma_address),
764 sg->dma_length, dir);
1da177e4 765 else if (dir == DMA_FROM_DEVICE)
cde14bbf 766 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 767 }
1da177e4 768}
309df0c5
AK
769EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
770
771void
772swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
773 int dir)
774{
775 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
776}
1da177e4
LT
777
778/*
779 * Make physical memory consistent for a set of streaming mode DMA translations
780 * after a transfer.
781 *
782 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
783 * and usage.
784 */
be6b0267 785static void
dbfd49fe 786swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 787 int nelems, int dir, int target)
1da177e4 788{
dbfd49fe 789 struct scatterlist *sg;
1da177e4
LT
790 int i;
791
34814545 792 BUG_ON(dir == DMA_NONE);
1da177e4 793
dbfd49fe 794 for_each_sg(sgl, sg, nelems, i) {
1da177e4 795 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63 796 sync_single(hwdev, bus_to_virt(sg->dma_address),
de69e0f0 797 sg->dma_length, dir, target);
cde14bbf
JB
798 else if (dir == DMA_FROM_DEVICE)
799 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 800 }
1da177e4
LT
801}
802
8270f3f1
JL
803void
804swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
805 int nelems, int dir)
806{
de69e0f0 807 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
808}
809
1da177e4
LT
810void
811swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
812 int nelems, int dir)
813{
de69e0f0 814 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
815}
816
817int
8d8bb39b 818swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 819{
93fbff63 820 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
821}
822
823/*
17e5ad6c 824 * Return whether the given device DMA address mask can be supported
1da177e4 825 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 826 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
827 * this function.
828 */
829int
563aaf06 830swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 831{
25667d67 832 return virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
833}
834
1da177e4
LT
835EXPORT_SYMBOL(swiotlb_map_single);
836EXPORT_SYMBOL(swiotlb_unmap_single);
837EXPORT_SYMBOL(swiotlb_map_sg);
838EXPORT_SYMBOL(swiotlb_unmap_sg);
839EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
840EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
841EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
842EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
843EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
844EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
845EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
846EXPORT_SYMBOL(swiotlb_alloc_coherent);
847EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 848EXPORT_SYMBOL(swiotlb_dma_supported);