x86/cpufeatures: Disentangle SSBD enumeration

[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / cpu / amd.c

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 1d36f64e15504651b9167ea94b2c85d1c725d51a..c736bcb129017fca77963f0f71bc4e20a74fc197 100644 (file)
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -557,12 +557,12 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
                }
                /*
                 * Try to cache the base value so further operations can
-                * avoid RMW. If that faults, do not enable RDS.
+                * avoid RMW. If that faults, do not enable SSBD.
                 */
                if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) {
-                       setup_force_cpu_cap(X86_FEATURE_RDS);
-                       setup_force_cpu_cap(X86_FEATURE_AMD_RDS);
-                       x86_amd_ls_cfg_rds_mask = 1ULL << bit;
+                       setup_force_cpu_cap(X86_FEATURE_LS_CFG_SSBD);
+                       setup_force_cpu_cap(X86_FEATURE_SSBD);
+                       x86_amd_ls_cfg_ssbd_mask = 1ULL << bit;
                }
        }
 }
@@ -749,6 +749,16 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
        }
 }
 
+static void init_amd_zn(struct cpuinfo_x86 *c)
+{
+       /*
+        * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
+        * all up to and including B1.
+        */
+       if (c->x86_model <= 1 && c->x86_mask <= 1)
+               set_cpu_cap(c, X86_FEATURE_CPB);
+}
+
 static void init_amd(struct cpuinfo_x86 *c)
 {
        u32 dummy;
@@ -779,6 +789,7 @@ static void init_amd(struct cpuinfo_x86 *c)
        case 0x10: init_amd_gh(c); break;
        case 0x12: init_amd_ln(c); break;
        case 0x15: init_amd_bd(c); break;
+       case 0x17: init_amd_zn(c); break;
        }
 
        /*
@@ -861,7 +872,8 @@ static void init_amd(struct cpuinfo_x86 *c)
                        sysctl_ibrs_enabled = 1;
                if (ibpb_inuse)
                        sysctl_ibpb_enabled = 1;
-       } else if (cpu_has(c, X86_FEATURE_IBPB)) {
+               set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
+       } else if (cpu_has(c, X86_FEATURE_AMD_IBPB)) {
                pr_info_once("FEATURE SPEC_CTRL Not Present\n");
                pr_info_once("FEATURE IBPB Present\n");
                set_ibpb_supported();
@@ -891,10 +903,8 @@ static void init_amd(struct cpuinfo_x86 *c)
                }
        }
 
-       if (boot_cpu_has(X86_FEATURE_AMD_RDS)) {
-               set_cpu_cap(c, X86_FEATURE_RDS);
-               set_cpu_cap(c, X86_FEATURE_AMD_RDS);
-       }
+       if (cpu_has(c, X86_FEATURE_SPEC_CTRL_SSBD))
+               set_cpu_cap(c, X86_FEATURE_SSBD);
 }
 
 #ifdef CONFIG_X86_32