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Commit | Line | Data |
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1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
62d60e9f | 19 | #include <linux/cpu.h> |
1da177e4 LT |
20 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/stddef.h> | |
25 | #include <linux/unistd.h> | |
1da177e4 | 26 | #include <linux/user.h> |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/major.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/reboot.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/console.h> | |
34 | #include <linux/pci.h> | |
cebb2b15 | 35 | #include <linux/utsname.h> |
1da177e4 | 36 | #include <linux/adb.h> |
4b16f8e2 | 37 | #include <linux/export.h> |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/irq.h> | |
40 | #include <linux/seq_file.h> | |
41 | #include <linux/root_dev.h> | |
1cf3d8b3 | 42 | #include <linux/of.h> |
705a7b47 | 43 | #include <linux/of_pci.h> |
1da177e4 LT |
44 | |
45 | #include <asm/mmu.h> | |
46 | #include <asm/processor.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/pgtable.h> | |
49 | #include <asm/prom.h> | |
50 | #include <asm/rtas.h> | |
51 | #include <asm/pci-bridge.h> | |
52 | #include <asm/iommu.h> | |
53 | #include <asm/dma.h> | |
54 | #include <asm/machdep.h> | |
55 | #include <asm/irq.h> | |
56 | #include <asm/time.h> | |
57 | #include <asm/nvram.h> | |
180a3362 | 58 | #include <asm/pmc.h> |
0b05ac6e | 59 | #include <asm/xics.h> |
eac1e731 | 60 | #include <asm/xive.h> |
d387899f | 61 | #include <asm/ppc-pci.h> |
69a80d3f PM |
62 | #include <asm/i8259.h> |
63 | #include <asm/udbg.h> | |
2249ca9d | 64 | #include <asm/smp.h> |
577830b0 | 65 | #include <asm/firmware.h> |
bed59275 | 66 | #include <asm/eeh.h> |
bf99de36 | 67 | #include <asm/reg.h> |
212bebb4 | 68 | #include <asm/plpar_wrappers.h> |
d81d8258 | 69 | #include <asm/kexec.h> |
38e9d36b | 70 | #include <asm/isa-bridge.h> |
57691ae3 | 71 | #include <asm/security_features.h> |
1da177e4 | 72 | |
577830b0 | 73 | #include "pseries.h" |
a1218720 | 74 | |
81f14997 RJ |
75 | int CMO_PrPSP = -1; |
76 | int CMO_SecPSP = -1; | |
e589a440 | 77 | unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); |
d617a402 | 78 | EXPORT_SYMBOL(CMO_PageSize); |
1da177e4 | 79 | |
1da177e4 LT |
80 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
81 | ||
8446196a | 82 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
83 | { |
84 | struct device_node *root; | |
85 | const char *model = ""; | |
86 | ||
87 | root = of_find_node_by_path("/"); | |
88 | if (root) | |
e2eb6392 | 89 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
90 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
91 | of_node_put(root); | |
3a4c2601 AK |
92 | if (radix_enabled()) |
93 | seq_printf(m, "MMU\t\t: Radix\n"); | |
94 | else | |
95 | seq_printf(m, "MMU\t\t: Hash\n"); | |
1da177e4 LT |
96 | } |
97 | ||
98 | /* Initialize firmware assisted non-maskable interrupts if | |
99 | * the firmware supports this feature. | |
1da177e4 LT |
100 | */ |
101 | static void __init fwnmi_init(void) | |
102 | { | |
8c4f1f29 ME |
103 | unsigned long system_reset_addr, machine_check_addr; |
104 | ||
1da177e4 LT |
105 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
106 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
107 | return; | |
8c4f1f29 ME |
108 | |
109 | /* If the kernel's not linked at zero we point the firmware at low | |
110 | * addresses anyway, and use a trampoline to get to the real code. */ | |
111 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
112 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
113 | ||
114 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
115 | machine_check_addr)) | |
1da177e4 LT |
116 | fwnmi_active = 1; |
117 | } | |
118 | ||
bd0b9ac4 | 119 | static void pseries_8259_cascade(struct irq_desc *desc) |
b9e5b4e6 | 120 | { |
ec775d0e | 121 | struct irq_chip *chip = irq_desc_get_chip(desc); |
35a84c2f | 122 | unsigned int cascade_irq = i8259_irq(); |
79f26c26 | 123 | |
ef24ba70 | 124 | if (cascade_irq) |
7d12e780 | 125 | generic_handle_irq(cascade_irq); |
79f26c26 LB |
126 | |
127 | chip->irq_eoi(&desc->irq_data); | |
b9e5b4e6 BH |
128 | } |
129 | ||
30d6ad25 | 130 | static void __init pseries_setup_i8259_cascade(void) |
032ace7e ME |
131 | { |
132 | struct device_node *np, *old, *found = NULL; | |
30d6ad25 | 133 | unsigned int cascade; |
032ace7e ME |
134 | const u32 *addrp; |
135 | unsigned long intack = 0; | |
30d6ad25 | 136 | int naddr; |
032ace7e | 137 | |
30d6ad25 | 138 | for_each_node_by_type(np, "interrupt-controller") { |
032ace7e ME |
139 | if (of_device_is_compatible(np, "chrp,iic")) { |
140 | found = np; | |
141 | break; | |
142 | } | |
30d6ad25 ME |
143 | } |
144 | ||
032ace7e | 145 | if (found == NULL) { |
30d6ad25 | 146 | printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
032ace7e ME |
147 | return; |
148 | } | |
30d6ad25 | 149 | |
032ace7e | 150 | cascade = irq_of_parse_and_map(found, 0); |
ef24ba70 | 151 | if (!cascade) { |
30d6ad25 | 152 | printk(KERN_ERR "pic: failed to map cascade interrupt"); |
032ace7e ME |
153 | return; |
154 | } | |
30d6ad25 | 155 | pr_debug("pic: cascade mapped to irq %d\n", cascade); |
032ace7e ME |
156 | |
157 | for (old = of_node_get(found); old != NULL ; old = np) { | |
158 | np = of_get_parent(old); | |
159 | of_node_put(old); | |
160 | if (np == NULL) | |
161 | break; | |
162 | if (strcmp(np->name, "pci") != 0) | |
163 | continue; | |
164 | addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); | |
165 | if (addrp == NULL) | |
166 | continue; | |
167 | naddr = of_n_addr_cells(np); | |
168 | intack = addrp[naddr-1]; | |
169 | if (naddr > 1) | |
170 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
171 | } | |
172 | if (intack) | |
30d6ad25 | 173 | printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
032ace7e ME |
174 | i8259_init(found, intack); |
175 | of_node_put(found); | |
ec775d0e | 176 | irq_set_chained_handler(cascade, pseries_8259_cascade); |
032ace7e ME |
177 | } |
178 | ||
e7da5dac | 179 | static void __init pseries_init_irq(void) |
032ace7e | 180 | { |
eac1e731 CLG |
181 | /* Try using a XIVE if available, otherwise use a XICS */ |
182 | if (!xive_spapr_init()) { | |
183 | xics_init(); | |
184 | pseries_setup_i8259_cascade(); | |
185 | } | |
032ace7e ME |
186 | } |
187 | ||
180a3362 ME |
188 | static void pseries_lpar_enable_pmcs(void) |
189 | { | |
190 | unsigned long set, reset; | |
191 | ||
180a3362 ME |
192 | set = 1UL << 63; |
193 | reset = 0; | |
194 | plpar_hcall_norets(H_PERFMON, set, reset); | |
180a3362 ME |
195 | } |
196 | ||
f5242e5a | 197 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) |
2eb4afb6 | 198 | { |
f5242e5a | 199 | struct of_reconfig_data *rd = data; |
ea0f8acf GS |
200 | struct device_node *parent, *np = rd->dn; |
201 | struct pci_dn *pdn; | |
2eb4afb6 KG |
202 | int err = NOTIFY_OK; |
203 | ||
204 | switch (action) { | |
1cf3d8b3 | 205 | case OF_RECONFIG_ATTACH_NODE: |
ea0f8acf GS |
206 | parent = of_get_parent(np); |
207 | pdn = parent ? PCI_DN(parent) : NULL; | |
8cc7581c | 208 | if (pdn) |
d8f66f41 | 209 | pci_add_device_node_info(pdn->phb, np); |
ea0f8acf GS |
210 | |
211 | of_node_put(parent); | |
2eb4afb6 | 212 | break; |
590c7567 | 213 | case OF_RECONFIG_DETACH_NODE: |
ea0f8acf GS |
214 | pdn = PCI_DN(np); |
215 | if (pdn) | |
216 | list_del(&pdn->list); | |
590c7567 | 217 | break; |
2eb4afb6 KG |
218 | default: |
219 | err = NOTIFY_DONE; | |
220 | break; | |
221 | } | |
222 | return err; | |
223 | } | |
224 | ||
225 | static struct notifier_block pci_dn_reconfig_nb = { | |
226 | .notifier_call = pci_dn_reconfig_notifier, | |
227 | }; | |
228 | ||
af442a1b NA |
229 | struct kmem_cache *dtl_cache; |
230 | ||
abf917cd | 231 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
cf9efce0 PM |
232 | /* |
233 | * Allocate space for the dispatch trace log for all possible cpus | |
234 | * and register the buffers with the hypervisor. This is used for | |
235 | * computing time stolen by the hypervisor. | |
236 | */ | |
237 | static int alloc_dispatch_logs(void) | |
238 | { | |
239 | int cpu, ret; | |
240 | struct paca_struct *pp; | |
241 | struct dtl_entry *dtl; | |
242 | ||
243 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | |
244 | return 0; | |
245 | ||
af442a1b | 246 | if (!dtl_cache) |
127493d5 | 247 | return 0; |
127493d5 | 248 | |
cf9efce0 PM |
249 | for_each_possible_cpu(cpu) { |
250 | pp = &paca[cpu]; | |
127493d5 | 251 | dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); |
cf9efce0 PM |
252 | if (!dtl) { |
253 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", | |
254 | cpu); | |
255 | pr_warn("Stolen time statistics will be unreliable\n"); | |
256 | break; | |
257 | } | |
258 | ||
259 | pp->dtl_ridx = 0; | |
260 | pp->dispatch_log = dtl; | |
261 | pp->dispatch_log_end = dtl + N_DISPATCH_LOG; | |
262 | pp->dtl_curr = dtl; | |
263 | } | |
264 | ||
265 | /* Register the DTL for the current (boot) cpu */ | |
266 | dtl = get_paca()->dispatch_log; | |
267 | get_paca()->dtl_ridx = 0; | |
268 | get_paca()->dtl_curr = dtl; | |
269 | get_paca()->lppaca_ptr->dtl_idx = 0; | |
270 | ||
271 | /* hypervisor reads buffer length from this field */ | |
7ffcf8ec | 272 | dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES); |
cf9efce0 PM |
273 | ret = register_dtl(hard_smp_processor_id(), __pa(dtl)); |
274 | if (ret) | |
711ef84e AB |
275 | pr_err("WARNING: DTL registration of cpu %d (hw %d) failed " |
276 | "with %d\n", smp_processor_id(), | |
277 | hard_smp_processor_id(), ret); | |
cf9efce0 PM |
278 | get_paca()->lppaca_ptr->dtl_enable_mask = 2; |
279 | ||
280 | return 0; | |
281 | } | |
abf917cd | 282 | #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
af442a1b NA |
283 | static inline int alloc_dispatch_logs(void) |
284 | { | |
285 | return 0; | |
286 | } | |
abf917cd | 287 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
cf9efce0 | 288 | |
af442a1b NA |
289 | static int alloc_dispatch_log_kmem_cache(void) |
290 | { | |
291 | dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, | |
292 | DISPATCH_LOG_BYTES, 0, NULL); | |
293 | if (!dtl_cache) { | |
294 | pr_warn("Failed to create dispatch trace log buffer cache\n"); | |
295 | pr_warn("Stolen time statistics will be unreliable\n"); | |
296 | return 0; | |
297 | } | |
298 | ||
299 | return alloc_dispatch_logs(); | |
300 | } | |
8e83e905 | 301 | machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); |
af442a1b | 302 | |
363edbe2 | 303 | static void pseries_lpar_idle(void) |
e179816c | 304 | { |
d8c6ad31 NP |
305 | /* |
306 | * Default handler to go into low thread priority and possibly | |
027dfac6 | 307 | * low power mode by ceding processor to hypervisor |
e179816c | 308 | */ |
d8c6ad31 NP |
309 | |
310 | /* Indicate to hypervisor that we are idle. */ | |
311 | get_lppaca()->idle = 1; | |
312 | ||
313 | /* | |
314 | * Yield the processor to the hypervisor. We return if | |
315 | * an external interrupt occurs (which are driven prior | |
316 | * to returning here) or if a prod occurs from another | |
317 | * processor. When returning here, external interrupts | |
318 | * are enabled. | |
319 | */ | |
320 | cede_processor(); | |
321 | ||
322 | get_lppaca()->idle = 0; | |
e179816c DD |
323 | } |
324 | ||
fc8effa4 IM |
325 | /* |
326 | * Enable relocation on during exceptions. This has partition wide scope and | |
327 | * may take a while to complete, if it takes longer than one second we will | |
328 | * just give up rather than wasting any more time on this - if that turns out | |
329 | * to ever be a problem in practice we can move this into a kernel thread to | |
330 | * finish off the process later in boot. | |
331 | */ | |
d3cbff1b | 332 | void pseries_enable_reloc_on_exc(void) |
fc8effa4 IM |
333 | { |
334 | long rc; | |
335 | unsigned int delay, total_delay = 0; | |
336 | ||
337 | while (1) { | |
338 | rc = enable_reloc_on_exceptions(); | |
d3cbff1b BH |
339 | if (!H_IS_LONG_BUSY(rc)) { |
340 | if (rc == H_P2) { | |
341 | pr_info("Relocation on exceptions not" | |
342 | " supported\n"); | |
343 | } else if (rc != H_SUCCESS) { | |
344 | pr_warn("Unable to enable relocation" | |
345 | " on exceptions: %ld\n", rc); | |
346 | } | |
347 | break; | |
348 | } | |
fc8effa4 IM |
349 | |
350 | delay = get_longbusy_msecs(rc); | |
351 | total_delay += delay; | |
352 | if (total_delay > 1000) { | |
353 | pr_warn("Warning: Giving up waiting to enable " | |
354 | "relocation on exceptions (%u msec)!\n", | |
355 | total_delay); | |
d3cbff1b | 356 | return; |
fc8effa4 IM |
357 | } |
358 | ||
359 | mdelay(delay); | |
360 | } | |
361 | } | |
d3cbff1b | 362 | EXPORT_SYMBOL(pseries_enable_reloc_on_exc); |
fc8effa4 | 363 | |
d3cbff1b | 364 | void pseries_disable_reloc_on_exc(void) |
cedddd81 IM |
365 | { |
366 | long rc; | |
367 | ||
368 | while (1) { | |
369 | rc = disable_reloc_on_exceptions(); | |
370 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 371 | break; |
cedddd81 IM |
372 | mdelay(get_longbusy_msecs(rc)); |
373 | } | |
d3cbff1b BH |
374 | if (rc != H_SUCCESS) |
375 | pr_warning("Warning: Failed to disable relocation on " | |
376 | "exceptions: %ld\n", rc); | |
cedddd81 | 377 | } |
d3cbff1b | 378 | EXPORT_SYMBOL(pseries_disable_reloc_on_exc); |
cedddd81 | 379 | |
da665885 | 380 | #ifdef CONFIG_KEXEC_CORE |
cedddd81 IM |
381 | static void pSeries_machine_kexec(struct kimage *image) |
382 | { | |
d3cbff1b BH |
383 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
384 | pseries_disable_reloc_on_exc(); | |
cedddd81 IM |
385 | |
386 | default_machine_kexec(image); | |
387 | } | |
388 | #endif | |
389 | ||
e844b1ee | 390 | #ifdef __LITTLE_ENDIAN__ |
d3cbff1b | 391 | void pseries_big_endian_exceptions(void) |
e844b1ee AB |
392 | { |
393 | long rc; | |
394 | ||
395 | while (1) { | |
396 | rc = enable_big_endian_exceptions(); | |
397 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 398 | break; |
e844b1ee AB |
399 | mdelay(get_longbusy_msecs(rc)); |
400 | } | |
d3cbff1b BH |
401 | |
402 | /* | |
403 | * At this point it is unlikely panic() will get anything | |
404 | * out to the user, since this is called very late in kexec | |
405 | * but at least this will stop us from continuing on further | |
406 | * and creating an even more difficult to debug situation. | |
407 | * | |
408 | * There is a known problem when kdump'ing, if cpus are offline | |
409 | * the above call will fail. Rather than panicking again, keep | |
410 | * going and hope the kdump kernel is also little endian, which | |
411 | * it usually is. | |
412 | */ | |
413 | if (rc && !kdump_in_progress()) | |
414 | panic("Could not enable big endian exceptions"); | |
e844b1ee AB |
415 | } |
416 | ||
d3cbff1b | 417 | void pseries_little_endian_exceptions(void) |
e844b1ee AB |
418 | { |
419 | long rc; | |
420 | ||
421 | while (1) { | |
422 | rc = enable_little_endian_exceptions(); | |
423 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 424 | break; |
e844b1ee AB |
425 | mdelay(get_longbusy_msecs(rc)); |
426 | } | |
d3cbff1b BH |
427 | if (rc) { |
428 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | |
429 | panic("Could not enable little endian exceptions"); | |
430 | } | |
e844b1ee AB |
431 | } |
432 | #endif | |
433 | ||
bdc728a8 DA |
434 | static void __init find_and_init_phbs(void) |
435 | { | |
436 | struct device_node *node; | |
437 | struct pci_controller *phb; | |
438 | struct device_node *root = of_find_node_by_path("/"); | |
439 | ||
440 | for_each_child_of_node(root, node) { | |
441 | if (node->type == NULL || (strcmp(node->type, "pci") != 0 && | |
442 | strcmp(node->type, "pciex") != 0)) | |
443 | continue; | |
444 | ||
445 | phb = pcibios_alloc_controller(node); | |
446 | if (!phb) | |
447 | continue; | |
448 | rtas_setup_phb(phb); | |
449 | pci_process_bridge_OF_ranges(phb, node, 0); | |
450 | isa_bridge_find_early(phb); | |
38ae9ec4 | 451 | phb->controller_ops = pseries_pci_controller_ops; |
bdc728a8 DA |
452 | } |
453 | ||
454 | of_node_put(root); | |
bdc728a8 DA |
455 | |
456 | /* | |
457 | * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties | |
458 | * in chosen. | |
459 | */ | |
705a7b47 | 460 | of_pci_check_probe_only(); |
bdc728a8 DA |
461 | } |
462 | ||
57691ae3 ME |
463 | static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) |
464 | { | |
174aa8bc MFO |
465 | /* |
466 | * The features below are disabled by default, so we instead look to see | |
467 | * if firmware has *enabled* them, and set them if so. | |
468 | */ | |
57691ae3 ME |
469 | if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) |
470 | security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); | |
471 | ||
472 | if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) | |
473 | security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); | |
474 | ||
475 | if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) | |
476 | security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); | |
477 | ||
478 | if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) | |
479 | security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); | |
480 | ||
481 | if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) | |
482 | security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); | |
483 | ||
484 | if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) | |
485 | security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); | |
486 | ||
487 | /* | |
488 | * The features below are enabled by default, so we instead look to see | |
489 | * if firmware has *disabled* them, and clear them if so. | |
490 | */ | |
c872fbc4 | 491 | if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) |
57691ae3 ME |
492 | security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); |
493 | ||
c872fbc4 | 494 | if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) |
57691ae3 ME |
495 | security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); |
496 | ||
c872fbc4 | 497 | if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) |
57691ae3 ME |
498 | security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); |
499 | } | |
500 | ||
111f258d | 501 | void pseries_setup_rfi_flush(void) |
8989d568 MN |
502 | { |
503 | struct h_cpu_char_result result; | |
504 | enum l1d_flush_type types; | |
505 | bool enable; | |
506 | long rc; | |
507 | ||
174aa8bc MFO |
508 | /* |
509 | * Set features to the defaults assumed by init_cpu_char_feature_flags() | |
510 | * so it can set/clear again any features that might have changed after | |
511 | * migration, and in case the hypercall fails and it is not even called. | |
512 | */ | |
513 | powerpc_security_features = SEC_FTR_DEFAULT; | |
514 | ||
8989d568 | 515 | rc = plpar_get_cpu_characteristics(&result); |
01830611 | 516 | if (rc == H_SUCCESS) |
57691ae3 ME |
517 | init_cpu_char_feature_flags(&result); |
518 | ||
57691ae3 ME |
519 | /* |
520 | * We're the guest so this doesn't apply to us, clear it to simplify | |
521 | * handling of it elsewhere. | |
522 | */ | |
523 | security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); | |
524 | ||
01830611 ME |
525 | types = L1D_FLUSH_FALLBACK; |
526 | ||
527 | if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) | |
528 | types |= L1D_FLUSH_MTTRIG; | |
529 | ||
530 | if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) | |
531 | types |= L1D_FLUSH_ORI; | |
532 | ||
533 | enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ | |
534 | security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); | |
535 | ||
8989d568 MN |
536 | setup_rfi_flush(types, enable); |
537 | } | |
538 | ||
0ebfff14 BH |
539 | static void __init pSeries_setup_arch(void) |
540 | { | |
b71d47c1 | 541 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
a934904d | 542 | |
0ebfff14 | 543 | /* Discover PIC type and setup ppc_md accordingly */ |
86425bed | 544 | smp_init_pseries(); |
e7da5dac | 545 | |
0ebfff14 | 546 | |
1da177e4 LT |
547 | /* openpic global configuration register (64-bit format). */ |
548 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
549 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
550 | ||
551 | /* init to some ~sane value until calibrate_delay() runs */ | |
552 | loops_per_jiffy = 50000000; | |
553 | ||
1da177e4 LT |
554 | fwnmi_init(); |
555 | ||
8989d568 | 556 | pseries_setup_rfi_flush(); |
cc437c1d | 557 | setup_stf_barrier(); |
8989d568 | 558 | |
446957ba | 559 | /* By default, only probe PCI (can be overridden by rtas_pci) */ |
673c9756 | 560 | pci_add_flags(PCI_PROBE_ONLY); |
3c13be01 | 561 | |
1da177e4 LT |
562 | /* Find and initialize PCI host bridges */ |
563 | init_pci_config_tokens(); | |
1da177e4 | 564 | find_and_init_phbs(); |
1cf3d8b3 | 565 | of_reconfig_notifier_register(&pci_dn_reconfig_nb); |
1da177e4 | 566 | |
1da177e4 LT |
567 | pSeries_nvram_init(); |
568 | ||
363edbe2 | 569 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
8d15a3e5 | 570 | vpa_init(boot_cpuid); |
363edbe2 | 571 | ppc_md.power_save = pseries_lpar_idle; |
180a3362 | 572 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
363edbe2 VS |
573 | } else { |
574 | /* No special idle routine */ | |
180a3362 | 575 | ppc_md.enable_pmcs = power4_enable_pmcs; |
363edbe2 | 576 | } |
fc8effa4 | 577 | |
d82fb31a | 578 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
1da177e4 LT |
579 | } |
580 | ||
581 | static int __init pSeries_init_panel(void) | |
582 | { | |
583 | /* Manually leave the kernel version on the panel. */ | |
983d8a6d | 584 | #ifdef __BIG_ENDIAN__ |
1da177e4 | 585 | ppc_md.progress("Linux ppc64\n", 0); |
983d8a6d TB |
586 | #else |
587 | ppc_md.progress("Linux ppc64le\n", 0); | |
588 | #endif | |
96b644bd | 589 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
590 | |
591 | return 0; | |
592 | } | |
f86d6b9b | 593 | machine_arch_initcall(pseries, pSeries_init_panel); |
1da177e4 | 594 | |
4474ef05 | 595 | static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) |
cab0af98 | 596 | { |
76032de8 | 597 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
598 | } |
599 | ||
4474ef05 | 600 | static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) |
76032de8 | 601 | { |
4474ef05 MN |
602 | /* Have to set at least one bit in the DABRX according to PAPR */ |
603 | if (dabrx == 0 && dabr == 0) | |
604 | dabrx = DABRX_USER; | |
605 | /* PAPR says we can only set kernel and user bits */ | |
cd144573 | 606 | dabrx &= DABRX_KERNEL | DABRX_USER; |
4474ef05 MN |
607 | |
608 | return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); | |
76032de8 | 609 | } |
1da177e4 | 610 | |
bf99de36 MN |
611 | static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) |
612 | { | |
613 | /* PAPR says we can't set HYP */ | |
614 | dawrx &= ~DAWRX_HYP; | |
615 | ||
616 | return plapr_set_watchpoint0(dawr, dawrx); | |
617 | } | |
618 | ||
e46de429 RJ |
619 | #define CMO_CHARACTERISTICS_TOKEN 44 |
620 | #define CMO_MAXLENGTH 1026 | |
621 | ||
9ee820fa BK |
622 | void pSeries_coalesce_init(void) |
623 | { | |
624 | struct hvcall_mpp_x_data mpp_x_data; | |
625 | ||
626 | if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) | |
627 | powerpc_firmware_features |= FW_FEATURE_XCMO; | |
628 | else | |
629 | powerpc_firmware_features &= ~FW_FEATURE_XCMO; | |
630 | } | |
631 | ||
e46de429 RJ |
632 | /** |
633 | * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, | |
634 | * handle that here. (Stolen from parse_system_parameter_string) | |
635 | */ | |
e51df2c1 | 636 | static void pSeries_cmo_feature_init(void) |
e46de429 RJ |
637 | { |
638 | char *ptr, *key, *value, *end; | |
639 | int call_status; | |
e589a440 | 640 | int page_order = IOMMU_PAGE_SHIFT_4K; |
e46de429 RJ |
641 | |
642 | pr_debug(" -> fw_cmo_feature_init()\n"); | |
643 | spin_lock(&rtas_data_buf_lock); | |
644 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); | |
645 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | |
646 | NULL, | |
647 | CMO_CHARACTERISTICS_TOKEN, | |
648 | __pa(rtas_data_buf), | |
649 | RTAS_DATA_BUF_SIZE); | |
650 | ||
651 | if (call_status != 0) { | |
652 | spin_unlock(&rtas_data_buf_lock); | |
653 | pr_debug("CMO not available\n"); | |
654 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
655 | return; | |
656 | } | |
657 | ||
658 | end = rtas_data_buf + CMO_MAXLENGTH - 2; | |
659 | ptr = rtas_data_buf + 2; /* step over strlen value */ | |
660 | key = value = ptr; | |
661 | ||
662 | while (*ptr && (ptr <= end)) { | |
663 | /* Separate the key and value by replacing '=' with '\0' and | |
664 | * point the value at the string after the '=' | |
665 | */ | |
666 | if (ptr[0] == '=') { | |
667 | ptr[0] = '\0'; | |
668 | value = ptr + 1; | |
669 | } else if (ptr[0] == '\0' || ptr[0] == ',') { | |
670 | /* Terminate the string containing the key/value pair */ | |
671 | ptr[0] = '\0'; | |
672 | ||
673 | if (key == value) { | |
674 | pr_debug("Malformed key/value pair\n"); | |
675 | /* Never found a '=', end processing */ | |
676 | break; | |
677 | } | |
678 | ||
81f14997 RJ |
679 | if (0 == strcmp(key, "CMOPageSize")) |
680 | page_order = simple_strtol(value, NULL, 10); | |
681 | else if (0 == strcmp(key, "PrPSP")) | |
682 | CMO_PrPSP = simple_strtol(value, NULL, 10); | |
e46de429 | 683 | else if (0 == strcmp(key, "SecPSP")) |
81f14997 | 684 | CMO_SecPSP = simple_strtol(value, NULL, 10); |
e46de429 RJ |
685 | value = key = ptr + 1; |
686 | } | |
687 | ptr++; | |
688 | } | |
689 | ||
81f14997 RJ |
690 | /* Page size is returned as the power of 2 of the page size, |
691 | * convert to the page size in bytes before returning | |
692 | */ | |
693 | CMO_PageSize = 1 << page_order; | |
694 | pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); | |
695 | ||
696 | if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { | |
e46de429 | 697 | pr_info("CMO enabled\n"); |
81f14997 RJ |
698 | pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
699 | CMO_SecPSP); | |
e46de429 | 700 | powerpc_firmware_features |= FW_FEATURE_CMO; |
9ee820fa | 701 | pSeries_coalesce_init(); |
e46de429 | 702 | } else |
81f14997 RJ |
703 | pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
704 | CMO_SecPSP); | |
e46de429 RJ |
705 | spin_unlock(&rtas_data_buf_lock); |
706 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
707 | } | |
708 | ||
1da177e4 LT |
709 | /* |
710 | * Early initialization. Relocation is on but do not reference unbolted pages | |
711 | */ | |
f2d57694 | 712 | static void __init pseries_init(void) |
1da177e4 | 713 | { |
f2d57694 | 714 | pr_debug(" -> pseries_init()\n"); |
1da177e4 | 715 | |
4d2bb3f5 | 716 | #ifdef CONFIG_HVC_CONSOLE |
57cfb814 | 717 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4d2bb3f5 BH |
718 | hvc_vio_init_early(); |
719 | #endif | |
06c88766 | 720 | if (firmware_has_feature(FW_FEATURE_XDABR)) |
76032de8 | 721 | ppc_md.set_dabr = pseries_set_xdabr; |
06c88766 MN |
722 | else if (firmware_has_feature(FW_FEATURE_DABR)) |
723 | ppc_md.set_dabr = pseries_set_dabr; | |
1da177e4 | 724 | |
bf99de36 MN |
725 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
726 | ppc_md.set_dawr = pseries_set_dawr; | |
727 | ||
e46de429 | 728 | pSeries_cmo_feature_init(); |
1da177e4 LT |
729 | iommu_init_early_pSeries(); |
730 | ||
f2d57694 | 731 | pr_debug(" <- pseries_init()\n"); |
1da177e4 LT |
732 | } |
733 | ||
9178ba29 AG |
734 | /** |
735 | * pseries_power_off - tell firmware about how to power off the system. | |
736 | * | |
737 | * This function calls either the power-off rtas token in normal cases | |
738 | * or the ibm,power-off-ups token (if present & requested) in case of | |
739 | * a power failure. If power-off token is used, power on will only be | |
740 | * possible with power button press. If ibm,power-off-ups token is used | |
741 | * it will allow auto poweron after power is restored. | |
742 | */ | |
743 | static void pseries_power_off(void) | |
744 | { | |
745 | int rc; | |
746 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
747 | ||
748 | if (rtas_flash_term_hook) | |
749 | rtas_flash_term_hook(SYS_POWER_OFF); | |
750 | ||
751 | if (rtas_poweron_auto == 0 || | |
752 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
753 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
754 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
755 | } else { | |
756 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
757 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
758 | } | |
759 | for (;;); | |
760 | } | |
761 | ||
e8222502 BH |
762 | static int __init pSeries_probe(void) |
763 | { | |
406b0b6a | 764 | const char *dtype = of_get_property(of_root, "device_type", NULL); |
5773bbcd | 765 | |
e8222502 BH |
766 | if (dtype == NULL) |
767 | return 0; | |
768 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
769 | return 0; |
770 | ||
133dda1e AB |
771 | /* Cell blades firmware claims to be chrp while it's not. Until this |
772 | * is fixed, we need to avoid those here. | |
773 | */ | |
406b0b6a BH |
774 | if (of_machine_is_compatible("IBM,CPBW-1.0") || |
775 | of_machine_is_compatible("IBM,CBEA")) | |
133dda1e AB |
776 | return 0; |
777 | ||
9178ba29 AG |
778 | pm_power_off = pseries_power_off; |
779 | ||
f7ebf352 ME |
780 | pr_debug("Machine is%s LPAR !\n", |
781 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 782 | |
f2d57694 BH |
783 | pseries_init(); |
784 | ||
1da177e4 LT |
785 | return 1; |
786 | } | |
787 | ||
4267292b PM |
788 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
789 | { | |
57cfb814 | 790 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
791 | return PCI_PROBE_DEVTREE; |
792 | return PCI_PROBE_NORMAL; | |
793 | } | |
794 | ||
38ae9ec4 DA |
795 | struct pci_controller_ops pseries_pci_controller_ops = { |
796 | .probe_mode = pSeries_pci_probe_mode, | |
797 | }; | |
798 | ||
e8222502 BH |
799 | define_machine(pseries) { |
800 | .name = "pSeries", | |
1da177e4 LT |
801 | .probe = pSeries_probe, |
802 | .setup_arch = pSeries_setup_arch, | |
e7da5dac | 803 | .init_IRQ = pseries_init_irq, |
0dd194d0 | 804 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
805 | .log_error = pSeries_log_error, |
806 | .pcibios_fixup = pSeries_final_fixup, | |
f4fcbbe9 | 807 | .restart = rtas_restart, |
f4fcbbe9 | 808 | .halt = rtas_halt, |
ab9dbf77 | 809 | .panic = rtas_os_term, |
773bf9c4 AB |
810 | .get_boot_time = rtas_get_boot_time, |
811 | .get_rtc_time = rtas_get_rtc_time, | |
812 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 813 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 814 | .progress = rtas_progress, |
1da177e4 LT |
815 | .system_reset_exception = pSeries_system_reset_exception, |
816 | .machine_check_exception = pSeries_machine_check_exception, | |
da665885 | 817 | #ifdef CONFIG_KEXEC_CORE |
cedddd81 | 818 | .machine_kexec = pSeries_machine_kexec, |
d739d2ca | 819 | .kexec_cpu_down = pseries_kexec_cpu_down, |
cedddd81 | 820 | #endif |
a5d86257 AB |
821 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
822 | .memory_block_size = pseries_memory_block_size, | |
823 | #endif | |
1da177e4 | 824 | }; |