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b2441318 1// SPDX-License-Identifier: GPL-2.0
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2/*
3 * Core of Xen paravirt_ops implementation.
4 *
5 * This file contains the xen_paravirt_ops structure itself, and the
6 * implementations for:
7 * - privileged instructions
8 * - interrupt flags
9 * - segment operations
10 * - booting and setup
11 *
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13 */
14
15#include <linux/cpu.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/smp.h>
19#include <linux/preempt.h>
20#include <linux/hardirq.h>
21#include <linux/percpu.h>
22#include <linux/delay.h>
23#include <linux/start_kernel.h>
24#include <linux/sched.h>
25#include <linux/kprobes.h>
26#include <linux/bootmem.h>
27#include <linux/export.h>
28#include <linux/mm.h>
29#include <linux/page-flags.h>
30#include <linux/highmem.h>
31#include <linux/console.h>
32#include <linux/pci.h>
33#include <linux/gfp.h>
34#include <linux/memblock.h>
35#include <linux/edd.h>
36#include <linux/frame.h>
37
38#include <xen/xen.h>
39#include <xen/events.h>
40#include <xen/interface/xen.h>
41#include <xen/interface/version.h>
42#include <xen/interface/physdev.h>
43#include <xen/interface/vcpu.h>
44#include <xen/interface/memory.h>
45#include <xen/interface/nmi.h>
46#include <xen/interface/xen-mca.h>
47#include <xen/features.h>
48#include <xen/page.h>
49#include <xen/hvc-console.h>
50#include <xen/acpi.h>
51
52#include <asm/paravirt.h>
53#include <asm/apic.h>
54#include <asm/page.h>
55#include <asm/xen/pci.h>
56#include <asm/xen/hypercall.h>
57#include <asm/xen/hypervisor.h>
58#include <asm/xen/cpuid.h>
59#include <asm/fixmap.h>
60#include <asm/processor.h>
61#include <asm/proto.h>
62#include <asm/msr-index.h>
63#include <asm/traps.h>
64#include <asm/setup.h>
65#include <asm/desc.h>
66#include <asm/pgalloc.h>
67#include <asm/pgtable.h>
68#include <asm/tlbflush.h>
69#include <asm/reboot.h>
70#include <asm/stackprotector.h>
71#include <asm/hypervisor.h>
72#include <asm/mach_traps.h>
73#include <asm/mwait.h>
74#include <asm/pci_x86.h>
75#include <asm/cpu.h>
76
77#ifdef CONFIG_ACPI
78#include <linux/acpi.h>
79#include <asm/acpi.h>
80#include <acpi/pdc_intel.h>
81#include <acpi/processor.h>
82#include <xen/interface/platform.h>
83#endif
84
85#include "xen-ops.h"
86#include "mmu.h"
87#include "smp.h"
88#include "multicalls.h"
89#include "pmu.h"
90
91void *xen_initial_gdt;
92
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93static int xen_cpu_up_prepare_pv(unsigned int cpu);
94static int xen_cpu_dead_pv(unsigned int cpu);
95
96struct tls_descs {
97 struct desc_struct desc[3];
98};
99
100/*
101 * Updating the 3 TLS descriptors in the GDT on every task switch is
102 * surprisingly expensive so we avoid updating them if they haven't
103 * changed. Since Xen writes different descriptors than the one
104 * passed in the update_descriptor hypercall we keep shadow copies to
105 * compare against.
106 */
107static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
108
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109static void __init xen_banner(void)
110{
111 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
112 struct xen_extraversion extra;
113 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
114
989513a7 115 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
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116 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
117 version >> 16, version & 0xffff, extra.extraversion,
118 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
119}
120/* Check if running on Xen version (major, minor) or later */
121bool
122xen_running_on_version_or_later(unsigned int major, unsigned int minor)
123{
124 unsigned int version;
125
126 if (!xen_domain())
127 return false;
128
129 version = HYPERVISOR_xen_version(XENVER_version, NULL);
130 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
131 ((version >> 16) > major))
132 return true;
133 return false;
134}
135
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136static __read_mostly unsigned int cpuid_leaf5_ecx_val;
137static __read_mostly unsigned int cpuid_leaf5_edx_val;
138
139static void xen_cpuid(unsigned int *ax, unsigned int *bx,
140 unsigned int *cx, unsigned int *dx)
141{
142 unsigned maskebx = ~0;
6807cf65 143
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144 /*
145 * Mask out inconvenient features, to try and disable as many
146 * unsupported kernel subsystems as possible.
147 */
148 switch (*ax) {
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149 case CPUID_MWAIT_LEAF:
150 /* Synthesize the values.. */
151 *ax = 0;
152 *bx = 0;
153 *cx = cpuid_leaf5_ecx_val;
154 *dx = cpuid_leaf5_edx_val;
155 return;
156
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157 case 0xb:
158 /* Suppress extended topology stuff */
159 maskebx = 0;
160 break;
161 }
162
163 asm(XEN_EMULATE_PREFIX "cpuid"
164 : "=a" (*ax),
165 "=b" (*bx),
166 "=c" (*cx),
167 "=d" (*dx)
168 : "0" (*ax), "2" (*cx));
169
170 *bx &= maskebx;
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171}
172STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
173
174static bool __init xen_check_mwait(void)
175{
176#ifdef CONFIG_ACPI
177 struct xen_platform_op op = {
178 .cmd = XENPF_set_processor_pminfo,
179 .u.set_pminfo.id = -1,
180 .u.set_pminfo.type = XEN_PM_PDC,
181 };
182 uint32_t buf[3];
183 unsigned int ax, bx, cx, dx;
184 unsigned int mwait_mask;
185
186 /* We need to determine whether it is OK to expose the MWAIT
187 * capability to the kernel to harvest deeper than C3 states from ACPI
188 * _CST using the processor_harvest_xen.c module. For this to work, we
189 * need to gather the MWAIT_LEAF values (which the cstate.c code
190 * checks against). The hypervisor won't expose the MWAIT flag because
191 * it would break backwards compatibility; so we will find out directly
192 * from the hardware and hypercall.
193 */
194 if (!xen_initial_domain())
195 return false;
196
197 /*
198 * When running under platform earlier than Xen4.2, do not expose
199 * mwait, to avoid the risk of loading native acpi pad driver
200 */
201 if (!xen_running_on_version_or_later(4, 2))
202 return false;
203
204 ax = 1;
205 cx = 0;
206
207 native_cpuid(&ax, &bx, &cx, &dx);
208
209 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
210 (1 << (X86_FEATURE_MWAIT % 32));
211
212 if ((cx & mwait_mask) != mwait_mask)
213 return false;
214
215 /* We need to emulate the MWAIT_LEAF and for that we need both
216 * ecx and edx. The hypercall provides only partial information.
217 */
218
219 ax = CPUID_MWAIT_LEAF;
220 bx = 0;
221 cx = 0;
222 dx = 0;
223
224 native_cpuid(&ax, &bx, &cx, &dx);
225
226 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
227 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
228 */
229 buf[0] = ACPI_PDC_REVISION_ID;
230 buf[1] = 1;
231 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
232
233 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
234
235 if ((HYPERVISOR_platform_op(&op) == 0) &&
236 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
237 cpuid_leaf5_ecx_val = cx;
238 cpuid_leaf5_edx_val = dx;
239 }
240 return true;
241#else
242 return false;
243#endif
244}
e1dab14c 245
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246static bool __init xen_check_xsave(void)
247{
40f4ac0b 248 unsigned int cx, xsave_mask;
e1dab14c 249
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250 cx = cpuid_ecx(1);
251
252 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
253 (1 << (X86_FEATURE_OSXSAVE % 32));
254
255 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
256 return (cx & xsave_mask) == xsave_mask;
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257}
258
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259static void __init xen_init_capabilities(void)
260{
0808e80c 261 setup_force_cpu_cap(X86_FEATURE_XENPV);
3ee99df3 262 setup_clear_cpu_cap(X86_FEATURE_DCA);
fd9145fd 263 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
88f3256f 264 setup_clear_cpu_cap(X86_FEATURE_MTRR);
aa107156 265 setup_clear_cpu_cap(X86_FEATURE_ACC);
e657fccb 266 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
f2f931c6 267 setup_clear_cpu_cap(X86_FEATURE_SME);
b778d6bf 268
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269 /*
270 * Xen PV would need some work to support PCID: CR3 handling as well
271 * as xen_flush_tlb_others() would need updating.
272 */
273 setup_clear_cpu_cap(X86_FEATURE_PCID);
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274
275 if (!xen_initial_domain())
276 setup_clear_cpu_cap(X86_FEATURE_ACPI);
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277
278 if (xen_check_mwait())
279 setup_force_cpu_cap(X86_FEATURE_MWAIT);
280 else
281 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
6807cf65 282
40f4ac0b 283 if (!xen_check_xsave()) {
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284 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
285 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
286 }
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287}
288
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289static void xen_set_debugreg(int reg, unsigned long val)
290{
291 HYPERVISOR_set_debugreg(reg, val);
292}
293
294static unsigned long xen_get_debugreg(int reg)
295{
296 return HYPERVISOR_get_debugreg(reg);
297}
298
299static void xen_end_context_switch(struct task_struct *next)
300{
301 xen_mc_flush();
302 paravirt_end_context_switch(next);
303}
304
305static unsigned long xen_store_tr(void)
306{
307 return 0;
308}
309
310/*
311 * Set the page permissions for a particular virtual address. If the
312 * address is a vmalloc mapping (or other non-linear mapping), then
313 * find the linear mapping of the page and also set its protections to
314 * match.
315 */
316static void set_aliased_prot(void *v, pgprot_t prot)
317{
318 int level;
319 pte_t *ptep;
320 pte_t pte;
321 unsigned long pfn;
322 struct page *page;
323 unsigned char dummy;
324
325 ptep = lookup_address((unsigned long)v, &level);
326 BUG_ON(ptep == NULL);
327
328 pfn = pte_pfn(*ptep);
329 page = pfn_to_page(pfn);
330
331 pte = pfn_pte(pfn, prot);
332
333 /*
334 * Careful: update_va_mapping() will fail if the virtual address
335 * we're poking isn't populated in the page tables. We don't
336 * need to worry about the direct map (that's always in the page
337 * tables), but we need to be careful about vmap space. In
338 * particular, the top level page table can lazily propagate
339 * entries between processes, so if we've switched mms since we
340 * vmapped the target in the first place, we might not have the
341 * top-level page table entry populated.
342 *
343 * We disable preemption because we want the same mm active when
344 * we probe the target and when we issue the hypercall. We'll
345 * have the same nominal mm, but if we're a kernel thread, lazy
346 * mm dropping could change our pgd.
347 *
348 * Out of an abundance of caution, this uses __get_user() to fault
349 * in the target address just in case there's some obscure case
350 * in which the target address isn't readable.
351 */
352
353 preempt_disable();
354
355 probe_kernel_read(&dummy, v, 1);
356
357 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
358 BUG();
359
360 if (!PageHighMem(page)) {
361 void *av = __va(PFN_PHYS(pfn));
362
363 if (av != v)
364 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
365 BUG();
366 } else
367 kmap_flush_unused();
368
369 preempt_enable();
370}
371
372static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
373{
374 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
375 int i;
376
377 /*
378 * We need to mark the all aliases of the LDT pages RO. We
379 * don't need to call vm_flush_aliases(), though, since that's
380 * only responsible for flushing aliases out the TLBs, not the
381 * page tables, and Xen will flush the TLB for us if needed.
382 *
383 * To avoid confusing future readers: none of this is necessary
384 * to load the LDT. The hypervisor only checks this when the
385 * LDT is faulted in due to subsequent descriptor access.
386 */
387
388 for (i = 0; i < entries; i += entries_per_page)
389 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
390}
391
392static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
393{
394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
395 int i;
396
397 for (i = 0; i < entries; i += entries_per_page)
398 set_aliased_prot(ldt + i, PAGE_KERNEL);
399}
400
401static void xen_set_ldt(const void *addr, unsigned entries)
402{
403 struct mmuext_op *op;
404 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
405
406 trace_xen_cpu_set_ldt(addr, entries);
407
408 op = mcs.args;
409 op->cmd = MMUEXT_SET_LDT;
410 op->arg1.linear_addr = (unsigned long)addr;
411 op->arg2.nr_ents = entries;
412
413 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
414
415 xen_mc_issue(PARAVIRT_LAZY_CPU);
416}
417
418static void xen_load_gdt(const struct desc_ptr *dtr)
419{
420 unsigned long va = dtr->address;
421 unsigned int size = dtr->size + 1;
422 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
423 unsigned long frames[pages];
424 int f;
425
426 /*
427 * A GDT can be up to 64k in size, which corresponds to 8192
428 * 8-byte entries, or 16 4k pages..
429 */
430
431 BUG_ON(size > 65536);
432 BUG_ON(va & ~PAGE_MASK);
433
434 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
435 int level;
436 pte_t *ptep;
437 unsigned long pfn, mfn;
438 void *virt;
439
440 /*
441 * The GDT is per-cpu and is in the percpu data area.
442 * That can be virtually mapped, so we need to do a
443 * page-walk to get the underlying MFN for the
444 * hypercall. The page can also be in the kernel's
445 * linear range, so we need to RO that mapping too.
446 */
447 ptep = lookup_address(va, &level);
448 BUG_ON(ptep == NULL);
449
450 pfn = pte_pfn(*ptep);
451 mfn = pfn_to_mfn(pfn);
452 virt = __va(PFN_PHYS(pfn));
453
454 frames[f] = mfn;
455
456 make_lowmem_page_readonly((void *)va);
457 make_lowmem_page_readonly(virt);
458 }
459
460 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
461 BUG();
462}
463
464/*
465 * load_gdt for early boot, when the gdt is only mapped once
466 */
467static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
468{
469 unsigned long va = dtr->address;
470 unsigned int size = dtr->size + 1;
471 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
472 unsigned long frames[pages];
473 int f;
474
475 /*
476 * A GDT can be up to 64k in size, which corresponds to 8192
477 * 8-byte entries, or 16 4k pages..
478 */
479
480 BUG_ON(size > 65536);
481 BUG_ON(va & ~PAGE_MASK);
482
483 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
484 pte_t pte;
485 unsigned long pfn, mfn;
486
487 pfn = virt_to_pfn(va);
488 mfn = pfn_to_mfn(pfn);
489
490 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
491
492 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
493 BUG();
494
495 frames[f] = mfn;
496 }
497
498 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
499 BUG();
500}
501
502static inline bool desc_equal(const struct desc_struct *d1,
503 const struct desc_struct *d2)
504{
9a98e778 505 return !memcmp(d1, d2, sizeof(*d1));
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506}
507
508static void load_TLS_descriptor(struct thread_struct *t,
509 unsigned int cpu, unsigned int i)
510{
511 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
512 struct desc_struct *gdt;
513 xmaddr_t maddr;
514 struct multicall_space mc;
515
516 if (desc_equal(shadow, &t->tls_array[i]))
517 return;
518
519 *shadow = t->tls_array[i];
520
521 gdt = get_cpu_gdt_rw(cpu);
522 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
523 mc = __xen_mc_entry(0);
524
525 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
526}
527
528static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
529{
530 /*
531 * XXX sleazy hack: If we're being called in a lazy-cpu zone
532 * and lazy gs handling is enabled, it means we're in a
533 * context switch, and %gs has just been saved. This means we
534 * can zero it out to prevent faults on exit from the
535 * hypervisor if the next process has no %gs. Either way, it
536 * has been saved, and the new value will get loaded properly.
537 * This will go away as soon as Xen has been modified to not
538 * save/restore %gs for normal hypercalls.
539 *
540 * On x86_64, this hack is not used for %gs, because gs points
541 * to KERNEL_GS_BASE (and uses it for PDA references), so we
542 * must not zero %gs on x86_64
543 *
544 * For x86_64, we need to zero %fs, otherwise we may get an
545 * exception between the new %fs descriptor being loaded and
546 * %fs being effectively cleared at __switch_to().
547 */
548 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
549#ifdef CONFIG_X86_32
550 lazy_load_gs(0);
551#else
552 loadsegment(fs, 0);
553#endif
554 }
555
556 xen_mc_batch();
557
558 load_TLS_descriptor(t, cpu, 0);
559 load_TLS_descriptor(t, cpu, 1);
560 load_TLS_descriptor(t, cpu, 2);
561
562 xen_mc_issue(PARAVIRT_LAZY_CPU);
563}
564
565#ifdef CONFIG_X86_64
566static void xen_load_gs_index(unsigned int idx)
567{
568 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
569 BUG();
570}
571#endif
572
573static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
574 const void *ptr)
575{
576 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
577 u64 entry = *(u64 *)ptr;
578
579 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
580
581 preempt_disable();
582
583 xen_mc_flush();
584 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
585 BUG();
586
587 preempt_enable();
588}
589
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590#ifdef CONFIG_X86_64
591struct trap_array_entry {
592 void (*orig)(void);
593 void (*xen)(void);
594 bool ist_okay;
595};
596
597static struct trap_array_entry trap_array[] = {
598 { debug, xen_xendebug, true },
599 { int3, xen_xenint3, true },
600 { double_fault, xen_double_fault, true },
601#ifdef CONFIG_X86_MCE
602 { machine_check, xen_machine_check, true },
603#endif
43e41110 604 { nmi, xen_xennmi, true },
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605 { overflow, xen_overflow, false },
606#ifdef CONFIG_IA32_EMULATION
607 { entry_INT80_compat, xen_entry_INT80_compat, false },
608#endif
609 { page_fault, xen_page_fault, false },
610 { divide_error, xen_divide_error, false },
611 { bounds, xen_bounds, false },
612 { invalid_op, xen_invalid_op, false },
613 { device_not_available, xen_device_not_available, false },
614 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
615 { invalid_TSS, xen_invalid_TSS, false },
616 { segment_not_present, xen_segment_not_present, false },
617 { stack_segment, xen_stack_segment, false },
618 { general_protection, xen_general_protection, false },
619 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false },
620 { coprocessor_error, xen_coprocessor_error, false },
621 { alignment_check, xen_alignment_check, false },
622 { simd_coprocessor_error, xen_simd_coprocessor_error, false },
623};
624
42b3a4cb 625static bool __ref get_trap_addr(void **addr, unsigned int ist)
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626{
627 unsigned int nr;
628 bool ist_okay = false;
629
630 /*
631 * Replace trap handler addresses by Xen specific ones.
632 * Check for known traps using IST and whitelist them.
633 * The debugger ones are the only ones we care about.
634 * Xen will handle faults like double_fault, * so we should never see
635 * them. Warn if there's an unexpected IST-using fault handler.
636 */
637 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
638 struct trap_array_entry *entry = trap_array + nr;
639
640 if (*addr == entry->orig) {
641 *addr = entry->xen;
642 ist_okay = entry->ist_okay;
643 break;
644 }
645 }
646
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647 if (nr == ARRAY_SIZE(trap_array) &&
648 *addr >= (void *)early_idt_handler_array[0] &&
649 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
650 nr = (*addr - (void *)early_idt_handler_array[0]) /
651 EARLY_IDT_HANDLER_SIZE;
652 *addr = (void *)xen_early_idt_handler_array[nr];
653 }
654
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655 if (WARN_ON(ist != 0 && !ist_okay))
656 return false;
657
658 return true;
659}
660#endif
661
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662static int cvt_gate_to_trap(int vector, const gate_desc *val,
663 struct trap_info *info)
664{
665 unsigned long addr;
666
64b163fa 667 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
e1dab14c
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668 return 0;
669
670 info->vector = vector;
671
64b163fa 672 addr = gate_offset(val);
e1dab14c 673#ifdef CONFIG_X86_64
5878d5d6 674 if (!get_trap_addr((void **)&addr, val->bits.ist))
e1dab14c 675 return 0;
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676#endif /* CONFIG_X86_64 */
677 info->address = addr;
678
64b163fa
TG
679 info->cs = gate_segment(val);
680 info->flags = val->bits.dpl;
e1dab14c 681 /* interrupt gates clear IF */
64b163fa 682 if (val->bits.type == GATE_INTERRUPT)
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683 info->flags |= 1 << 2;
684
685 return 1;
686}
687
688/* Locations of each CPU's IDT */
689static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
690
691/* Set an IDT entry. If the entry is part of the current IDT, then
692 also update Xen. */
693static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
694{
695 unsigned long p = (unsigned long)&dt[entrynum];
696 unsigned long start, end;
697
698 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
699
700 preempt_disable();
701
702 start = __this_cpu_read(idt_desc.address);
703 end = start + __this_cpu_read(idt_desc.size) + 1;
704
705 xen_mc_flush();
706
707 native_write_idt_entry(dt, entrynum, g);
708
709 if (p >= start && (p + 8) <= end) {
710 struct trap_info info[2];
711
712 info[1].address = 0;
713
714 if (cvt_gate_to_trap(entrynum, g, &info[0]))
715 if (HYPERVISOR_set_trap_table(info))
716 BUG();
717 }
718
719 preempt_enable();
720}
721
722static void xen_convert_trap_info(const struct desc_ptr *desc,
723 struct trap_info *traps)
724{
725 unsigned in, out, count;
726
727 count = (desc->size+1) / sizeof(gate_desc);
728 BUG_ON(count > 256);
729
730 for (in = out = 0; in < count; in++) {
731 gate_desc *entry = (gate_desc *)(desc->address) + in;
732
733 if (cvt_gate_to_trap(in, entry, &traps[out]))
734 out++;
735 }
736 traps[out].address = 0;
737}
738
739void xen_copy_trap_info(struct trap_info *traps)
740{
741 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
742
743 xen_convert_trap_info(desc, traps);
744}
745
746/* Load a new IDT into Xen. In principle this can be per-CPU, so we
747 hold a spinlock to protect the static traps[] array (static because
748 it avoids allocation, and saves stack space). */
749static void xen_load_idt(const struct desc_ptr *desc)
750{
751 static DEFINE_SPINLOCK(lock);
752 static struct trap_info traps[257];
753
754 trace_xen_cpu_load_idt(desc);
755
756 spin_lock(&lock);
757
758 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
759
760 xen_convert_trap_info(desc, traps);
761
762 xen_mc_flush();
763 if (HYPERVISOR_set_trap_table(traps))
764 BUG();
765
766 spin_unlock(&lock);
767}
768
769/* Write a GDT descriptor entry. Ignore LDT descriptors, since
770 they're handled differently. */
771static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
772 const void *desc, int type)
773{
774 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
775
776 preempt_disable();
777
778 switch (type) {
779 case DESC_LDT:
780 case DESC_TSS:
781 /* ignore */
782 break;
783
784 default: {
785 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
786
787 xen_mc_flush();
788 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
789 BUG();
790 }
791
792 }
793
794 preempt_enable();
795}
796
797/*
798 * Version of write_gdt_entry for use at early boot-time needed to
799 * update an entry as simply as possible.
800 */
801static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
802 const void *desc, int type)
803{
804 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
805
806 switch (type) {
807 case DESC_LDT:
808 case DESC_TSS:
809 /* ignore */
810 break;
811
812 default: {
813 xmaddr_t maddr = virt_to_machine(&dt[entry]);
814
815 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
816 dt[entry] = *(struct desc_struct *)desc;
817 }
818
819 }
820}
821
da51da18 822static void xen_load_sp0(unsigned long sp0)
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823{
824 struct multicall_space mcs;
825
826 mcs = xen_mc_entry(0);
da51da18 827 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
e1dab14c 828 xen_mc_issue(PARAVIRT_LAZY_CPU);
da51da18 829 this_cpu_write(cpu_tss.x86_tss.sp0, sp0);
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830}
831
832void xen_set_iopl_mask(unsigned mask)
833{
834 struct physdev_set_iopl set_iopl;
835
836 /* Force the change at ring 0. */
837 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
838 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
839}
840
841static void xen_io_delay(void)
842{
843}
844
845static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
846
847static unsigned long xen_read_cr0(void)
848{
849 unsigned long cr0 = this_cpu_read(xen_cr0_value);
850
851 if (unlikely(cr0 == 0)) {
852 cr0 = native_read_cr0();
853 this_cpu_write(xen_cr0_value, cr0);
854 }
855
856 return cr0;
857}
858
859static void xen_write_cr0(unsigned long cr0)
860{
861 struct multicall_space mcs;
862
863 this_cpu_write(xen_cr0_value, cr0);
864
865 /* Only pay attention to cr0.TS; everything else is
866 ignored. */
867 mcs = xen_mc_entry(0);
868
869 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
870
871 xen_mc_issue(PARAVIRT_LAZY_CPU);
872}
873
874static void xen_write_cr4(unsigned long cr4)
875{
876 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
877
878 native_write_cr4(cr4);
879}
880#ifdef CONFIG_X86_64
881static inline unsigned long xen_read_cr8(void)
882{
883 return 0;
884}
885static inline void xen_write_cr8(unsigned long val)
886{
887 BUG_ON(val);
888}
889#endif
890
891static u64 xen_read_msr_safe(unsigned int msr, int *err)
892{
893 u64 val;
894
895 if (pmu_msr_read(msr, &val, err))
896 return val;
897
898 val = native_read_msr_safe(msr, err);
899 switch (msr) {
900 case MSR_IA32_APICBASE:
901#ifdef CONFIG_X86_X2APIC
902 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
903#endif
904 val &= ~X2APIC_ENABLE;
905 break;
906 }
907 return val;
908}
909
910static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
911{
912 int ret;
913
914 ret = 0;
915
916 switch (msr) {
917#ifdef CONFIG_X86_64
918 unsigned which;
919 u64 base;
920
921 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
922 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
923 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
924
925 set:
926 base = ((u64)high << 32) | low;
927 if (HYPERVISOR_set_segment_base(which, base) != 0)
928 ret = -EIO;
929 break;
930#endif
931
932 case MSR_STAR:
933 case MSR_CSTAR:
934 case MSR_LSTAR:
935 case MSR_SYSCALL_MASK:
936 case MSR_IA32_SYSENTER_CS:
937 case MSR_IA32_SYSENTER_ESP:
938 case MSR_IA32_SYSENTER_EIP:
939 /* Fast syscall setup is all done in hypercalls, so
940 these are all ignored. Stub them out here to stop
941 Xen console noise. */
942 break;
943
944 default:
945 if (!pmu_msr_write(msr, low, high, &ret))
946 ret = native_write_msr_safe(msr, low, high);
947 }
948
949 return ret;
950}
951
952static u64 xen_read_msr(unsigned int msr)
953{
954 /*
955 * This will silently swallow a #GP from RDMSR. It may be worth
956 * changing that.
957 */
958 int err;
959
960 return xen_read_msr_safe(msr, &err);
961}
962
963static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
964{
965 /*
966 * This will silently swallow a #GP from WRMSR. It may be worth
967 * changing that.
968 */
969 xen_write_msr_safe(msr, low, high);
970}
971
972void xen_setup_shared_info(void)
973{
989513a7 974 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
e1dab14c 975
989513a7
JG
976 HYPERVISOR_shared_info =
977 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
e1dab14c 978
e1dab14c 979 xen_setup_mfn_list_list();
d162809f 980
0e4d5837
AA
981 if (system_state == SYSTEM_BOOTING) {
982#ifndef CONFIG_SMP
983 /*
984 * In UP this is as good a place as any to set up shared info.
985 * Limit this to boot only, at restore vcpu setup is done via
986 * xen_vcpu_restore().
987 */
988 xen_setup_vcpu_info_placement();
989#endif
990 /*
991 * Now that shared info is set up we can start using routines
992 * that point to pvclock area.
993 */
d162809f 994 xen_init_time_ops();
0e4d5837 995 }
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996}
997
998/* This is called once we have the cpu_possible_mask */
0e4d5837 999void __ref xen_setup_vcpu_info_placement(void)
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1000{
1001 int cpu;
1002
1003 for_each_possible_cpu(cpu) {
1004 /* Set up direct vCPU id mapping for PV guests. */
1005 per_cpu(xen_vcpu_id, cpu) = cpu;
c9b5d98b
AA
1006
1007 /*
1008 * xen_vcpu_setup(cpu) can fail -- in which case it
1009 * falls back to the shared_info version for cpus
1010 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
1011 *
1012 * xen_cpu_up_prepare_pv() handles the rest by failing
1013 * them in hotplug.
1014 */
1015 (void) xen_vcpu_setup(cpu);
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1016 }
1017
1018 /*
1019 * xen_vcpu_setup managed to place the vcpu_info within the
1020 * percpu area for all cpus, so make use of it.
1021 */
1022 if (xen_have_vcpu_info_placement) {
1023 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1024 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1025 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1026 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1027 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1028 }
1029}
1030
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1031static const struct pv_info xen_info __initconst = {
1032 .shared_kernel_pmd = 0,
1033
1034#ifdef CONFIG_X86_64
1035 .extra_user_64bit_cs = FLAT_USER_CS64,
1036#endif
1037 .name = "Xen",
1038};
1039
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1040static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1041 .cpuid = xen_cpuid,
1042
1043 .set_debugreg = xen_set_debugreg,
1044 .get_debugreg = xen_get_debugreg,
1045
1046 .read_cr0 = xen_read_cr0,
1047 .write_cr0 = xen_write_cr0,
1048
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1049 .write_cr4 = xen_write_cr4,
1050
1051#ifdef CONFIG_X86_64
1052 .read_cr8 = xen_read_cr8,
1053 .write_cr8 = xen_write_cr8,
1054#endif
1055
1056 .wbinvd = native_wbinvd,
1057
1058 .read_msr = xen_read_msr,
1059 .write_msr = xen_write_msr,
1060
1061 .read_msr_safe = xen_read_msr_safe,
1062 .write_msr_safe = xen_write_msr_safe,
1063
1064 .read_pmc = xen_read_pmc,
1065
1066 .iret = xen_iret,
1067#ifdef CONFIG_X86_64
1068 .usergs_sysret64 = xen_sysret64,
1069#endif
1070
1071 .load_tr_desc = paravirt_nop,
1072 .set_ldt = xen_set_ldt,
1073 .load_gdt = xen_load_gdt,
1074 .load_idt = xen_load_idt,
1075 .load_tls = xen_load_tls,
1076#ifdef CONFIG_X86_64
1077 .load_gs_index = xen_load_gs_index,
1078#endif
1079
1080 .alloc_ldt = xen_alloc_ldt,
1081 .free_ldt = xen_free_ldt,
1082
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1083 .store_tr = xen_store_tr,
1084
1085 .write_ldt_entry = xen_write_ldt_entry,
1086 .write_gdt_entry = xen_write_gdt_entry,
1087 .write_idt_entry = xen_write_idt_entry,
1088 .load_sp0 = xen_load_sp0,
1089
1090 .set_iopl_mask = xen_set_iopl_mask,
1091 .io_delay = xen_io_delay,
1092
1093 /* Xen takes care of %gs when switching to usermode for us */
1094 .swapgs = paravirt_nop,
1095
1096 .start_context_switch = paravirt_start_context_switch,
1097 .end_context_switch = xen_end_context_switch,
1098};
1099
1100static void xen_restart(char *msg)
1101{
1102 xen_reboot(SHUTDOWN_reboot);
1103}
1104
1105static void xen_machine_halt(void)
1106{
1107 xen_reboot(SHUTDOWN_poweroff);
1108}
1109
1110static void xen_machine_power_off(void)
1111{
1112 if (pm_power_off)
1113 pm_power_off();
1114 xen_reboot(SHUTDOWN_poweroff);
1115}
1116
1117static void xen_crash_shutdown(struct pt_regs *regs)
1118{
1119 xen_reboot(SHUTDOWN_crash);
1120}
1121
1122static const struct machine_ops xen_machine_ops __initconst = {
1123 .restart = xen_restart,
1124 .halt = xen_machine_halt,
1125 .power_off = xen_machine_power_off,
1126 .shutdown = xen_machine_halt,
1127 .crash_shutdown = xen_crash_shutdown,
1128 .emergency_restart = xen_emergency_restart,
1129};
1130
1131static unsigned char xen_get_nmi_reason(void)
1132{
1133 unsigned char reason = 0;
1134
1135 /* Construct a value which looks like it came from port 0x61. */
1136 if (test_bit(_XEN_NMIREASON_io_error,
1137 &HYPERVISOR_shared_info->arch.nmi_reason))
1138 reason |= NMI_REASON_IOCHK;
1139 if (test_bit(_XEN_NMIREASON_pci_serr,
1140 &HYPERVISOR_shared_info->arch.nmi_reason))
1141 reason |= NMI_REASON_SERR;
1142
1143 return reason;
1144}
1145
1146static void __init xen_boot_params_init_edd(void)
1147{
1148#if IS_ENABLED(CONFIG_EDD)
1149 struct xen_platform_op op;
1150 struct edd_info *edd_info;
1151 u32 *mbr_signature;
1152 unsigned nr;
1153 int ret;
1154
1155 edd_info = boot_params.eddbuf;
1156 mbr_signature = boot_params.edd_mbr_sig_buffer;
1157
1158 op.cmd = XENPF_firmware_info;
1159
1160 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1161 for (nr = 0; nr < EDDMAXNR; nr++) {
1162 struct edd_info *info = edd_info + nr;
1163
1164 op.u.firmware_info.index = nr;
1165 info->params.length = sizeof(info->params);
1166 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1167 &info->params);
1168 ret = HYPERVISOR_platform_op(&op);
1169 if (ret)
1170 break;
1171
1172#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1173 C(device);
1174 C(version);
1175 C(interface_support);
1176 C(legacy_max_cylinder);
1177 C(legacy_max_head);
1178 C(legacy_sectors_per_track);
1179#undef C
1180 }
1181 boot_params.eddbuf_entries = nr;
1182
1183 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1184 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1185 op.u.firmware_info.index = nr;
1186 ret = HYPERVISOR_platform_op(&op);
1187 if (ret)
1188 break;
1189 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1190 }
1191 boot_params.edd_mbr_sig_buf_entries = nr;
1192#endif
1193}
1194
1195/*
1196 * Set up the GDT and segment registers for -fstack-protector. Until
1197 * we do this, we have to be careful not to call any stack-protected
1198 * function, which is most of the kernel.
1199 */
1200static void xen_setup_gdt(int cpu)
1201{
1202 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1203 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1204
1205 setup_stack_canary_segment(0);
1206 switch_to_new_gdt(0);
1207
1208 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1209 pv_cpu_ops.load_gdt = xen_load_gdt;
1210}
1211
1212static void __init xen_dom0_set_legacy_features(void)
1213{
1214 x86_platform.legacy.rtc = 1;
1215}
1216
1217/* First C function to be called on Xen boot */
1218asmlinkage __visible void __init xen_start_kernel(void)
1219{
1220 struct physdev_set_iopl set_iopl;
1221 unsigned long initrd_start = 0;
1222 int rc;
1223
1224 if (!xen_start_info)
1225 return;
1226
1227 xen_domain_type = XEN_PV_DOMAIN;
1228
1229 xen_setup_features();
1230
1231 xen_setup_machphys_mapping();
1232
1233 /* Install Xen paravirt ops */
1234 pv_info = xen_info;
edcb5cf8 1235 pv_init_ops.patch = paravirt_patch_default;
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1236 pv_cpu_ops = xen_cpu_ops;
1237
1238 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1239
1240 x86_init.resources.memory_setup = xen_memory_setup;
34fba3e6 1241 x86_init.irqs.intr_mode_init = x86_init_noop;
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1242 x86_init.oem.arch_setup = xen_arch_setup;
1243 x86_init.oem.banner = xen_banner;
1244
e1dab14c
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1245 /*
1246 * Set up some pagetable state before starting to set any ptes.
1247 */
1248
1249 xen_init_mmu_ops();
1250
1251 /* Prevent unwanted bits from being set in PTEs. */
1252 __supported_pte_mask &= ~_PAGE_GLOBAL;
1253
1254 /*
1255 * Prevent page tables from being allocated in highmem, even
1256 * if CONFIG_HIGHPTE is enabled.
1257 */
1258 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1259
1260 /* Work out if we support NX */
1261 x86_configure_nx();
1262
1263 /* Get mfn list */
1264 xen_build_dynamic_phys_to_machine();
1265
1266 /*
1267 * Set up kernel GDT and segment registers, mainly so that
1268 * -fstack-protector code can be executed.
1269 */
1270 xen_setup_gdt(0);
1271
1272 xen_init_irq_ops();
42b3a4cb
JG
1273
1274 /* Let's presume PV guests always boot on vCPU with id 0. */
1275 per_cpu(xen_vcpu_id, 0) = 0;
1276
1277 /*
1278 * Setup xen_vcpu early because idt_setup_early_handler needs it for
1279 * local_irq_disable(), irqs_disabled().
1280 *
1281 * Don't do the full vcpu_info placement stuff until we have
1282 * the cpu_possible_mask and a non-dummy shared_info.
1283 */
1284 xen_vcpu_info_reset(0);
1285
1286 idt_setup_early_handler();
1287
0808e80c 1288 xen_init_capabilities();
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1289
1290#ifdef CONFIG_X86_LOCAL_APIC
1291 /*
1292 * set up the basic apic ops.
1293 */
1294 xen_init_apic();
1295#endif
1296
1297 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1298 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1299 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1300 }
1301
1302 machine_ops = xen_machine_ops;
1303
1304 /*
1305 * The only reliable way to retain the initial address of the
1306 * percpu gdt_page is to remember it here, so we can go and
1307 * mark it RW later, when the initial percpu area is freed.
1308 */
1309 xen_initial_gdt = &per_cpu(gdt_page, 0);
1310
1311 xen_smp_init();
1312
1313#ifdef CONFIG_ACPI_NUMA
1314 /*
1315 * The pages we from Xen are not related to machine pages, so
1316 * any NUMA information the kernel tries to get from ACPI will
1317 * be meaningless. Prevent it from trying.
1318 */
1319 acpi_numa = -1;
1320#endif
e1dab14c
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1321 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1322
1323 local_irq_disable();
1324 early_boot_irqs_disabled = true;
1325
1326 xen_raw_console_write("mapping kernel into physical memory\n");
1327 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1328 xen_start_info->nr_pages);
1329 xen_reserve_special_pages();
1330
1331 /* keep using Xen gdt for now; no urgent need to change it */
1332
1333#ifdef CONFIG_X86_32
1334 pv_info.kernel_rpl = 1;
1335 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1336 pv_info.kernel_rpl = 0;
1337#else
1338 pv_info.kernel_rpl = 0;
1339#endif
1340 /* set the limit of our address space */
1341 xen_reserve_top();
1342
1343 /*
1344 * We used to do this in xen_arch_setup, but that is too late
1345 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1346 * early_amd_init which pokes 0xcf8 port.
1347 */
1348 set_iopl.iopl = 1;
1349 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1350 if (rc != 0)
1351 xen_raw_printk("physdev_op failed %d\n", rc);
1352
1353#ifdef CONFIG_X86_32
1354 /* set up basic CPUID stuff */
1355 cpu_detect(&new_cpu_data);
1356 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1357 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1358#endif
1359
1360 if (xen_start_info->mod_start) {
1361 if (xen_start_info->flags & SIF_MOD_START_PFN)
1362 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1363 else
1364 initrd_start = __pa(xen_start_info->mod_start);
1365 }
1366
1367 /* Poke various useful things into boot_params */
1368 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1369 boot_params.hdr.ramdisk_image = initrd_start;
1370 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1371 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1372 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1373
1374 if (!xen_initial_domain()) {
1375 add_preferred_console("xenboot", 0, NULL);
1376 add_preferred_console("tty", 0, NULL);
1377 add_preferred_console("hvc", 0, NULL);
1378 if (pci_xen)
1379 x86_init.pci.arch_init = pci_xen_init;
1380 } else {
1381 const struct dom0_vga_console_info *info =
1382 (void *)((char *)xen_start_info +
1383 xen_start_info->console.dom0.info_off);
1384 struct xen_platform_op op = {
1385 .cmd = XENPF_firmware_info,
1386 .interface_version = XENPF_INTERFACE_VERSION,
1387 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1388 };
1389
1390 x86_platform.set_legacy_features =
1391 xen_dom0_set_legacy_features;
1392 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1393 xen_start_info->console.domU.mfn = 0;
1394 xen_start_info->console.domU.evtchn = 0;
1395
1396 if (HYPERVISOR_platform_op(&op) == 0)
1397 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1398
1399 /* Make sure ACS will be enabled */
1400 pci_request_acs();
1401
1402 xen_acpi_sleep_register();
1403
1404 /* Avoid searching for BIOS MP tables */
1405 x86_init.mpparse.find_smp_config = x86_init_noop;
1406 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1407
1408 xen_boot_params_init_edd();
1409 }
1410#ifdef CONFIG_PCI
1411 /* PCI BIOS service won't work from a PV guest. */
1412 pci_probe &= ~PCI_PROBE_BIOS;
1413#endif
1414 xen_raw_console_write("about to get started...\n");
1415
ad73fd59 1416 /* We need this for printk timestamps */
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1417 xen_setup_runstate_info(0);
1418
1419 xen_efi_init();
1420
1421 /* Start the world */
1422#ifdef CONFIG_X86_32
1423 i386_start_kernel();
1424#else
1425 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1426 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1427#endif
1428}
1429
1430static int xen_cpu_up_prepare_pv(unsigned int cpu)
1431{
1432 int rc;
1433
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1434 if (per_cpu(xen_vcpu, cpu) == NULL)
1435 return -ENODEV;
1436
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1437 xen_setup_timer(cpu);
1438
1439 rc = xen_smp_intr_init(cpu);
1440 if (rc) {
1441 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1442 cpu, rc);
1443 return rc;
1444 }
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1445
1446 rc = xen_smp_intr_init_pv(cpu);
1447 if (rc) {
1448 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1449 cpu, rc);
1450 return rc;
1451 }
1452
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1453 return 0;
1454}
1455
1456static int xen_cpu_dead_pv(unsigned int cpu)
1457{
1458 xen_smp_intr_free(cpu);
04e95761 1459 xen_smp_intr_free_pv(cpu);
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1460
1461 xen_teardown_timer(cpu);
1462
1463 return 0;
1464}
1465
1466static uint32_t __init xen_platform_pv(void)
1467{
1468 if (xen_pv_domain())
1469 return xen_cpuid_base();
1470
1471 return 0;
1472}
1473
03b2a320 1474const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
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1475 .name = "Xen PV",
1476 .detect = xen_platform_pv,
03b2a320 1477 .type = X86_HYPER_XEN_PV,
f72e38e8 1478 .runtime.pin_vcpu = xen_pin_vcpu,
e1dab14c 1479};