[mirror_ubuntu-bionic-kernel.git] / drivers / acpi / nfit / nfit.h

/*
 * NVDIMM Firmware Interface Table - NFIT
 *
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */
#ifndef __NFIT_H__
#define __NFIT_H__
#include <linux/workqueue.h>
#include <linux/libnvdimm.h>
#include <linux/ndctl.h>
#include <linux/types.h>
#include <linux/acpi.h>
#include <acpi/acuuid.h>

/* ACPI 6.1 */
#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"

/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"

/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"

/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"

#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
		| ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
		| ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)

#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_MSFT

#define NVDIMM_STANDARD_CMDMASK \
(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)

/*
 * Command numbers that the kernel needs to know about to handle
 * non-default DSM revision ids
 */
enum nvdimm_family_cmds {
	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
	NVDIMM_INTEL_GET_MODES = 11,
	NVDIMM_INTEL_GET_FWINFO = 12,
	NVDIMM_INTEL_START_FWUPDATE = 13,
	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	NVDIMM_INTEL_SET_THRESHOLD = 17,
	NVDIMM_INTEL_INJECT_ERROR = 18,
};

#define NVDIMM_INTEL_CMDMASK \
(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN)

enum nfit_uuids {
	/* for simplicity alias the uuid index with the family id */
	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
	NFIT_SPA_VOLATILE,
	NFIT_SPA_PM,
	NFIT_SPA_DCR,
	NFIT_SPA_BDW,
	NFIT_SPA_VDISK,
	NFIT_SPA_VCD,
	NFIT_SPA_PDISK,
	NFIT_SPA_PCD,
	NFIT_DEV_BUS,
	NFIT_UUID_MAX,
};

/*
 * Region format interface codes are stored with the interface as the
 * LSB and the function as the MSB.
 */
#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */

enum {
	NFIT_BLK_READ_FLUSH = 1,
	NFIT_BLK_DCR_LATCH = 2,
	NFIT_ARS_STATUS_DONE = 0,
	NFIT_ARS_STATUS_BUSY = 1 << 16,
	NFIT_ARS_STATUS_NONE = 2 << 16,
	NFIT_ARS_STATUS_INTR = 3 << 16,
	NFIT_ARS_START_BUSY = 6,
	NFIT_ARS_CAP_NONE = 1,
	NFIT_ARS_F_OVERFLOW = 1,
	NFIT_ARS_TIMEOUT = 90,
};

enum nfit_root_notifiers {
	NFIT_NOTIFY_UPDATE = 0x80,
	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
};

enum nfit_dimm_notifiers {
	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
};

struct nfit_spa {
	struct list_head list;
	struct nd_region *nd_region;
	unsigned int ars_required:1;
	u32 clear_err_unit;
	u32 max_ars;
	struct acpi_nfit_system_address spa[0];
};

struct nfit_dcr {
	struct list_head list;
	struct acpi_nfit_control_region dcr[0];
};

struct nfit_bdw {
	struct list_head list;
	struct acpi_nfit_data_region bdw[0];
};

struct nfit_idt {
	struct list_head list;
	struct acpi_nfit_interleave idt[0];
};

struct nfit_flush {
	struct list_head list;
	struct acpi_nfit_flush_address flush[0];
};

struct nfit_memdev {
	struct list_head list;
	struct acpi_nfit_memory_map memdev[0];
};

/* assembled tables for a given dimm/memory-device */
struct nfit_mem {
	struct nvdimm *nvdimm;
	struct acpi_nfit_memory_map *memdev_dcr;
	struct acpi_nfit_memory_map *memdev_pmem;
	struct acpi_nfit_memory_map *memdev_bdw;
	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_data_region *bdw;
	struct acpi_nfit_system_address *spa_dcr;
	struct acpi_nfit_system_address *spa_bdw;
	struct acpi_nfit_interleave *idt_dcr;
	struct acpi_nfit_interleave *idt_bdw;
	struct kernfs_node *flags_attr;
	struct nfit_flush *nfit_flush;
	struct list_head list;
	struct acpi_device *adev;
	struct acpi_nfit_desc *acpi_desc;
	struct resource *flush_wpq;
	unsigned long dsm_mask;
	int family;
	u32 has_lsi:1;
	u32 has_lsr:1;
	u32 has_lsw:1;
};

struct acpi_nfit_desc {
	struct nvdimm_bus_descriptor nd_desc;
	struct acpi_table_header acpi_header;
	struct mutex init_mutex;
	struct list_head memdevs;
	struct list_head flushes;
	struct list_head dimms;
	struct list_head spas;
	struct list_head dcrs;
	struct list_head bdws;
	struct list_head idts;
	struct nvdimm_bus *nvdimm_bus;
	struct device *dev;
	u8 ars_start_flags;
	struct nd_cmd_ars_status *ars_status;
	size_t ars_status_size;
	struct work_struct work;
	struct list_head list;
	struct kernfs_node *scrub_count_state;
	unsigned int scrub_count;
	unsigned int scrub_mode;
	unsigned int cancel:1;
	unsigned int init_complete:1;
	unsigned long dimm_cmd_force_en;
	unsigned long bus_cmd_force_en;
	unsigned long bus_nfit_cmd_force_en;
	int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
			void *iobuf, u64 len, int rw);
};

enum scrub_mode {
	HW_ERROR_SCRUB_OFF,
	HW_ERROR_SCRUB_ON,
};

enum nd_blk_mmio_selector {
	BDW,
	DCR,
};

struct nd_blk_addr {
	union {
		void __iomem *base;
		void *aperture;
	};
};

struct nfit_blk {
	struct nfit_blk_mmio {
		struct nd_blk_addr addr;
		u64 size;
		u64 base_offset;
		u32 line_size;
		u32 num_lines;
		u32 table_size;
		struct acpi_nfit_interleave *idt;
		struct acpi_nfit_system_address *spa;
	} mmio[2];
	struct nd_region *nd_region;
	u64 bdw_offset; /* post interleave offset */
	u64 stat_offset;
	u64 cmd_offset;
	u32 dimm_flags;
};

extern struct list_head acpi_descs;
extern struct mutex acpi_desc_lock;
int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, u8 flags);

#ifdef CONFIG_X86_MCE
void nfit_mce_register(void);
void nfit_mce_unregister(void);
#else
static inline void nfit_mce_register(void)
{
}
static inline void nfit_mce_unregister(void)
{
}
#endif

int nfit_spa_type(struct acpi_nfit_system_address *spa);

static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
		struct nfit_mem *nfit_mem)
{
	if (nfit_mem->memdev_dcr)
		return nfit_mem->memdev_dcr;
	return nfit_mem->memdev_pmem;
}

static inline struct acpi_nfit_desc *to_acpi_desc(
		struct nvdimm_bus_descriptor *nd_desc)
{
	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
}

const guid_t *to_nfit_uuid(enum nfit_uuids id);
int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
void acpi_nfit_shutdown(void *data);
void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
void __acpi_nvdimm_notify(struct device *dev, u32 event);
int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
		unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
#endif /* __NFIT_H__ */
Commit	Line	Data
b94d5230 DW	1	/*
	2	* NVDIMM Firmware Interface Table - NFIT
	3	*
	4	* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of version 2 of the GNU General Public License as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*/
	15	#ifndef __NFIT_H__
	16	#define __NFIT_H__
7ae0fa43	17	#include <linux/workqueue.h>
b94d5230	18	#include <linux/libnvdimm.h>
6839a6d9	19	#include <linux/ndctl.h>
b94d5230	20	#include <linux/types.h>
b94d5230 DW	21	#include <linux/acpi.h>
	22	#include <acpi/acuuid.h>
	23
31eca76b	24	/* ACPI 6.1 */
b94d5230	25	#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
31eca76b	26
11e14270	27	/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
b94d5230	28	#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
31eca76b DW	29
	30	/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
	31	#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
	32	#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
	33
e02fb726	34	/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
	35	#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
	36
58138820 DW	37	#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
58138820 DW	38	\| ACPI_NFIT_MEM_RESTORE_FAILED \| ACPI_NFIT_MEM_FLUSH_FAILED \
1499934d	39	\| ACPI_NFIT_MEM_NOT_ARMED \| ACPI_NFIT_MEM_MAP_FAILED)
b94d5230	40
11e14270 DW	41	#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_MSFT
11e14270 DW	42
b9b1504d DW	43	#define NVDIMM_STANDARD_CMDMASK \
	44	(1 << ND_CMD_SMART \| 1 << ND_CMD_SMART_THRESHOLD \| 1 << ND_CMD_DIMM_FLAGS \
	45	\| 1 << ND_CMD_GET_CONFIG_SIZE \| 1 << ND_CMD_GET_CONFIG_DATA \
	46	\| 1 << ND_CMD_SET_CONFIG_DATA \| 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
	47	\| 1 << ND_CMD_VENDOR_EFFECT_LOG \| 1 << ND_CMD_VENDOR)
	48
11e14270 DW	49	/*
	50	* Command numbers that the kernel needs to know about to handle
	51	* non-default DSM revision ids
	52	*/
	53	enum nvdimm_family_cmds {
79ab67ed	54	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
11e14270 DW	55	NVDIMM_INTEL_GET_MODES = 11,
	56	NVDIMM_INTEL_GET_FWINFO = 12,
	57	NVDIMM_INTEL_START_FWUPDATE = 13,
	58	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	59	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	60	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	61	NVDIMM_INTEL_SET_THRESHOLD = 17,
	62	NVDIMM_INTEL_INJECT_ERROR = 18,
	63	};
	64
	65	#define NVDIMM_INTEL_CMDMASK \
	66	(NVDIMM_STANDARD_CMDMASK \| 1 << NVDIMM_INTEL_GET_MODES \
	67	\| 1 << NVDIMM_INTEL_GET_FWINFO \| 1 << NVDIMM_INTEL_START_FWUPDATE \
	68	\| 1 << NVDIMM_INTEL_SEND_FWUPDATE \| 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
	69	\| 1 << NVDIMM_INTEL_QUERY_FWUPDATE \| 1 << NVDIMM_INTEL_SET_THRESHOLD \
79ab67ed	70	\| 1 << NVDIMM_INTEL_INJECT_ERROR \| 1 << NVDIMM_INTEL_LATCH_SHUTDOWN)
11e14270	71
b94d5230	72	enum nfit_uuids {
31eca76b DW	73	/* for simplicity alias the uuid index with the family id */
	74	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	75	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	76	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
e02fb726	77	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
b94d5230 DW	78	NFIT_SPA_VOLATILE,
	79	NFIT_SPA_PM,
	80	NFIT_SPA_DCR,
	81	NFIT_SPA_BDW,
	82	NFIT_SPA_VDISK,
	83	NFIT_SPA_VCD,
	84	NFIT_SPA_PDISK,
	85	NFIT_SPA_PCD,
	86	NFIT_DEV_BUS,
b94d5230 DW	87	NFIT_UUID_MAX,
	88	};
	89
30ec5fd4	90	/*
1bcbf42d DW	91	* Region format interface codes are stored with the interface as the
1bcbf42d DW	92	* LSB and the function as the MSB.
30ec5fd4	93	*/
1bcbf42d DW	94	#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
	95	#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
	96	#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
be26f9ae	97
f0f2c072	98	enum {
aef25338 DW	99	NFIT_BLK_READ_FLUSH = 1,
	100	NFIT_BLK_DCR_LATCH = 2,
	101	NFIT_ARS_STATUS_DONE = 0,
	102	NFIT_ARS_STATUS_BUSY = 1 << 16,
	103	NFIT_ARS_STATUS_NONE = 2 << 16,
	104	NFIT_ARS_STATUS_INTR = 3 << 16,
	105	NFIT_ARS_START_BUSY = 6,
	106	NFIT_ARS_CAP_NONE = 1,
	107	NFIT_ARS_F_OVERFLOW = 1,
1cf03c00	108	NFIT_ARS_TIMEOUT = 90,
f0f2c072 RZ	109	};
f0f2c072 RZ	110
c09f1218 VV	111	enum nfit_root_notifiers {
c09f1218 VV	112	NFIT_NOTIFY_UPDATE = 0x80,
56b47fe6	113	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
c09f1218 VV	114	};
c09f1218 VV	115
ba9c8dd3 DW	116	enum nfit_dimm_notifiers {
	117	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
	118	};
	119
b94d5230	120	struct nfit_spa {
b94d5230	121	struct list_head list;
1cf03c00	122	struct nd_region *nd_region;
37b137ff	123	unsigned int ars_required:1;
1cf03c00 DW	124	u32 clear_err_unit;
1cf03c00 DW	125	u32 max_ars;
31932041	126	struct acpi_nfit_system_address spa[0];
b94d5230 DW	127	};
	128
	129	struct nfit_dcr {
b94d5230	130	struct list_head list;
31932041	131	struct acpi_nfit_control_region dcr[0];
b94d5230 DW	132	};
	133
	134	struct nfit_bdw {
b94d5230	135	struct list_head list;
31932041	136	struct acpi_nfit_data_region bdw[0];
b94d5230 DW	137	};
b94d5230 DW	138
047fc8a1	139	struct nfit_idt {
047fc8a1	140	struct list_head list;
31932041	141	struct acpi_nfit_interleave idt[0];
047fc8a1 RZ	142	};
047fc8a1 RZ	143
c2ad2954	144	struct nfit_flush {
c2ad2954	145	struct list_head list;
31932041	146	struct acpi_nfit_flush_address flush[0];
c2ad2954 RZ	147	};
c2ad2954 RZ	148
b94d5230	149	struct nfit_memdev {
b94d5230	150	struct list_head list;
31932041	151	struct acpi_nfit_memory_map memdev[0];
b94d5230 DW	152	};
	153
	154	/* assembled tables for a given dimm/memory-device */
	155	struct nfit_mem {
e6dfb2de	156	struct nvdimm *nvdimm;
b94d5230 DW	157	struct acpi_nfit_memory_map *memdev_dcr;
b94d5230 DW	158	struct acpi_nfit_memory_map *memdev_pmem;
047fc8a1	159	struct acpi_nfit_memory_map *memdev_bdw;
b94d5230 DW	160	struct acpi_nfit_control_region *dcr;
	161	struct acpi_nfit_data_region *bdw;
	162	struct acpi_nfit_system_address *spa_dcr;
	163	struct acpi_nfit_system_address *spa_bdw;
047fc8a1 RZ	164	struct acpi_nfit_interleave *idt_dcr;
047fc8a1 RZ	165	struct acpi_nfit_interleave *idt_bdw;
ba9c8dd3	166	struct kernfs_node *flags_attr;
c2ad2954	167	struct nfit_flush *nfit_flush;
b94d5230	168	struct list_head list;
62232e45	169	struct acpi_device *adev;
8cc6ddfc	170	struct acpi_nfit_desc *acpi_desc;
e5ae3b25	171	struct resource *flush_wpq;
62232e45	172	unsigned long dsm_mask;
31eca76b	173	int family;
4b27db7e DW	174	u32 has_lsi:1;
	175	u32 has_lsr:1;
	176	u32 has_lsw:1;
b94d5230 DW	177	};
	178
	179	struct acpi_nfit_desc {
	180	struct nvdimm_bus_descriptor nd_desc;
6b577c9d	181	struct acpi_table_header acpi_header;
20985164	182	struct mutex init_mutex;
b94d5230	183	struct list_head memdevs;
c2ad2954	184	struct list_head flushes;
b94d5230 DW	185	struct list_head dimms;
	186	struct list_head spas;
	187	struct list_head dcrs;
	188	struct list_head bdws;
047fc8a1	189	struct list_head idts;
b94d5230 DW	190	struct nvdimm_bus *nvdimm_bus;
b94d5230 DW	191	struct device *dev;
80790039	192	u8 ars_start_flags;
1cf03c00 DW	193	struct nd_cmd_ars_status *ars_status;
1cf03c00 DW	194	size_t ars_status_size;
7ae0fa43	195	struct work_struct work;
6839a6d9	196	struct list_head list;
37b137ff VV	197	struct kernfs_node *scrub_count_state;
37b137ff VV	198	unsigned int scrub_count;
9ffd6350	199	unsigned int scrub_mode;
7ae0fa43	200	unsigned int cancel:1;
9ccaed4b	201	unsigned int init_complete:1;
e3654eca DW	202	unsigned long dimm_cmd_force_en;
e3654eca DW	203	unsigned long bus_cmd_force_en;
b37b3fd3	204	unsigned long bus_nfit_cmd_force_en;
6bc75619 DW	205	int (blk_do_io)(struct nd_blk_region ndbr, resource_size_t dpa,
6bc75619 DW	206	void *iobuf, u64 len, int rw);
b94d5230 DW	207	};
b94d5230 DW	208
9ffd6350 VV	209	enum scrub_mode {
	210	HW_ERROR_SCRUB_OFF,
	211	HW_ERROR_SCRUB_ON,
	212	};
	213
047fc8a1 RZ	214	enum nd_blk_mmio_selector {
	215	BDW,
	216	DCR,
	217	};
	218
67a3e8fe RZ	219	struct nd_blk_addr {
	220	union {
	221	void __iomem *base;
7a9eb206	222	void *aperture;
67a3e8fe RZ	223	};
	224	};
	225
047fc8a1 RZ	226	struct nfit_blk {
047fc8a1 RZ	227	struct nfit_blk_mmio {
67a3e8fe	228	struct nd_blk_addr addr;
047fc8a1 RZ	229	u64 size;
	230	u64 base_offset;
	231	u32 line_size;
	232	u32 num_lines;
	233	u32 table_size;
	234	struct acpi_nfit_interleave *idt;
	235	struct acpi_nfit_system_address *spa;
	236	} mmio[2];
	237	struct nd_region *nd_region;
	238	u64 bdw_offset; /* post interleave offset */
	239	u64 stat_offset;
	240	u64 cmd_offset;
f0f2c072	241	u32 dimm_flags;
c2ad2954 RZ	242	};
c2ad2954 RZ	243
6839a6d9 VV	244	extern struct list_head acpi_descs;
6839a6d9 VV	245	extern struct mutex acpi_desc_lock;
80790039	246	int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, u8 flags);
047fc8a1	247
6839a6d9 VV	248	#ifdef CONFIG_X86_MCE
	249	void nfit_mce_register(void);
	250	void nfit_mce_unregister(void);
	251	#else
	252	static inline void nfit_mce_register(void)
047fc8a1	253	{
047fc8a1	254	}
6839a6d9 VV	255	static inline void nfit_mce_unregister(void)
	256	{
	257	}
	258	#endif
	259
	260	int nfit_spa_type(struct acpi_nfit_system_address *spa);
047fc8a1	261
b94d5230 DW	262	static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
	263	struct nfit_mem *nfit_mem)
	264	{
	265	if (nfit_mem->memdev_dcr)
	266	return nfit_mem->memdev_dcr;
	267	return nfit_mem->memdev_pmem;
	268	}
45def22c DW	269
	270	static inline struct acpi_nfit_desc *to_acpi_desc(
	271	struct nvdimm_bus_descriptor *nd_desc)
	272	{
	273	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
	274	}
6bc75619	275
41c8bdb3	276	const guid_t *to_nfit_uuid(enum nfit_uuids id);
e7a11b44	277	int acpi_nfit_init(struct acpi_nfit_desc acpi_desc, void nfit, acpi_size sz);
fbabd829	278	void acpi_nfit_shutdown(void *data);
c14a868a	279	void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
231bf117	280	void __acpi_nvdimm_notify(struct device *dev, u32 event);
a7de92da DW	281	int acpi_nfit_ctl(struct nvdimm_bus_descriptor nd_desc, struct nvdimm nvdimm,
a7de92da DW	282	unsigned int cmd, void buf, unsigned int buf_len, int cmd_rc);
a61fe6f7	283	void acpi_nfit_desc_init(struct acpi_nfit_desc acpi_desc, struct device dev);
b94d5230	284	#endif /* __NFIT_H__ */