[mirror_ubuntu-bionic-kernel.git] / drivers / net / dsa / mv88e6xxx / phy.c

/*
 * Marvell 88e6xxx Ethernet switch PHY and PPU support
 *
 * Copyright (c) 2008 Marvell Semiconductor
 *
 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/mdio.h>
#include <linux/module.h>

#include "chip.h"
#include "phy.h"

int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
		       int addr, int reg, u16 *val)
{
	return mv88e6xxx_read(chip, addr, reg, val);
}

int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
			int addr, int reg, u16 val)
{
	return mv88e6xxx_write(chip, addr, reg, val);
}

int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
{
	int addr = phy; /* PHY devices addresses start at 0x0 */
	struct mii_bus *bus;

	bus = mv88e6xxx_default_mdio_bus(chip);
	if (!bus)
		return -EOPNOTSUPP;

	if (!chip->info->ops->phy_read)
		return -EOPNOTSUPP;

	return chip->info->ops->phy_read(chip, bus, addr, reg, val);
}

int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
{
	int addr = phy; /* PHY devices addresses start at 0x0 */
	struct mii_bus *bus;

	bus = mv88e6xxx_default_mdio_bus(chip);
	if (!bus)
		return -EOPNOTSUPP;

	if (!chip->info->ops->phy_write)
		return -EOPNOTSUPP;

	return chip->info->ops->phy_write(chip, bus, addr, reg, val);
}

static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
{
	return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
}

static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
{
	int err;

	/* Restore PHY page Copper 0x0 for access via the registered
	 * MDIO bus
	 */
	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
				  MV88E6XXX_PHY_PAGE_COPPER);
	if (unlikely(err)) {
		dev_err(chip->dev,
			"failed to restore PHY %d page Copper (%d)\n",
			phy, err);
	}
}

int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
			    u8 page, int reg, u16 *val)
{
	int err;

	/* There is no paging for registers 22 */
	if (reg == MV88E6XXX_PHY_PAGE)
		return -EINVAL;

	err = mv88e6xxx_phy_page_get(chip, phy, page);
	if (!err) {
		err = mv88e6xxx_phy_read(chip, phy, reg, val);
		mv88e6xxx_phy_page_put(chip, phy);
	}

	return err;
}

int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
			     u8 page, int reg, u16 val)
{
	int err;

	/* There is no paging for registers 22 */
	if (reg == MV88E6XXX_PHY_PAGE)
		return -EINVAL;

	err = mv88e6xxx_phy_page_get(chip, phy, page);
	if (!err) {
		err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
		mv88e6xxx_phy_page_put(chip, phy);
	}

	return err;
}

static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
{
	if (!chip->info->ops->ppu_disable)
		return 0;

	return chip->info->ops->ppu_disable(chip);
}

static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
{
	if (!chip->info->ops->ppu_enable)
		return 0;

	return chip->info->ops->ppu_enable(chip);
}

static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
{
	struct mv88e6xxx_chip *chip;

	chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);

	mutex_lock(&chip->reg_lock);

	if (mutex_trylock(&chip->ppu_mutex)) {
		if (mv88e6xxx_phy_ppu_enable(chip) == 0)
			chip->ppu_disabled = 0;
		mutex_unlock(&chip->ppu_mutex);
	}

	mutex_unlock(&chip->reg_lock);
}

static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
{
	struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);

	schedule_work(&chip->ppu_work);
}

static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
{
	int ret;

	mutex_lock(&chip->ppu_mutex);

	/* If the PHY polling unit is enabled, disable it so that
	 * we can access the PHY registers.  If it was already
	 * disabled, cancel the timer that is going to re-enable
	 * it.
	 */
	if (!chip->ppu_disabled) {
		ret = mv88e6xxx_phy_ppu_disable(chip);
		if (ret < 0) {
			mutex_unlock(&chip->ppu_mutex);
			return ret;
		}
		chip->ppu_disabled = 1;
	} else {
		del_timer(&chip->ppu_timer);
		ret = 0;
	}

	return ret;
}

static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
{
	/* Schedule a timer to re-enable the PHY polling unit. */
	mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
	mutex_unlock(&chip->ppu_mutex);
}

static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
{
	mutex_init(&chip->ppu_mutex);
	INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
	timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
}

static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
{
	del_timer_sync(&chip->ppu_timer);
}

int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
			   int addr, int reg, u16 *val)
{
	int err;

	err = mv88e6xxx_phy_ppu_access_get(chip);
	if (!err) {
		err = mv88e6xxx_read(chip, addr, reg, val);
		mv88e6xxx_phy_ppu_access_put(chip);
	}

	return err;
}

int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
			    int addr, int reg, u16 val)
{
	int err;

	err = mv88e6xxx_phy_ppu_access_get(chip);
	if (!err) {
		err = mv88e6xxx_write(chip, addr, reg, val);
		mv88e6xxx_phy_ppu_access_put(chip);
	}

	return err;
}

void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
{
	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
		mv88e6xxx_phy_ppu_state_init(chip);
}

void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
{
	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
		mv88e6xxx_phy_ppu_state_destroy(chip);
}

int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
{
	return mv88e6xxx_phy_ppu_enable(chip);
}
Commit	Line	Data
10fa5bfc AL	1	/*
	2	* Marvell 88e6xxx Ethernet switch PHY and PPU support
	3	*
	4	* Copyright (c) 2008 Marvell Semiconductor
	5	*
	6	* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <linux/mdio.h>
	15	#include <linux/module.h>
10fa5bfc	16
4d5f2ba7	17	#include "chip.h"
10fa5bfc AL	18	#include "phy.h"
	19
	20	int mv88e6165_phy_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
	21	int addr, int reg, u16 *val)
	22	{
	23	return mv88e6xxx_read(chip, addr, reg, val);
	24	}
	25
	26	int mv88e6165_phy_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
	27	int addr, int reg, u16 val)
	28	{
	29	return mv88e6xxx_write(chip, addr, reg, val);
	30	}
	31
	32	int mv88e6xxx_phy_read(struct mv88e6xxx_chip chip, int phy, int reg, u16 val)
	33	{
	34	int addr = phy; /* PHY devices addresses start at 0x0 */
	35	struct mii_bus *bus;
	36
	37	bus = mv88e6xxx_default_mdio_bus(chip);
	38	if (!bus)
	39	return -EOPNOTSUPP;
	40
	41	if (!chip->info->ops->phy_read)
	42	return -EOPNOTSUPP;
	43
	44	return chip->info->ops->phy_read(chip, bus, addr, reg, val);
	45	}
	46
	47	int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
	48	{
	49	int addr = phy; /* PHY devices addresses start at 0x0 */
	50	struct mii_bus *bus;
	51
	52	bus = mv88e6xxx_default_mdio_bus(chip);
	53	if (!bus)
	54	return -EOPNOTSUPP;
	55
	56	if (!chip->info->ops->phy_write)
	57	return -EOPNOTSUPP;
	58
	59	return chip->info->ops->phy_write(chip, bus, addr, reg, val);
	60	}
	61
	62	static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
	63	{
bec90b6d	64	return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
10fa5bfc AL	65	}
	66
	67	static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
	68	{
	69	int err;
	70
	71	/* Restore PHY page Copper 0x0 for access via the registered
	72	* MDIO bus
	73	*/
bec90b6d VD	74	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
bec90b6d VD	75	MV88E6XXX_PHY_PAGE_COPPER);
10fa5bfc AL	76	if (unlikely(err)) {
	77	dev_err(chip->dev,
	78	"failed to restore PHY %d page Copper (%d)\n",
	79	phy, err);
	80	}
	81	}
	82
	83	int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
	84	u8 page, int reg, u16 *val)
	85	{
	86	int err;
	87
	88	/* There is no paging for registers 22 */
bec90b6d	89	if (reg == MV88E6XXX_PHY_PAGE)
10fa5bfc AL	90	return -EINVAL;
	91
	92	err = mv88e6xxx_phy_page_get(chip, phy, page);
	93	if (!err) {
	94	err = mv88e6xxx_phy_read(chip, phy, reg, val);
	95	mv88e6xxx_phy_page_put(chip, phy);
	96	}
	97
	98	return err;
	99	}
	100
	101	int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
	102	u8 page, int reg, u16 val)
	103	{
	104	int err;
	105
	106	/* There is no paging for registers 22 */
bec90b6d	107	if (reg == MV88E6XXX_PHY_PAGE)
10fa5bfc AL	108	return -EINVAL;
	109
	110	err = mv88e6xxx_phy_page_get(chip, phy, page);
	111	if (!err) {
bec90b6d	112	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
10fa5bfc AL	113	mv88e6xxx_phy_page_put(chip, phy);
	114	}
	115
	116	return err;
	117	}
	118
b15a7c03	119	static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
10fa5bfc AL	120	{
	121	if (!chip->info->ops->ppu_disable)
	122	return 0;
	123
	124	return chip->info->ops->ppu_disable(chip);
	125	}
	126
b15a7c03	127	static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
10fa5bfc AL	128	{
	129	if (!chip->info->ops->ppu_enable)
	130	return 0;
	131
	132	return chip->info->ops->ppu_enable(chip);
	133	}
	134
b15a7c03	135	static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
10fa5bfc AL	136	{
	137	struct mv88e6xxx_chip *chip;
	138
	139	chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
	140
	141	mutex_lock(&chip->reg_lock);
	142
	143	if (mutex_trylock(&chip->ppu_mutex)) {
b15a7c03	144	if (mv88e6xxx_phy_ppu_enable(chip) == 0)
10fa5bfc AL	145	chip->ppu_disabled = 0;
	146	mutex_unlock(&chip->ppu_mutex);
	147	}
	148
	149	mutex_unlock(&chip->reg_lock);
	150	}
	151
e99e88a9	152	static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
10fa5bfc	153	{
e99e88a9	154	struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
10fa5bfc AL	155
	156	schedule_work(&chip->ppu_work);
	157	}
	158
b15a7c03	159	static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
10fa5bfc AL	160	{
	161	int ret;
	162
	163	mutex_lock(&chip->ppu_mutex);
	164
	165	/* If the PHY polling unit is enabled, disable it so that
	166	* we can access the PHY registers. If it was already
	167	* disabled, cancel the timer that is going to re-enable
	168	* it.
	169	*/
	170	if (!chip->ppu_disabled) {
b15a7c03	171	ret = mv88e6xxx_phy_ppu_disable(chip);
10fa5bfc AL	172	if (ret < 0) {
	173	mutex_unlock(&chip->ppu_mutex);
	174	return ret;
	175	}
	176	chip->ppu_disabled = 1;
	177	} else {
	178	del_timer(&chip->ppu_timer);
	179	ret = 0;
	180	}
	181
	182	return ret;
	183	}
	184
b15a7c03	185	static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
10fa5bfc AL	186	{
	187	/* Schedule a timer to re-enable the PHY polling unit. */
	188	mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
	189	mutex_unlock(&chip->ppu_mutex);
	190	}
	191
b15a7c03	192	static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
10fa5bfc AL	193	{
10fa5bfc AL	194	mutex_init(&chip->ppu_mutex);
b15a7c03	195	INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
e99e88a9	196	timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
10fa5bfc AL	197	}
10fa5bfc AL	198
b15a7c03	199	static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
10fa5bfc AL	200	{
	201	del_timer_sync(&chip->ppu_timer);
	202	}
	203
7e20cfb5	204	int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
10fa5bfc AL	205	int addr, int reg, u16 *val)
	206	{
	207	int err;
	208
b15a7c03	209	err = mv88e6xxx_phy_ppu_access_get(chip);
10fa5bfc AL	210	if (!err) {
10fa5bfc AL	211	err = mv88e6xxx_read(chip, addr, reg, val);
b15a7c03	212	mv88e6xxx_phy_ppu_access_put(chip);
10fa5bfc AL	213	}
	214
	215	return err;
	216	}
	217
7e20cfb5	218	int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
10fa5bfc AL	219	int addr, int reg, u16 val)
	220	{
	221	int err;
	222
b15a7c03	223	err = mv88e6xxx_phy_ppu_access_get(chip);
10fa5bfc AL	224	if (!err) {
10fa5bfc AL	225	err = mv88e6xxx_write(chip, addr, reg, val);
b15a7c03	226	mv88e6xxx_phy_ppu_access_put(chip);
10fa5bfc AL	227	}
	228
	229	return err;
	230	}
	231
	232	void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
	233	{
	234	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
b15a7c03	235	mv88e6xxx_phy_ppu_state_init(chip);
10fa5bfc AL	236	}
	237
	238	void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
	239	{
	240	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
b15a7c03	241	mv88e6xxx_phy_ppu_state_destroy(chip);
10fa5bfc	242	}
1b17aedf VD	243
	244	int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
	245	{
b15a7c03	246	return mv88e6xxx_phy_ppu_enable(chip);
1b17aedf	247	}