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CommitLineData
1da177e4
LT
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
861fefbf 28 * Torben Mathiasen <torben.mathiasen@hp.com>
1da177e4
LT
29 */
30
1da177e4
LT
31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/kernel.h>
34#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h>
7a54f25c 39#include <linux/pci_hotplug.h>
1da177e4
LT
40#include <linux/init.h>
41#include <linux/interrupt.h>
42
7c0f6ba6 43#include <linux/uaccess.h>
1da177e4
LT
44
45#include "cpqphp.h"
46#include "cpqphp_nvram.h"
1da177e4
LT
47
48
49/* Global variables */
50int cpqhp_debug;
51int cpqhp_legacy_mode;
52struct controller *cpqhp_ctrl_list; /* = NULL */
53struct pci_func *cpqhp_slot_list[256];
b019ee67 54struct irq_routing_table *cpqhp_routing_table;
1da177e4
LT
55
56/* local variables */
57static void __iomem *smbios_table;
58static void __iomem *smbios_start;
59static void __iomem *cpqhp_rom_start;
90ab5ee9
RR
60static bool power_mode;
61static bool debug;
4002307d 62static int initialized;
1da177e4
LT
63
64#define DRIVER_VERSION "0.9.8"
65#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68MODULE_AUTHOR(DRIVER_AUTHOR);
69MODULE_DESCRIPTION(DRIVER_DESC);
70MODULE_LICENSE("GPL");
71
72module_param(power_mode, bool, 0644);
73MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75module_param(debug, bool, 0644);
76MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78#define CPQHPC_MODULE_MINOR 208
79
1da177e4
LT
80static inline int is_slot64bit(struct slot *slot)
81{
82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
83}
84
85static inline int is_slot66mhz(struct slot *slot)
86{
87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
88}
89
90/**
91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
1da177e4
LT
92 * @begin: begin pointer for region to be scanned.
93 * @end: end pointer for region to be scanned.
94 *
26e6c66e 95 * Returns pointer to the head of the SMBIOS tables (or %NULL).
1da177e4 96 */
3c78bc61 97static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
1da177e4
LT
98{
99 void __iomem *fp;
100 void __iomem *endp;
101 u8 temp1, temp2, temp3, temp4;
102 int status = 0;
103
104 endp = (end - sizeof(u32) + 1);
105
106 for (fp = begin; fp <= endp; fp += 16) {
107 temp1 = readb(fp);
108 temp2 = readb(fp+1);
109 temp3 = readb(fp+2);
110 temp4 = readb(fp+3);
111 if (temp1 == '_' &&
112 temp2 == 'S' &&
113 temp3 == 'M' &&
114 temp4 == '_') {
115 status = 1;
116 break;
117 }
118 }
861fefbf 119
1da177e4
LT
120 if (!status)
121 fp = NULL;
122
123 dbg("Discovered SMBIOS Entry point at %p\n", fp);
124
125 return fp;
126}
127
128/**
129 * init_SERR - Initializes the per slot SERR generation.
26e6c66e 130 * @ctrl: controller to use
1da177e4
LT
131 *
132 * For unexpected switch opens
1da177e4 133 */
3c78bc61 134static int init_SERR(struct controller *ctrl)
1da177e4
LT
135{
136 u32 tempdword;
137 u32 number_of_slots;
138 u8 physical_slot;
139
140 if (!ctrl)
141 return 1;
142
143 tempdword = ctrl->first_slot;
144
145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
427438c6 146 /* Loop through slots */
1da177e4
LT
147 while (number_of_slots) {
148 physical_slot = tempdword;
149 writeb(0, ctrl->hpc_reg + SLOT_SERR);
150 tempdword++;
151 number_of_slots--;
152 }
153
154 return 0;
155}
156
b019ee67 157static int init_cpqhp_routing_table(void)
1da177e4 158{
1da177e4 159 int len;
1da177e4 160
b019ee67
AC
161 cpqhp_routing_table = pcibios_get_irq_routing_table();
162 if (cpqhp_routing_table == NULL)
1da177e4 163 return -ENOMEM;
1da177e4 164
b019ee67 165 len = cpqhp_routing_table_length();
1da177e4 166 if (len == 0) {
b019ee67
AC
167 kfree(cpqhp_routing_table);
168 cpqhp_routing_table = NULL;
1da177e4
LT
169 return -1;
170 }
171
b019ee67
AC
172 return 0;
173}
174
175/* nice debugging output */
176static void pci_print_IRQ_route(void)
177{
178 int len;
179 int loop;
180 u8 tbus, tdevice, tslot;
181
182 len = cpqhp_routing_table_length();
1da177e4 183
b019ee67 184 dbg("bus dev func slot\n");
1da177e4 185 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
186 tbus = cpqhp_routing_table->slots[loop].bus;
187 tdevice = cpqhp_routing_table->slots[loop].devfn;
188 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
189 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
190
191 }
b019ee67 192 return;
1da177e4
LT
193}
194
195
196/**
197 * get_subsequent_smbios_entry: get the next entry from bios table.
26e6c66e
RD
198 * @smbios_start: where to start in the SMBIOS table
199 * @smbios_table: location of the SMBIOS table
1da177e4
LT
200 * @curr: %NULL or pointer to previously returned structure
201 *
26e6c66e
RD
202 * Gets the first entry if previous == NULL;
203 * otherwise, returns the next entry.
204 * Uses global SMBIOS Table pointer.
205 *
206 * Returns a pointer to an SMBIOS structure or NULL if none found.
1da177e4
LT
207 */
208static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
209 void __iomem *smbios_table,
210 void __iomem *curr)
211{
212 u8 bail = 0;
213 u8 previous_byte = 1;
214 void __iomem *p_temp;
215 void __iomem *p_max;
216
217 if (!smbios_table || !curr)
04225fe7 218 return NULL;
1da177e4 219
427438c6 220 /* set p_max to the end of the table */
1da177e4
LT
221 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
222
223 p_temp = curr;
224 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
225
226 while ((p_temp < p_max) && !bail) {
227 /* Look for the double NULL terminator
228 * The first condition is the previous byte
427438c6
AC
229 * and the second is the curr
230 */
04225fe7 231 if (!previous_byte && !(readb(p_temp)))
1da177e4 232 bail = 1;
1da177e4
LT
233
234 previous_byte = readb(p_temp);
235 p_temp++;
236 }
237
04225fe7 238 if (p_temp < p_max)
1da177e4 239 return p_temp;
04225fe7 240 else
1da177e4 241 return NULL;
1da177e4
LT
242}
243
244
245/**
26e6c66e
RD
246 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
247 * @smbios_start: where to start in the SMBIOS table
248 * @smbios_table: location of the SMBIOS table
249 * @type: SMBIOS structure type to be returned
1da177e4
LT
250 * @previous: %NULL or pointer to previously returned structure
251 *
26e6c66e 252 * Gets the first entry of the specified type if previous == %NULL;
1da177e4 253 * Otherwise, returns the next entry of the given type.
26e6c66e
RD
254 * Uses global SMBIOS Table pointer.
255 * Uses get_subsequent_smbios_entry.
1da177e4 256 *
26e6c66e 257 * Returns a pointer to an SMBIOS structure or %NULL if none found.
1da177e4
LT
258 */
259static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
260 void __iomem *smbios_table,
261 u8 type,
262 void __iomem *previous)
263{
264 if (!smbios_table)
265 return NULL;
266
04225fe7 267 if (!previous)
1da177e4 268 previous = smbios_start;
04225fe7 269 else
1da177e4
LT
270 previous = get_subsequent_smbios_entry(smbios_start,
271 smbios_table, previous);
1da177e4 272
04225fe7
AC
273 while (previous)
274 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
1da177e4
LT
275 previous = get_subsequent_smbios_entry(smbios_start,
276 smbios_table, previous);
04225fe7 277 else
1da177e4 278 break;
1da177e4
LT
279
280 return previous;
281}
282
283static void release_slot(struct hotplug_slot *hotplug_slot)
284{
285 struct slot *slot = hotplug_slot->private;
286
30ac7acd 287 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
288
289 kfree(slot->hotplug_slot->info);
1da177e4
LT
290 kfree(slot->hotplug_slot);
291 kfree(slot);
292}
293
ff3ce480 294static int ctrl_slot_cleanup(struct controller *ctrl)
1da177e4
LT
295{
296 struct slot *old_slot, *next_slot;
297
298 old_slot = ctrl->slot;
299 ctrl->slot = NULL;
300
301 while (old_slot) {
302 /* memory will be freed by the release_slot callback */
303 next_slot = old_slot->next;
ff3ce480 304 pci_hp_deregister(old_slot->hotplug_slot);
1da177e4
LT
305 old_slot = next_slot;
306 }
307
9f3f4681
GKH
308 cpqhp_remove_debugfs_files(ctrl);
309
427438c6 310 /* Free IRQ associated with hot plug device */
1da177e4 311 free_irq(ctrl->interrupt, ctrl);
427438c6 312 /* Unmap the memory */
1da177e4 313 iounmap(ctrl->hpc_reg);
427438c6 314 /* Finally reclaim PCI mem */
1da177e4
LT
315 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
316 pci_resource_len(ctrl->pci_dev, 0));
317
04225fe7 318 return 0;
1da177e4
LT
319}
320
321
427438c6
AC
322/**
323 * get_slot_mapping - determine logical slot mapping for PCI device
324 *
325 * Won't work for more than one PCI-PCI bridge in a slot.
326 *
327 * @bus_num - bus number of PCI device
328 * @dev_num - device number of PCI device
329 * @slot - Pointer to u8 where slot number will be returned
330 *
331 * Output: SUCCESS or FAILURE
332 */
1da177e4
LT
333static int
334get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
335{
1da177e4
LT
336 u32 work;
337 long len;
338 long loop;
339
340 u8 tbus, tdevice, tslot, bridgeSlot;
341
66bef8c0 342 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
1da177e4
LT
343
344 bridgeSlot = 0xFF;
345
b019ee67 346 len = cpqhp_routing_table_length();
1da177e4 347 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
348 tbus = cpqhp_routing_table->slots[loop].bus;
349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
350 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
351
352 if ((tbus == bus_num) && (tdevice == dev_num)) {
353 *slot = tslot;
1da177e4
LT
354 return 0;
355 } else {
356 /* Did not get a match on the target PCI device. Check
427438c6
AC
357 * if the current IRQ table entry is a PCI-to-PCI
358 * bridge device. If so, and it's secondary bus
359 * matches the bus number for the target device, I need
360 * to save the bridge's slot number. If I can not find
361 * an entry for the target device, I will have to
362 * assume it's on the other side of the bridge, and
363 * assign it the bridge's slot.
364 */
1da177e4
LT
365 bus->number = tbus;
366 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
3799a4e7 367 PCI_CLASS_REVISION, &work);
1da177e4
LT
368
369 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
370 pci_bus_read_config_dword(bus,
371 PCI_DEVFN(tdevice, 0),
372 PCI_PRIMARY_BUS, &work);
373 // See if bridge's secondary bus matches target bus.
04225fe7 374 if (((work >> 8) & 0x000000FF) == (long) bus_num)
1da177e4 375 bridgeSlot = tslot;
1da177e4
LT
376 }
377 }
378
379 }
380
427438c6
AC
381 /* If we got here, we didn't find an entry in the IRQ mapping table for
382 * the target PCI device. If we did determine that the target device
383 * is on the other side of a PCI-to-PCI bridge, return the slot number
384 * for the bridge.
385 */
1da177e4
LT
386 if (bridgeSlot != 0xFF) {
387 *slot = bridgeSlot;
1da177e4
LT
388 return 0;
389 }
427438c6 390 /* Couldn't find an entry in the routing table for this PCI device */
1da177e4
LT
391 return -1;
392}
393
394
395/**
396 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
397 * @ctrl: struct controller to use
398 * @func: PCI device/function info
399 * @status: LED control flag: 1 = LED on, 0 = LED off
1da177e4
LT
400 */
401static int
402cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
403 u32 status)
404{
405 u8 hp_slot;
406
407 if (func == NULL)
04225fe7 408 return 1;
1da177e4
LT
409
410 hp_slot = func->device - ctrl->slot_device_offset;
411
427438c6 412 /* Wait for exclusive access to hardware */
6aa4cdd0 413 mutex_lock(&ctrl->crit_sect);
1da177e4 414
04225fe7 415 if (status == 1)
ff3ce480 416 amber_LED_on(ctrl, hp_slot);
04225fe7 417 else if (status == 0)
ff3ce480 418 amber_LED_off(ctrl, hp_slot);
04225fe7 419 else {
427438c6 420 /* Done with exclusive hardware access */
6aa4cdd0 421 mutex_unlock(&ctrl->crit_sect);
04225fe7 422 return 1;
1da177e4
LT
423 }
424
425 set_SOGO(ctrl);
426
427438c6 427 /* Wait for SOBS to be unset */
ff3ce480 428 wait_for_ctrl_irq(ctrl);
1da177e4 429
427438c6 430 /* Done with exclusive hardware access */
6aa4cdd0 431 mutex_unlock(&ctrl->crit_sect);
1da177e4 432
04225fe7 433 return 0;
1da177e4
LT
434}
435
436
437/**
438 * set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
439 * @hotplug_slot: slot to change LED on
440 * @status: LED control flag
1da177e4 441 */
ff3ce480 442static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
1da177e4
LT
443{
444 struct pci_func *slot_func;
445 struct slot *slot = hotplug_slot->private;
446 struct controller *ctrl = slot->ctrl;
447 u8 bus;
448 u8 devfn;
449 u8 device;
450 u8 function;
451
30ac7acd 452 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
453
454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
455 return -ENODEV;
456
457 device = devfn >> 3;
458 function = devfn & 0x7;
459 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
460
461 slot_func = cpqhp_slot_find(bus, device, function);
462 if (!slot_func)
463 return -ENODEV;
464
465 return cpqhp_set_attention_status(ctrl, slot_func, status);
466}
467
468
469static int process_SI(struct hotplug_slot *hotplug_slot)
470{
471 struct pci_func *slot_func;
472 struct slot *slot = hotplug_slot->private;
473 struct controller *ctrl = slot->ctrl;
474 u8 bus;
475 u8 devfn;
476 u8 device;
477 u8 function;
478
30ac7acd 479 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
480
481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
482 return -ENODEV;
483
484 device = devfn >> 3;
485 function = devfn & 0x7;
486 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
487
488 slot_func = cpqhp_slot_find(bus, device, function);
489 if (!slot_func)
490 return -ENODEV;
491
492 slot_func->bus = bus;
493 slot_func->device = device;
494 slot_func->function = function;
495 slot_func->configured = 0;
496 dbg("board_added(%p, %p)\n", slot_func, ctrl);
497 return cpqhp_process_SI(ctrl, slot_func);
498}
499
500
501static int process_SS(struct hotplug_slot *hotplug_slot)
502{
503 struct pci_func *slot_func;
504 struct slot *slot = hotplug_slot->private;
505 struct controller *ctrl = slot->ctrl;
506 u8 bus;
507 u8 devfn;
508 u8 device;
509 u8 function;
510
30ac7acd 511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
512
513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
514 return -ENODEV;
515
516 device = devfn >> 3;
517 function = devfn & 0x7;
518 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
519
520 slot_func = cpqhp_slot_find(bus, device, function);
521 if (!slot_func)
522 return -ENODEV;
523
66bef8c0 524 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
1da177e4
LT
525 return cpqhp_process_SS(ctrl, slot_func);
526}
527
528
529static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
530{
531 struct slot *slot = hotplug_slot->private;
532 struct controller *ctrl = slot->ctrl;
533
30ac7acd 534 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4 535
861fefbf 536 return cpqhp_hardware_test(ctrl, value);
1da177e4
LT
537}
538
539
540static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
541{
542 struct slot *slot = hotplug_slot->private;
543 struct controller *ctrl = slot->ctrl;
544
30ac7acd 545 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
546
547 *value = get_slot_enabled(ctrl, slot);
548 return 0;
549}
550
551static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
552{
553 struct slot *slot = hotplug_slot->private;
554 struct controller *ctrl = slot->ctrl;
861fefbf 555
30ac7acd 556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
557
558 *value = cpq_get_attention_status(ctrl, slot);
559 return 0;
560}
561
562static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
563{
564 struct slot *slot = hotplug_slot->private;
565 struct controller *ctrl = slot->ctrl;
566
30ac7acd 567 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
568
569 *value = cpq_get_latch_status(ctrl, slot);
570
571 return 0;
572}
573
574static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
575{
576 struct slot *slot = hotplug_slot->private;
577 struct controller *ctrl = slot->ctrl;
578
30ac7acd 579 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
580
581 *value = get_presence_status(ctrl, slot);
582
583 return 0;
584}
585
b4d897a4 586static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
b4d897a4
AC
587 .set_attention_status = set_attention_status,
588 .enable_slot = process_SI,
589 .disable_slot = process_SS,
590 .hardware_test = hardware_test,
591 .get_power_status = get_power_status,
592 .get_attention_status = get_attention_status,
593 .get_latch_status = get_latch_status,
594 .get_adapter_status = get_adapter_status,
b4d897a4
AC
595};
596
597#define SLOT_NAME_SIZE 10
598
599static int ctrl_slot_setup(struct controller *ctrl,
600 void __iomem *smbios_start,
601 void __iomem *smbios_table)
602{
603 struct slot *slot;
604 struct hotplug_slot *hotplug_slot;
605 struct hotplug_slot_info *hotplug_slot_info;
3749c51a 606 struct pci_bus *bus = ctrl->pci_bus;
b4d897a4
AC
607 u8 number_of_slots;
608 u8 slot_device;
609 u8 slot_number;
610 u8 ctrl_slot;
611 u32 tempdword;
612 char name[SLOT_NAME_SIZE];
ff3ce480 613 void __iomem *slot_entry = NULL;
83d05710 614 int result;
b4d897a4
AC
615
616 dbg("%s\n", __func__);
617
618 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
619
620 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
621 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
622 slot_number = ctrl->first_slot;
623
624 while (number_of_slots) {
625 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
83d05710
JL
626 if (!slot) {
627 result = -ENOMEM;
b4d897a4 628 goto error;
83d05710 629 }
b4d897a4
AC
630
631 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
632 GFP_KERNEL);
83d05710
JL
633 if (!slot->hotplug_slot) {
634 result = -ENOMEM;
b4d897a4 635 goto error_slot;
83d05710 636 }
b4d897a4
AC
637 hotplug_slot = slot->hotplug_slot;
638
04225fe7 639 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
b4d897a4 640 GFP_KERNEL);
83d05710
JL
641 if (!hotplug_slot->info) {
642 result = -ENOMEM;
b4d897a4 643 goto error_hpslot;
83d05710 644 }
b4d897a4
AC
645 hotplug_slot_info = hotplug_slot->info;
646
647 slot->ctrl = ctrl;
648 slot->bus = ctrl->bus;
649 slot->device = slot_device;
650 slot->number = slot_number;
651 dbg("slot->number = %u\n", slot->number);
652
653 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
654 slot_entry);
655
656 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
657 slot->number)) {
658 slot_entry = get_SMBIOS_entry(smbios_start,
659 smbios_table, 9, slot_entry);
660 }
661
662 slot->p_sm_slot = slot_entry;
663
34d773f6 664 timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
b4d897a4 665 slot->task_event.expires = jiffies + 5 * HZ;
b4d897a4
AC
666
667 /*FIXME: these capabilities aren't used but if they are
668 * they need to be correctly implemented
669 */
670 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
671 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
672
673 if (is_slot64bit(slot))
674 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
675 if (is_slot66mhz(slot))
676 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
3749c51a 677 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
b4d897a4
AC
678 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
679
680 ctrl_slot =
681 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
682
683 /* Check presence */
684 slot->capabilities |=
685 ((((~tempdword) >> 23) |
686 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
687 /* Check the switch state */
688 slot->capabilities |=
689 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
690 /* Check the slot enable */
691 slot->capabilities |=
692 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
693
694 /* register this slot with the hotplug pci core */
695 hotplug_slot->release = &release_slot;
696 hotplug_slot->private = slot;
697 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
698 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
699
700 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
701 hotplug_slot_info->attention_status =
702 cpq_get_attention_status(ctrl, slot);
703 hotplug_slot_info->latch_status =
704 cpq_get_latch_status(ctrl, slot);
705 hotplug_slot_info->adapter_status =
706 get_presence_status(ctrl, slot);
707
227f0647 708 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
b4d897a4
AC
709 slot->bus, slot->device,
710 slot->number, ctrl->slot_device_offset,
711 slot_number);
712 result = pci_hp_register(hotplug_slot,
713 ctrl->pci_dev->bus,
714 slot->device,
715 name);
716 if (result) {
717 err("pci_hp_register failed with error %d\n", result);
718 goto error_info;
719 }
720
721 slot->next = ctrl->slot;
722 ctrl->slot = slot;
723
724 number_of_slots--;
725 slot_device++;
726 slot_number++;
727 }
728
729 return 0;
730error_info:
731 kfree(hotplug_slot_info);
732error_hpslot:
733 kfree(hotplug_slot);
734error_slot:
735 kfree(slot);
736error:
737 return result;
738}
739
740static int one_time_init(void)
741{
742 int loop;
743 int retval = 0;
744
745 if (initialized)
746 return 0;
747
748 power_mode = 0;
749
b019ee67 750 retval = init_cpqhp_routing_table();
b4d897a4
AC
751 if (retval)
752 goto error;
753
b019ee67
AC
754 if (cpqhp_debug)
755 pci_print_IRQ_route();
756
ff3ce480 757 dbg("Initialize + Start the notification mechanism\n");
b4d897a4
AC
758
759 retval = cpqhp_event_start_thread();
760 if (retval)
761 goto error;
762
763 dbg("Initialize slot lists\n");
04225fe7 764 for (loop = 0; loop < 256; loop++)
b4d897a4 765 cpqhp_slot_list[loop] = NULL;
b4d897a4
AC
766
767 /* FIXME: We also need to hook the NMI handler eventually.
768 * this also needs to be worked with Christoph
769 * register_NMI_handler();
770 */
771 /* Map rom address */
772 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
773 if (!cpqhp_rom_start) {
ff3ce480 774 err("Could not ioremap memory region for ROM\n");
b4d897a4
AC
775 retval = -EIO;
776 goto error;
777 }
778
779 /* Now, map the int15 entry point if we are on compaq specific
780 * hardware
781 */
782 compaq_nvram_init(cpqhp_rom_start);
783
784 /* Map smbios table entry point structure */
785 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
786 cpqhp_rom_start + ROM_PHY_LEN);
787 if (!smbios_table) {
ff3ce480 788 err("Could not find the SMBIOS pointer in memory\n");
b4d897a4
AC
789 retval = -EIO;
790 goto error_rom_start;
791 }
792
793 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
794 readw(smbios_table + ST_LENGTH));
795 if (!smbios_start) {
ff3ce480 796 err("Could not ioremap memory region taken from SMBIOS values\n");
b4d897a4
AC
797 retval = -EIO;
798 goto error_smbios_start;
799 }
800
801 initialized = 1;
802
803 return retval;
804
805error_smbios_start:
806 iounmap(smbios_start);
807error_rom_start:
808 iounmap(cpqhp_rom_start);
809error:
810 return retval;
811}
812
1da177e4
LT
813static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
814{
815 u8 num_of_slots = 0;
816 u8 hp_slot = 0;
817 u8 device;
1da177e4
LT
818 u8 bus_cap;
819 u16 temp_word;
820 u16 vendor_id;
821 u16 subsystem_vid;
822 u16 subsystem_deviceid;
823 u32 rc;
824 struct controller *ctrl;
825 struct pci_func *func;
3749c51a 826 struct pci_bus *bus;
fe89cf4c
BH
827 int err;
828
829 err = pci_enable_device(pdev);
830 if (err) {
831 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
832 pci_name(pdev), err);
833 return err;
834 }
a7ef7d1f 835
3749c51a 836 bus = pdev->subordinate;
a7ef7d1f 837 if (!bus) {
227f0647 838 dev_notice(&pdev->dev, "the device is not a bridge, skipping\n");
a7ef7d1f
JS
839 rc = -ENODEV;
840 goto err_disable_device;
841 }
1da177e4 842
427438c6
AC
843 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
844 * discovery
845 */
05d3ac26
SS
846 vendor_id = pdev->vendor;
847 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
848 (vendor_id != PCI_VENDOR_ID_INTEL)) {
1da177e4 849 err(msg_HPC_non_compaq_or_intel);
fe89cf4c
BH
850 rc = -ENODEV;
851 goto err_disable_device;
1da177e4
LT
852 }
853 dbg("Vendor ID: %x\n", vendor_id);
854
44c10138
AK
855 dbg("revision: %d\n", pdev->revision);
856 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
1da177e4 857 err(msg_HPC_rev_error);
fe89cf4c
BH
858 rc = -ENODEV;
859 goto err_disable_device;
1da177e4
LT
860 }
861
f7625980 862 /* Check for the proper subsystem IDs
861fefbf 863 * Intel uses a different SSID programming model than Compaq.
1da177e4 864 * For Intel, each SSID bit identifies a PHP capability.
f7625980 865 * Also Intel HPCs may have RID=0.
1da177e4 866 */
867556fe
AC
867 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
868 err(msg_HPC_not_supported);
b11d207f
QL
869 rc = -ENODEV;
870 goto err_disable_device;
867556fe
AC
871 }
872
873 /* TODO: This code can be made to support non-Compaq or Intel
874 * subsystem IDs
875 */
69b3e619 876 subsystem_vid = pdev->subsystem_vendor;
867556fe
AC
877 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
878 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
879 err(msg_HPC_non_compaq_or_intel);
880 rc = -ENODEV;
881 goto err_disable_device;
882 }
883
884 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
885 if (!ctrl) {
886 err("%s : out of memory\n", __func__);
887 rc = -ENOMEM;
888 goto err_disable_device;
889 }
890
69b3e619 891 subsystem_deviceid = pdev->subsystem_device;
867556fe
AC
892
893 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
894
895 /* Set Vendor ID, so it can be accessed later from other
896 * functions
897 */
898 ctrl->vendor_id = vendor_id;
899
900 switch (subsystem_vid) {
901 case PCI_VENDOR_ID_COMPAQ:
902 if (pdev->revision >= 0x13) { /* CIOBX */
903 ctrl->push_flag = 1;
904 ctrl->slot_switch_type = 1;
905 ctrl->push_button = 1;
906 ctrl->pci_config_space = 1;
907 ctrl->defeature_PHP = 1;
908 ctrl->pcix_support = 1;
909 ctrl->pcix_speed_capability = 1;
910 pci_read_config_byte(pdev, 0x41, &bus_cap);
911 if (bus_cap & 0x80) {
912 dbg("bus max supports 133MHz PCI-X\n");
3749c51a 913 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
867556fe
AC
914 break;
915 }
916 if (bus_cap & 0x40) {
917 dbg("bus max supports 100MHz PCI-X\n");
3749c51a 918 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
867556fe
AC
919 break;
920 }
357fe857 921 if (bus_cap & 0x20) {
867556fe 922 dbg("bus max supports 66MHz PCI-X\n");
3749c51a 923 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
867556fe
AC
924 break;
925 }
357fe857 926 if (bus_cap & 0x10) {
867556fe 927 dbg("bus max supports 66MHz PCI\n");
3749c51a 928 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe
AC
929 break;
930 }
1da177e4 931
867556fe 932 break;
1da177e4 933 }
1da177e4 934
867556fe
AC
935 switch (subsystem_deviceid) {
936 case PCI_SUB_HPC_ID:
937 /* Original 6500/7000 implementation */
938 ctrl->slot_switch_type = 1;
3749c51a 939 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
940 ctrl->push_button = 0;
941 ctrl->pci_config_space = 1;
942 ctrl->defeature_PHP = 1;
943 ctrl->pcix_support = 0;
944 ctrl->pcix_speed_capability = 0;
945 break;
946 case PCI_SUB_HPC_ID2:
947 /* First Pushbutton implementation */
948 ctrl->push_flag = 1;
949 ctrl->slot_switch_type = 1;
3749c51a 950 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
951 ctrl->push_button = 1;
952 ctrl->pci_config_space = 1;
953 ctrl->defeature_PHP = 1;
954 ctrl->pcix_support = 0;
955 ctrl->pcix_speed_capability = 0;
956 break;
957 case PCI_SUB_HPC_ID_INTC:
958 /* Third party (6500/7000) */
959 ctrl->slot_switch_type = 1;
3749c51a 960 bus->max_bus_speed = PCI_SPEED_33MHz;
867556fe
AC
961 ctrl->push_button = 0;
962 ctrl->pci_config_space = 1;
963 ctrl->defeature_PHP = 1;
964 ctrl->pcix_support = 0;
965 ctrl->pcix_speed_capability = 0;
966 break;
967 case PCI_SUB_HPC_ID3:
968 /* First 66 Mhz implementation */
969 ctrl->push_flag = 1;
970 ctrl->slot_switch_type = 1;
3749c51a 971 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe
AC
972 ctrl->push_button = 1;
973 ctrl->pci_config_space = 1;
974 ctrl->defeature_PHP = 1;
975 ctrl->pcix_support = 0;
976 ctrl->pcix_speed_capability = 0;
977 break;
978 case PCI_SUB_HPC_ID4:
979 /* First PCI-X implementation, 100MHz */
980 ctrl->push_flag = 1;
981 ctrl->slot_switch_type = 1;
3749c51a 982 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
867556fe
AC
983 ctrl->push_button = 1;
984 ctrl->pci_config_space = 1;
985 ctrl->defeature_PHP = 1;
986 ctrl->pcix_support = 1;
987 ctrl->pcix_speed_capability = 0;
988 break;
989 default:
990 err(msg_HPC_not_supported);
991 rc = -ENODEV;
1da177e4
LT
992 goto err_free_ctrl;
993 }
867556fe 994 break;
1da177e4 995
867556fe
AC
996 case PCI_VENDOR_ID_INTEL:
997 /* Check for speed capability (0=33, 1=66) */
998 if (subsystem_deviceid & 0x0001)
3749c51a 999 bus->max_bus_speed = PCI_SPEED_66MHz;
867556fe 1000 else
3749c51a 1001 bus->max_bus_speed = PCI_SPEED_33MHz;
1da177e4 1002
867556fe
AC
1003 /* Check for push button */
1004 if (subsystem_deviceid & 0x0002)
1005 ctrl->push_button = 0;
1006 else
1007 ctrl->push_button = 1;
1da177e4 1008
867556fe
AC
1009 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1010 if (subsystem_deviceid & 0x0004)
1011 ctrl->slot_switch_type = 0;
1012 else
1013 ctrl->slot_switch_type = 1;
1014
1015 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1016 if (subsystem_deviceid & 0x0008)
1017 ctrl->defeature_PHP = 1; /* PHP supported */
1018 else
1019 ctrl->defeature_PHP = 0; /* PHP not supported */
1020
1021 /* Alternate Base Address Register Interface
1022 * (0=not supported, 1=supported)
1023 */
1024 if (subsystem_deviceid & 0x0010)
1025 ctrl->alternate_base_address = 1;
1026 else
1027 ctrl->alternate_base_address = 0;
1da177e4 1028
867556fe
AC
1029 /* PCI Config Space Index (0=not supported, 1=supported) */
1030 if (subsystem_deviceid & 0x0020)
1031 ctrl->pci_config_space = 1;
1032 else
1033 ctrl->pci_config_space = 0;
1034
1035 /* PCI-X support */
1036 if (subsystem_deviceid & 0x0080) {
1037 ctrl->pcix_support = 1;
1038 if (subsystem_deviceid & 0x0040)
1039 /* 133MHz PCI-X if bit 7 is 1 */
1040 ctrl->pcix_speed_capability = 1;
1041 else
1042 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1043 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1044 ctrl->pcix_speed_capability = 0;
1045 } else {
1046 /* Conventional PCI */
1047 ctrl->pcix_support = 0;
1048 ctrl->pcix_speed_capability = 0;
1da177e4 1049 }
867556fe 1050 break;
1da177e4 1051
867556fe 1052 default:
1da177e4 1053 err(msg_HPC_not_supported);
867556fe
AC
1054 rc = -ENODEV;
1055 goto err_free_ctrl;
1da177e4
LT
1056 }
1057
427438c6 1058 /* Tell the user that we found one. */
1da177e4
LT
1059 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1060 pdev->bus->number);
1061
1062 dbg("Hotplug controller capabilities:\n");
3749c51a 1063 dbg(" speed_capability %d\n", bus->max_bus_speed);
1da177e4
LT
1064 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1065 "switch present" : "no switch");
1066 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1067 "PHP supported" : "PHP not supported");
1068 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1069 "supported" : "not supported");
1070 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1071 "supported" : "not supported");
1072 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1073 "supported" : "not supported");
1074 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1075 "supported" : "not supported");
1076
1077 ctrl->pci_dev = pdev;
1078 pci_set_drvdata(pdev, ctrl);
1079
1080 /* make our own copy of the pci bus structure,
1081 * as we like tweaking it a lot */
8f6bce3c 1082 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1da177e4
LT
1083 if (!ctrl->pci_bus) {
1084 err("out of memory\n");
1085 rc = -ENOMEM;
1086 goto err_free_ctrl;
1087 }
1da177e4
LT
1088
1089 ctrl->bus = pdev->bus->number;
44c10138 1090 ctrl->rev = pdev->revision;
1da177e4
LT
1091 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1092 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1093
6aa4cdd0 1094 mutex_init(&ctrl->crit_sect);
1da177e4
LT
1095 init_waitqueue_head(&ctrl->queue);
1096
1097 /* initialize our threads if they haven't already been started up */
1098 rc = one_time_init();
656f978f 1099 if (rc)
1da177e4 1100 goto err_free_bus;
861fefbf 1101
1da177e4 1102 dbg("pdev = %p\n", pdev);
1396a8c3
GKH
1103 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1104 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1da177e4
LT
1105
1106 if (!request_mem_region(pci_resource_start(pdev, 0),
1107 pci_resource_len(pdev, 0), MY_NAME)) {
1108 err("cannot reserve MMIO region\n");
1109 rc = -ENOMEM;
1110 goto err_free_bus;
1111 }
1112
1113 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1114 pci_resource_len(pdev, 0));
1115 if (!ctrl->hpc_reg) {
1396a8c3
GKH
1116 err("cannot remap MMIO region %llx @ %llx\n",
1117 (unsigned long long)pci_resource_len(pdev, 0),
1118 (unsigned long long)pci_resource_start(pdev, 0));
1da177e4
LT
1119 rc = -ENODEV;
1120 goto err_free_mem_region;
1121 }
1122
867556fe 1123 /* Check for 66Mhz operation */
3749c51a 1124 bus->cur_bus_speed = get_controller_speed(ctrl);
1da177e4
LT
1125
1126
1127 /********************************************************
1128 *
1129 * Save configuration headers for this and
1130 * subordinate PCI buses
1131 *
1132 ********************************************************/
1133
427438c6 1134 /* find the physical slot number of the first hot plug slot */
1da177e4
LT
1135
1136 /* Get slot won't work for devices behind bridges, but
1137 * in this case it will always be called for the "base"
1138 * bus/dev/func of a slot.
1139 * CS: this is leveraging the PCIIRQ routing code from the kernel
1140 * (pci-pc.c: get_irq_routing_table) */
1141 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1142 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1143 &(ctrl->first_slot));
1144 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1145 ctrl->first_slot, rc);
1146 if (rc) {
1147 err(msg_initialization_err, rc);
1148 goto err_iounmap;
1149 }
1150
427438c6 1151 /* Store PCI Config Space for all devices on this bus */
1da177e4
LT
1152 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1153 if (rc) {
1154 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1155 __func__, rc);
1da177e4
LT
1156 goto err_iounmap;
1157 }
1158
1159 /*
1160 * Get IO, memory, and IRQ resources for new devices
1161 */
427438c6 1162 /* The next line is required for cpqhp_find_available_resources */
1da177e4
LT
1163 ctrl->interrupt = pdev->irq;
1164 if (ctrl->interrupt < 0x10) {
1165 cpqhp_legacy_mode = 1;
1166 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1167 }
1168
1169 ctrl->cfgspc_irq = 0;
1170 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1171
1172 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1173 ctrl->add_support = !rc;
1174 if (rc) {
1175 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1176 err("unable to locate PCI configuration resources for hot plug add.\n");
1177 goto err_iounmap;
1178 }
1179
1180 /*
1181 * Finish setting up the hot plug ctrl device
1182 */
1183 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
ff3ce480 1184 dbg("NumSlots %d\n", ctrl->slot_device_offset);
1da177e4
LT
1185
1186 ctrl->next_event = 0;
1187
1188 /* Setup the slot information structures */
1189 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1190 if (rc) {
1191 err(msg_initialization_err, 6);
1192 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1193 __func__, rc);
1da177e4
LT
1194 goto err_iounmap;
1195 }
861fefbf 1196
1da177e4
LT
1197 /* Mask all general input interrupts */
1198 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1199
1200 /* set up the interrupt */
ff3ce480 1201 dbg("HPC interrupt = %d\n", ctrl->interrupt);
1da177e4 1202 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
6b4486e2 1203 IRQF_SHARED, MY_NAME, ctrl)) {
1da177e4
LT
1204 err("Can't get irq %d for the hotplug pci controller\n",
1205 ctrl->interrupt);
1206 rc = -ENODEV;
1207 goto err_iounmap;
1208 }
1209
427438c6
AC
1210 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1211 * fault
1212 */
1da177e4
LT
1213 temp_word = readw(ctrl->hpc_reg + MISC);
1214 temp_word |= 0x4006;
1215 writew(temp_word, ctrl->hpc_reg + MISC);
1216
427438c6 1217 /* Changed 05/05/97 to clear all interrupts at start */
1da177e4
LT
1218 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1219
1220 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1221
1222 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1223
1224 if (!cpqhp_ctrl_list) {
1225 cpqhp_ctrl_list = ctrl;
1226 ctrl->next = NULL;
1227 } else {
1228 ctrl->next = cpqhp_ctrl_list;
1229 cpqhp_ctrl_list = ctrl;
1230 }
1231
427438c6
AC
1232 /* turn off empty slots here unless command line option "ON" set
1233 * Wait for exclusive access to hardware
1234 */
6aa4cdd0 1235 mutex_lock(&ctrl->crit_sect);
1da177e4
LT
1236
1237 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1238
427438c6 1239 /* find first device number for the ctrl */
1da177e4
LT
1240 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1241
1242 while (num_of_slots) {
1243 dbg("num_of_slots: %d\n", num_of_slots);
1244 func = cpqhp_slot_find(ctrl->bus, device, 0);
1245 if (!func)
1246 break;
1247
1248 hp_slot = func->device - ctrl->slot_device_offset;
1249 dbg("hp_slot: %d\n", hp_slot);
1250
427438c6 1251 /* We have to save the presence info for these slots */
1da177e4
LT
1252 temp_word = ctrl->ctrl_int_comp >> 16;
1253 func->presence_save = (temp_word >> hp_slot) & 0x01;
1254 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1255
04225fe7 1256 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1da177e4 1257 func->switch_save = 0;
04225fe7 1258 else
1da177e4 1259 func->switch_save = 0x10;
1da177e4 1260
04225fe7 1261 if (!power_mode)
1da177e4
LT
1262 if (!func->is_a_board) {
1263 green_LED_off(ctrl, hp_slot);
1264 slot_disable(ctrl, hp_slot);
1265 }
1da177e4
LT
1266
1267 device++;
1268 num_of_slots--;
1269 }
1270
1271 if (!power_mode) {
1272 set_SOGO(ctrl);
427438c6 1273 /* Wait for SOBS to be unset */
1da177e4
LT
1274 wait_for_ctrl_irq(ctrl);
1275 }
1276
1277 rc = init_SERR(ctrl);
1278 if (rc) {
1279 err("init_SERR failed\n");
6aa4cdd0 1280 mutex_unlock(&ctrl->crit_sect);
1da177e4
LT
1281 goto err_free_irq;
1282 }
1283
427438c6 1284 /* Done with exclusive hardware access */
6aa4cdd0 1285 mutex_unlock(&ctrl->crit_sect);
1da177e4 1286
9f3f4681 1287 cpqhp_create_debugfs_files(ctrl);
1da177e4
LT
1288
1289 return 0;
1290
1291err_free_irq:
1292 free_irq(ctrl->interrupt, ctrl);
1293err_iounmap:
1294 iounmap(ctrl->hpc_reg);
1295err_free_mem_region:
1296 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1297err_free_bus:
1298 kfree(ctrl->pci_bus);
1299err_free_ctrl:
1300 kfree(ctrl);
fe89cf4c
BH
1301err_disable_device:
1302 pci_disable_device(pdev);
1da177e4
LT
1303 return rc;
1304}
1305
1da177e4
LT
1306static void __exit unload_cpqphpd(void)
1307{
1308 struct pci_func *next;
1309 struct pci_func *TempSlot;
1310 int loop;
1311 u32 rc;
1312 struct controller *ctrl;
1313 struct controller *tctrl;
1314 struct pci_resource *res;
1315 struct pci_resource *tres;
1316
1317 rc = compaq_nvram_store(cpqhp_rom_start);
1318
1319 ctrl = cpqhp_ctrl_list;
1320
1321 while (ctrl) {
1322 if (ctrl->hpc_reg) {
1323 u16 misc;
ff3ce480 1324 rc = read_slot_enable(ctrl);
861fefbf 1325
1da177e4
LT
1326 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1327 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
861fefbf 1328
1da177e4
LT
1329 misc = readw(ctrl->hpc_reg + MISC);
1330 misc &= 0xFFFD;
1331 writew(misc, ctrl->hpc_reg + MISC);
1332 }
1333
1334 ctrl_slot_cleanup(ctrl);
1335
1336 res = ctrl->io_head;
1337 while (res) {
1338 tres = res;
1339 res = res->next;
1340 kfree(tres);
1341 }
1342
1343 res = ctrl->mem_head;
1344 while (res) {
1345 tres = res;
1346 res = res->next;
1347 kfree(tres);
1348 }
1349
1350 res = ctrl->p_mem_head;
1351 while (res) {
1352 tres = res;
1353 res = res->next;
1354 kfree(tres);
1355 }
1356
1357 res = ctrl->bus_head;
1358 while (res) {
1359 tres = res;
1360 res = res->next;
1361 kfree(tres);
1362 }
1363
ff3ce480 1364 kfree(ctrl->pci_bus);
1da177e4
LT
1365
1366 tctrl = ctrl;
1367 ctrl = ctrl->next;
1368 kfree(tctrl);
1369 }
1370
1371 for (loop = 0; loop < 256; loop++) {
1372 next = cpqhp_slot_list[loop];
1373 while (next != NULL) {
1374 res = next->io_head;
1375 while (res) {
1376 tres = res;
1377 res = res->next;
1378 kfree(tres);
1379 }
1380
1381 res = next->mem_head;
1382 while (res) {
1383 tres = res;
1384 res = res->next;
1385 kfree(tres);
1386 }
1387
1388 res = next->p_mem_head;
1389 while (res) {
1390 tres = res;
1391 res = res->next;
1392 kfree(tres);
1393 }
1394
1395 res = next->bus_head;
1396 while (res) {
1397 tres = res;
1398 res = res->next;
1399 kfree(tres);
1400 }
1401
1402 TempSlot = next;
1403 next = next->next;
1404 kfree(TempSlot);
1405 }
1406 }
1407
427438c6 1408 /* Stop the notification mechanism */
4002307d
KM
1409 if (initialized)
1410 cpqhp_event_stop_thread();
1da177e4 1411
427438c6 1412 /* unmap the rom address */
1da177e4
LT
1413 if (cpqhp_rom_start)
1414 iounmap(cpqhp_rom_start);
1415 if (smbios_start)
1416 iounmap(smbios_start);
1417}
1418
8394264d 1419static const struct pci_device_id hpcd_pci_tbl[] = {
1da177e4
LT
1420 {
1421 /* handle any PCI Hotplug controller */
1422 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1423 .class_mask = ~0,
861fefbf 1424
1da177e4
LT
1425 /* no matter who makes it */
1426 .vendor = PCI_ANY_ID,
1427 .device = PCI_ANY_ID,
1428 .subvendor = PCI_ANY_ID,
1429 .subdevice = PCI_ANY_ID,
861fefbf 1430
1da177e4
LT
1431 }, { /* end: all zeroes */ }
1432};
1433
1434MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1435
1da177e4
LT
1436static struct pci_driver cpqhpc_driver = {
1437 .name = "compaq_pci_hotplug",
1438 .id_table = hpcd_pci_tbl,
1439 .probe = cpqhpc_probe,
1440 /* remove: cpqhpc_remove_one, */
1441};
1442
1da177e4
LT
1443static int __init cpqhpc_init(void)
1444{
1445 int result;
1446
1447 cpqhp_debug = debug;
1448
ff3ce480 1449 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
9f3f4681 1450 cpqhp_initialize_debugfs();
1da177e4
LT
1451 result = pci_register_driver(&cpqhpc_driver);
1452 dbg("pci_register_driver = %d\n", result);
1453 return result;
1454}
1455
1da177e4
LT
1456static void __exit cpqhpc_cleanup(void)
1457{
1458 dbg("unload_cpqphpd()\n");
1459 unload_cpqphpd();
1460
1461 dbg("pci_unregister_driver\n");
1462 pci_unregister_driver(&cpqhpc_driver);
9f3f4681 1463 cpqhp_shutdown_debugfs();
1da177e4
LT
1464}
1465
1da177e4
LT
1466module_init(cpqhpc_init);
1467module_exit(cpqhpc_cleanup);