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switchtec: Fix Spectre v1 vulnerability
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / switch / switchtec.c
CommitLineData
080b47de
LG		 1/*
2 * Microsemi Switchtec(tm) PCIe Management Driver
3 * Copyright (c) 2017, Microsemi Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 */
15
5a1c269f 16#include <linux/switchtec.h>
52eabba5
LG		 17#include <linux/switchtec_ioctl.h>
18
080b47de
LG		 19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
23#include <linux/poll.h>
080b47de
LG		 24#include <linux/wait.h>
25
b8d9c3ca
GS		 26#include <linux/nospec.h>
27
080b47de
LG		 28MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
29MODULE_VERSION("0.1");
30MODULE_LICENSE("GPL");
31MODULE_AUTHOR("Microsemi Corporation");
32
33static int max_devices = 16;
34module_param(max_devices, int, 0644);
35MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
36
37static dev_t switchtec_devt;
080b47de
LG		 38static DEFINE_IDA(switchtec_minor_ida);
39
302e994d
LG		 40struct class *switchtec_class;
41EXPORT_SYMBOL_GPL(switchtec_class);
080b47de
LG		 42
43enum mrpc_state {
44 MRPC_IDLE = 0,
45 MRPC_QUEUED,
46 MRPC_RUNNING,
47 MRPC_DONE,
48};
49
50struct switchtec_user {
51 struct switchtec_dev *stdev;
52
53 enum mrpc_state state;
54
55 struct completion comp;
56 struct kref kref;
57 struct list_head list;
58
59 u32 cmd;
60 u32 status;
61 u32 return_code;
62 size_t data_len;
63 size_t read_len;
64 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
65 int event_cnt;
66};
67
68static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
69{
70 struct switchtec_user *stuser;
71
72 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
73 if (!stuser)
74 return ERR_PTR(-ENOMEM);
75
76 get_device(&stdev->dev);
77 stuser->stdev = stdev;
78 kref_init(&stuser->kref);
79 INIT_LIST_HEAD(&stuser->list);
80 init_completion(&stuser->comp);
81 stuser->event_cnt = atomic_read(&stdev->event_cnt);
82
83 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
84
85 return stuser;
86}
87
88static void stuser_free(struct kref *kref)
89{
90 struct switchtec_user *stuser;
91
92 stuser = container_of(kref, struct switchtec_user, kref);
93
94 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
95
96 put_device(&stuser->stdev->dev);
97 kfree(stuser);
98}
99
100static void stuser_put(struct switchtec_user *stuser)
101{
102 kref_put(&stuser->kref, stuser_free);
103}
104
105static void stuser_set_state(struct switchtec_user *stuser,
106 enum mrpc_state state)
107{
108 /* requires the mrpc_mutex to already be held when called */
109
110 const char * const state_names[] = {
111 [MRPC_IDLE] = "IDLE",
112 [MRPC_QUEUED] = "QUEUED",
113 [MRPC_RUNNING] = "RUNNING",
114 [MRPC_DONE] = "DONE",
115 };
116
117 stuser->state = state;
118
119 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
120 stuser, state_names[state]);
121}
122
123static void mrpc_complete_cmd(struct switchtec_dev *stdev);
124
125static void mrpc_cmd_submit(struct switchtec_dev *stdev)
126{
127 /* requires the mrpc_mutex to already be held when called */
128
129 struct switchtec_user *stuser;
130
131 if (stdev->mrpc_busy)
132 return;
133
134 if (list_empty(&stdev->mrpc_queue))
135 return;
136
137 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
138 list);
139
140 stuser_set_state(stuser, MRPC_RUNNING);
141 stdev->mrpc_busy = 1;
142 memcpy_toio(&stdev->mmio_mrpc->input_data,
143 stuser->data, stuser->data_len);
144 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
145
146 stuser->status = ioread32(&stdev->mmio_mrpc->status);
147 if (stuser->status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
148 mrpc_complete_cmd(stdev);
149
150 schedule_delayed_work(&stdev->mrpc_timeout,
151 msecs_to_jiffies(500));
152}
153
154static int mrpc_queue_cmd(struct switchtec_user *stuser)
155{
156 /* requires the mrpc_mutex to already be held when called */
157
158 struct switchtec_dev *stdev = stuser->stdev;
159
160 kref_get(&stuser->kref);
161 stuser->read_len = sizeof(stuser->data);
162 stuser_set_state(stuser, MRPC_QUEUED);
163 init_completion(&stuser->comp);
164 list_add_tail(&stuser->list, &stdev->mrpc_queue);
165
166 mrpc_cmd_submit(stdev);
167
168 return 0;
169}
170
171static void mrpc_complete_cmd(struct switchtec_dev *stdev)
172{
173 /* requires the mrpc_mutex to already be held when called */
174 struct switchtec_user *stuser;
175
176 if (list_empty(&stdev->mrpc_queue))
177 return;
178
179 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
180 list);
181
182 stuser->status = ioread32(&stdev->mmio_mrpc->status);
183 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
184 return;
185
186 stuser_set_state(stuser, MRPC_DONE);
187 stuser->return_code = 0;
188
189 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE)
190 goto out;
191
192 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
193 if (stuser->return_code != 0)
194 goto out;
195
196 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
197 stuser->read_len);
198
199out:
200 complete_all(&stuser->comp);
201 list_del_init(&stuser->list);
202 stuser_put(stuser);
203 stdev->mrpc_busy = 0;
204
205 mrpc_cmd_submit(stdev);
206}
207
208static void mrpc_event_work(struct work_struct *work)
209{
210 struct switchtec_dev *stdev;
211
212 stdev = container_of(work, struct switchtec_dev, mrpc_work);
213
214 dev_dbg(&stdev->dev, "%s\n", __func__);
215
216 mutex_lock(&stdev->mrpc_mutex);
217 cancel_delayed_work(&stdev->mrpc_timeout);
218 mrpc_complete_cmd(stdev);
219 mutex_unlock(&stdev->mrpc_mutex);
220}
221
222static void mrpc_timeout_work(struct work_struct *work)
223{
224 struct switchtec_dev *stdev;
225 u32 status;
226
227 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
228
229 dev_dbg(&stdev->dev, "%s\n", __func__);
230
231 mutex_lock(&stdev->mrpc_mutex);
232
233 status = ioread32(&stdev->mmio_mrpc->status);
234 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
235 schedule_delayed_work(&stdev->mrpc_timeout,
236 msecs_to_jiffies(500));
237 goto out;
238 }
239
240 mrpc_complete_cmd(stdev);
241
242out:
243 mutex_unlock(&stdev->mrpc_mutex);
244}
245
5d8e1881
LG		 246static ssize_t device_version_show(struct device *dev,
247 struct device_attribute *attr, char *buf)
248{
249 struct switchtec_dev *stdev = to_stdev(dev);
250 u32 ver;
251
252 ver = ioread32(&stdev->mmio_sys_info->device_version);
253
254 return sprintf(buf, "%x\n", ver);
255}
256static DEVICE_ATTR_RO(device_version);
257
258static ssize_t fw_version_show(struct device *dev,
259 struct device_attribute *attr, char *buf)
260{
261 struct switchtec_dev *stdev = to_stdev(dev);
262 u32 ver;
263
264 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
265
266 return sprintf(buf, "%08x\n", ver);
267}
268static DEVICE_ATTR_RO(fw_version);
269
270static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
271{
272 int i;
273
274 memcpy_fromio(buf, attr, len);
275 buf[len] = '\n';
276 buf[len + 1] = 0;
277
278 for (i = len - 1; i > 0; i--) {
279 if (buf[i] != ' ')
280 break;
281 buf[i] = '\n';
282 buf[i + 1] = 0;
283 }
284
285 return strlen(buf);
286}
287
288#define DEVICE_ATTR_SYS_INFO_STR(field) \
289static ssize_t field ## _show(struct device *dev, \
290 struct device_attribute *attr, char *buf) \
291{ \
292 struct switchtec_dev *stdev = to_stdev(dev); \
293 return io_string_show(buf, &stdev->mmio_sys_info->field, \
294 sizeof(stdev->mmio_sys_info->field)); \
295} \
296\
297static DEVICE_ATTR_RO(field)
298
299DEVICE_ATTR_SYS_INFO_STR(vendor_id);
300DEVICE_ATTR_SYS_INFO_STR(product_id);
301DEVICE_ATTR_SYS_INFO_STR(product_revision);
302DEVICE_ATTR_SYS_INFO_STR(component_vendor);
303
304static ssize_t component_id_show(struct device *dev,
305 struct device_attribute *attr, char *buf)
306{
307 struct switchtec_dev *stdev = to_stdev(dev);
308 int id = ioread16(&stdev->mmio_sys_info->component_id);
309
310 return sprintf(buf, "PM%04X\n", id);
311}
312static DEVICE_ATTR_RO(component_id);
313
314static ssize_t component_revision_show(struct device *dev,
315 struct device_attribute *attr, char *buf)
316{
317 struct switchtec_dev *stdev = to_stdev(dev);
318 int rev = ioread8(&stdev->mmio_sys_info->component_revision);
319
320 return sprintf(buf, "%d\n", rev);
321}
322static DEVICE_ATTR_RO(component_revision);
323
324static ssize_t partition_show(struct device *dev,
325 struct device_attribute *attr, char *buf)
326{
327 struct switchtec_dev *stdev = to_stdev(dev);
328
329 return sprintf(buf, "%d\n", stdev->partition);
330}
331static DEVICE_ATTR_RO(partition);
332
333static ssize_t partition_count_show(struct device *dev,
334 struct device_attribute *attr, char *buf)
335{
336 struct switchtec_dev *stdev = to_stdev(dev);
337
338 return sprintf(buf, "%d\n", stdev->partition_count);
339}
340static DEVICE_ATTR_RO(partition_count);
341
342static struct attribute *switchtec_device_attrs[] = {
343 &dev_attr_device_version.attr,
344 &dev_attr_fw_version.attr,
345 &dev_attr_vendor_id.attr,
346 &dev_attr_product_id.attr,
347 &dev_attr_product_revision.attr,
348 &dev_attr_component_vendor.attr,
349 &dev_attr_component_id.attr,
350 &dev_attr_component_revision.attr,
351 &dev_attr_partition.attr,
352 &dev_attr_partition_count.attr,
353 NULL,
354};
355
356ATTRIBUTE_GROUPS(switchtec_device);
357
080b47de
LG		 358static int switchtec_dev_open(struct inode *inode, struct file *filp)
359{
360 struct switchtec_dev *stdev;
361 struct switchtec_user *stuser;
362
363 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
364
365 stuser = stuser_create(stdev);
366 if (IS_ERR(stuser))
367 return PTR_ERR(stuser);
368
369 filp->private_data = stuser;
370 nonseekable_open(inode, filp);
371
372 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
373
374 return 0;
375}
376
377static int switchtec_dev_release(struct inode *inode, struct file *filp)
378{
379 struct switchtec_user *stuser = filp->private_data;
380
381 stuser_put(stuser);
382
383 return 0;
384}
385
386static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
387{
388 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
389 return -EINTR;
390
391 if (!stdev->alive) {
392 mutex_unlock(&stdev->mrpc_mutex);
393 return -ENODEV;
394 }
395
396 return 0;
397}
398
399static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
400 size_t size, loff_t *off)
401{
402 struct switchtec_user *stuser = filp->private_data;
403 struct switchtec_dev *stdev = stuser->stdev;
404 int rc;
405
406 if (size < sizeof(stuser->cmd) ||
407 size > sizeof(stuser->cmd) + sizeof(stuser->data))
408 return -EINVAL;
409
410 stuser->data_len = size - sizeof(stuser->cmd);
411
412 rc = lock_mutex_and_test_alive(stdev);
413 if (rc)
414 return rc;
415
416 if (stuser->state != MRPC_IDLE) {
417 rc = -EBADE;
418 goto out;
419 }
420
421 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
422 if (rc) {
423 rc = -EFAULT;
424 goto out;
425 }
426
427 data += sizeof(stuser->cmd);
428 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
429 if (rc) {
430 rc = -EFAULT;
431 goto out;
432 }
433
434 rc = mrpc_queue_cmd(stuser);
435
436out:
437 mutex_unlock(&stdev->mrpc_mutex);
438
439 if (rc)
440 return rc;
441
442 return size;
443}
444
445static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
446 size_t size, loff_t *off)
447{
448 struct switchtec_user *stuser = filp->private_data;
449 struct switchtec_dev *stdev = stuser->stdev;
450 int rc;
451
452 if (size < sizeof(stuser->cmd) ||
453 size > sizeof(stuser->cmd) + sizeof(stuser->data))
454 return -EINVAL;
455
456 rc = lock_mutex_and_test_alive(stdev);
457 if (rc)
458 return rc;
459
460 if (stuser->state == MRPC_IDLE) {
461 mutex_unlock(&stdev->mrpc_mutex);
462 return -EBADE;
463 }
464
465 stuser->read_len = size - sizeof(stuser->return_code);
466
467 mutex_unlock(&stdev->mrpc_mutex);
468
469 if (filp->f_flags & O_NONBLOCK) {
470 if (!try_wait_for_completion(&stuser->comp))
471 return -EAGAIN;
472 } else {
473 rc = wait_for_completion_interruptible(&stuser->comp);
474 if (rc < 0)
475 return rc;
476 }
477
478 rc = lock_mutex_and_test_alive(stdev);
479 if (rc)
480 return rc;
481
482 if (stuser->state != MRPC_DONE) {
483 mutex_unlock(&stdev->mrpc_mutex);
484 return -EBADE;
485 }
486
487 rc = copy_to_user(data, &stuser->return_code,
488 sizeof(stuser->return_code));
489 if (rc) {
490 rc = -EFAULT;
491 goto out;
492 }
493
494 data += sizeof(stuser->return_code);
495 rc = copy_to_user(data, &stuser->data,
496 size - sizeof(stuser->return_code));
497 if (rc) {
498 rc = -EFAULT;
499 goto out;
500 }
501
502 stuser_set_state(stuser, MRPC_IDLE);
503
504out:
505 mutex_unlock(&stdev->mrpc_mutex);
506
507 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE)
508 return size;
509 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
510 return -ENXIO;
511 else
512 return -EBADMSG;
513}
514
515static unsigned int switchtec_dev_poll(struct file *filp, poll_table *wait)
516{
517 struct switchtec_user *stuser = filp->private_data;
518 struct switchtec_dev *stdev = stuser->stdev;
519 int ret = 0;
520
521 poll_wait(filp, &stuser->comp.wait, wait);
522 poll_wait(filp, &stdev->event_wq, wait);
523
524 if (lock_mutex_and_test_alive(stdev))
525 return POLLIN | POLLRDHUP | POLLOUT | POLLERR | POLLHUP;
526
527 mutex_unlock(&stdev->mrpc_mutex);
528
529 if (try_wait_for_completion(&stuser->comp))
530 ret |= POLLIN | POLLRDNORM;
531
532 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
533 ret |= POLLPRI | POLLRDBAND;
534
535 return ret;
536}
537
52eabba5
LG		 538static int ioctl_flash_info(struct switchtec_dev *stdev,
539 struct switchtec_ioctl_flash_info __user *uinfo)
540{
541 struct switchtec_ioctl_flash_info info = {0};
542 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
543
544 info.flash_length = ioread32(&fi->flash_length);
545 info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS;
546
547 if (copy_to_user(uinfo, &info, sizeof(info)))
548 return -EFAULT;
549
550 return 0;
551}
552
553static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
554 struct partition_info __iomem *pi)
555{
556 info->address = ioread32(&pi->address);
557 info->length = ioread32(&pi->length);
558}
559
560static int ioctl_flash_part_info(struct switchtec_dev *stdev,
561 struct switchtec_ioctl_flash_part_info __user *uinfo)
562{
563 struct switchtec_ioctl_flash_part_info info = {0};
564 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
079e3bc5 565 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
52eabba5
LG		 566 u32 active_addr = -1;
567
568 if (copy_from_user(&info, uinfo, sizeof(info)))
569 return -EFAULT;
570
571 switch (info.flash_partition) {
572 case SWITCHTEC_IOCTL_PART_CFG0:
573 active_addr = ioread32(&fi->active_cfg);
574 set_fw_info_part(&info, &fi->cfg0);
079e3bc5
LG		 575 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG0_RUNNING)
576 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 577 break;
578 case SWITCHTEC_IOCTL_PART_CFG1:
579 active_addr = ioread32(&fi->active_cfg);
580 set_fw_info_part(&info, &fi->cfg1);
079e3bc5
LG		 581 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG1_RUNNING)
582 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 583 break;
584 case SWITCHTEC_IOCTL_PART_IMG0:
585 active_addr = ioread32(&fi->active_img);
586 set_fw_info_part(&info, &fi->img0);
079e3bc5
LG		 587 if (ioread16(&si->img_running) == SWITCHTEC_IMG0_RUNNING)
588 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 589 break;
590 case SWITCHTEC_IOCTL_PART_IMG1:
591 active_addr = ioread32(&fi->active_img);
592 set_fw_info_part(&info, &fi->img1);
079e3bc5
LG		 593 if (ioread16(&si->img_running) == SWITCHTEC_IMG1_RUNNING)
594 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 595 break;
596 case SWITCHTEC_IOCTL_PART_NVLOG:
597 set_fw_info_part(&info, &fi->nvlog);
598 break;
599 case SWITCHTEC_IOCTL_PART_VENDOR0:
600 set_fw_info_part(&info, &fi->vendor[0]);
601 break;
602 case SWITCHTEC_IOCTL_PART_VENDOR1:
603 set_fw_info_part(&info, &fi->vendor[1]);
604 break;
605 case SWITCHTEC_IOCTL_PART_VENDOR2:
606 set_fw_info_part(&info, &fi->vendor[2]);
607 break;
608 case SWITCHTEC_IOCTL_PART_VENDOR3:
609 set_fw_info_part(&info, &fi->vendor[3]);
610 break;
611 case SWITCHTEC_IOCTL_PART_VENDOR4:
612 set_fw_info_part(&info, &fi->vendor[4]);
613 break;
614 case SWITCHTEC_IOCTL_PART_VENDOR5:
615 set_fw_info_part(&info, &fi->vendor[5]);
616 break;
617 case SWITCHTEC_IOCTL_PART_VENDOR6:
618 set_fw_info_part(&info, &fi->vendor[6]);
619 break;
620 case SWITCHTEC_IOCTL_PART_VENDOR7:
621 set_fw_info_part(&info, &fi->vendor[7]);
622 break;
623 default:
624 return -EINVAL;
625 }
626
627 if (info.address == active_addr)
079e3bc5 628 info.active |= SWITCHTEC_IOCTL_PART_ACTIVE;
52eabba5
LG		 629
630 if (copy_to_user(uinfo, &info, sizeof(info)))
631 return -EFAULT;
632
633 return 0;
634}
635
636static int ioctl_event_summary(struct switchtec_dev *stdev,
637 struct switchtec_user *stuser,
638 struct switchtec_ioctl_event_summary __user *usum)
639{
640 struct switchtec_ioctl_event_summary s = {0};
641 int i;
642 u32 reg;
643
644 s.global = ioread32(&stdev->mmio_sw_event->global_summary);
645 s.part_bitmap = ioread32(&stdev->mmio_sw_event->part_event_bitmap);
646 s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
647
648 for (i = 0; i < stdev->partition_count; i++) {
649 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
650 s.part[i] = reg;
651 }
652
653 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
654 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
655 if (reg != MICROSEMI_VENDOR_ID)
656 break;
657
658 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
659 s.pff[i] = reg;
660 }
661
662 if (copy_to_user(usum, &s, sizeof(s)))
663 return -EFAULT;
664
665 stuser->event_cnt = atomic_read(&stdev->event_cnt);
666
667 return 0;
668}
669
670static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
671 size_t offset, int index)
672{
673 return (void __iomem *)stdev->mmio_sw_event + offset;
674}
675
676static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
677 size_t offset, int index)
678{
679 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
680}
681
682static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
683 size_t offset, int index)
684{
685 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
686}
687
688#define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
689#define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
690#define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
691
f05f7355 692static const struct event_reg {
52eabba5
LG		 693 size_t offset;
694 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
695 size_t offset, int index);
696} event_regs[] = {
697 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
698 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
699 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
700 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
701 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
702 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
703 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
704 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
705 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
706 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
707 twi_mrpc_comp_async_hdr),
708 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
709 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
710 cli_mrpc_comp_async_hdr),
711 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
712 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
713 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
714 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
715 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
716 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
717 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
718 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
719 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
720 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
721 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
722 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
723 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
724 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
725 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
726 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
727 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
728};
729
730static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
731 int event_id, int index)
732{
733 size_t off;
734
735 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
736 return ERR_PTR(-EINVAL);
737
738 off = event_regs[event_id].offset;
739
740 if (event_regs[event_id].map_reg == part_ev_reg) {
741 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
742 index = stdev->partition;
743 else if (index < 0 || index >= stdev->partition_count)
744 return ERR_PTR(-EINVAL);
745 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
746 if (index < 0 || index >= stdev->pff_csr_count)
747 return ERR_PTR(-EINVAL);
748 }
749
750 return event_regs[event_id].map_reg(stdev, off, index);
751}
752
753static int event_ctl(struct switchtec_dev *stdev,
754 struct switchtec_ioctl_event_ctl *ctl)
755{
756 int i;
757 u32 __iomem *reg;
758 u32 hdr;
759
760 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
761 if (IS_ERR(reg))
762 return PTR_ERR(reg);
763
764 hdr = ioread32(reg);
765 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
766 ctl->data[i] = ioread32(&reg[i + 1]);
767
768 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
769 ctl->count = (hdr >> 5) & 0xFF;
770
771 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
772 hdr &= ~SWITCHTEC_EVENT_CLEAR;
773 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
774 hdr |= SWITCHTEC_EVENT_EN_IRQ;
775 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
776 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
777 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
778 hdr |= SWITCHTEC_EVENT_EN_LOG;
779 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
780 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
781 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
782 hdr |= SWITCHTEC_EVENT_EN_CLI;
783 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
784 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
785 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
786 hdr |= SWITCHTEC_EVENT_FATAL;
787 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
788 hdr &= ~SWITCHTEC_EVENT_FATAL;
789
790 if (ctl->flags)
791 iowrite32(hdr, reg);
792
793 ctl->flags = 0;
794 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
795 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
796 if (hdr & SWITCHTEC_EVENT_EN_LOG)
797 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
798 if (hdr & SWITCHTEC_EVENT_EN_CLI)
799 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
800 if (hdr & SWITCHTEC_EVENT_FATAL)
801 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
802
803 return 0;
804}
805
806static int ioctl_event_ctl(struct switchtec_dev *stdev,
807 struct switchtec_ioctl_event_ctl __user *uctl)
808{
809 int ret;
810 int nr_idxs;
811 struct switchtec_ioctl_event_ctl ctl;
812
813 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
814 return -EFAULT;
815
816 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
817 return -EINVAL;
818
819 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
820 return -EINVAL;
821
822 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
823 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
824 nr_idxs = 1;
825 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
826 nr_idxs = stdev->partition_count;
827 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
828 nr_idxs = stdev->pff_csr_count;
829 else
830 return -EINVAL;
831
832 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
833 ret = event_ctl(stdev, &ctl);
834 if (ret < 0)
835 return ret;
836 }
837 } else {
838 ret = event_ctl(stdev, &ctl);
839 if (ret < 0)
840 return ret;
841 }
842
843 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
844 return -EFAULT;
845
846 return 0;
847}
848
849static int ioctl_pff_to_port(struct switchtec_dev *stdev,
850 struct switchtec_ioctl_pff_port *up)
851{
852 int i, part;
853 u32 reg;
854 struct part_cfg_regs *pcfg;
855 struct switchtec_ioctl_pff_port p;
856
857 if (copy_from_user(&p, up, sizeof(p)))
858 return -EFAULT;
859
860 p.port = -1;
861 for (part = 0; part < stdev->partition_count; part++) {
862 pcfg = &stdev->mmio_part_cfg_all[part];
863 p.partition = part;
864
865 reg = ioread32(&pcfg->usp_pff_inst_id);
866 if (reg == p.pff) {
867 p.port = 0;
868 break;
869 }
870
871 reg = ioread32(&pcfg->vep_pff_inst_id);
872 if (reg == p.pff) {
873 p.port = SWITCHTEC_IOCTL_PFF_VEP;
874 break;
875 }
876
877 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
878 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
879 if (reg != p.pff)
880 continue;
881
882 p.port = i + 1;
883 break;
884 }
885
886 if (p.port != -1)
887 break;
888 }
889
890 if (copy_to_user(up, &p, sizeof(p)))
891 return -EFAULT;
892
893 return 0;
894}
895
896static int ioctl_port_to_pff(struct switchtec_dev *stdev,
897 struct switchtec_ioctl_pff_port *up)
898{
899 struct switchtec_ioctl_pff_port p;
900 struct part_cfg_regs *pcfg;
901
902 if (copy_from_user(&p, up, sizeof(p)))
903 return -EFAULT;
904
905 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
906 pcfg = stdev->mmio_part_cfg;
907 else if (p.partition < stdev->partition_count)
908 pcfg = &stdev->mmio_part_cfg_all[p.partition];
909 else
910 return -EINVAL;
911
912 switch (p.port) {
913 case 0:
914 p.pff = ioread32(&pcfg->usp_pff_inst_id);
915 break;
916 case SWITCHTEC_IOCTL_PFF_VEP:
917 p.pff = ioread32(&pcfg->vep_pff_inst_id);
918 break;
919 default:
920 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
921 return -EINVAL;
b8d9c3ca
GS		 922 p.port = array_index_nospec(p.port,
923 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
52eabba5
LG		 924 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
925 break;
926 }
927
928 if (copy_to_user(up, &p, sizeof(p)))
929 return -EFAULT;
930
931 return 0;
932}
933
934static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
935 unsigned long arg)
936{
937 struct switchtec_user *stuser = filp->private_data;
938 struct switchtec_dev *stdev = stuser->stdev;
939 int rc;
940 void __user *argp = (void __user *)arg;
941
942 rc = lock_mutex_and_test_alive(stdev);
943 if (rc)
944 return rc;
945
946 switch (cmd) {
947 case SWITCHTEC_IOCTL_FLASH_INFO:
948 rc = ioctl_flash_info(stdev, argp);
949 break;
950 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
951 rc = ioctl_flash_part_info(stdev, argp);
952 break;
953 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
954 rc = ioctl_event_summary(stdev, stuser, argp);
955 break;
956 case SWITCHTEC_IOCTL_EVENT_CTL:
957 rc = ioctl_event_ctl(stdev, argp);
958 break;
959 case SWITCHTEC_IOCTL_PFF_TO_PORT:
960 rc = ioctl_pff_to_port(stdev, argp);
961 break;
962 case SWITCHTEC_IOCTL_PORT_TO_PFF:
963 rc = ioctl_port_to_pff(stdev, argp);
964 break;
965 default:
966 rc = -ENOTTY;
967 break;
968 }
969
970 mutex_unlock(&stdev->mrpc_mutex);
971 return rc;
972}
973
080b47de
LG		 974static const struct file_operations switchtec_fops = {
975 .owner = THIS_MODULE,
976 .open = switchtec_dev_open,
977 .release = switchtec_dev_release,
978 .write = switchtec_dev_write,
979 .read = switchtec_dev_read,
980 .poll = switchtec_dev_poll,
52eabba5
LG		 981 .unlocked_ioctl = switchtec_dev_ioctl,
982 .compat_ioctl = switchtec_dev_ioctl,
080b47de
LG		 983};
984
48c302dc
LG		 985static void link_event_work(struct work_struct *work)
986{
987 struct switchtec_dev *stdev;
988
989 stdev = container_of(work, struct switchtec_dev, link_event_work);
990
991 if (stdev->link_notifier)
992 stdev->link_notifier(stdev);
993}
994
995static void check_link_state_events(struct switchtec_dev *stdev)
996{
997 int idx;
998 u32 reg;
999 int count;
1000 int occurred = 0;
1001
1002 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1003 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
1004 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
1005 count = (reg >> 5) & 0xFF;
1006
1007 if (count != stdev->link_event_count[idx]) {
1008 occurred = 1;
1009 stdev->link_event_count[idx] = count;
1010 }
1011 }
1012
1013 if (occurred)
1014 schedule_work(&stdev->link_event_work);
1015}
1016
1017static void enable_link_state_events(struct switchtec_dev *stdev)
1018{
1019 int idx;
1020
1021 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1022 iowrite32(SWITCHTEC_EVENT_CLEAR |
1023 SWITCHTEC_EVENT_EN_IRQ,
1024 &stdev->mmio_pff_csr[idx].link_state_hdr);
1025 }
1026}
1027
080b47de
LG		 1028static void stdev_release(struct device *dev)
1029{
1030 struct switchtec_dev *stdev = to_stdev(dev);
1031
1032 kfree(stdev);
1033}
1034
1035static void stdev_kill(struct switchtec_dev *stdev)
1036{
1037 struct switchtec_user *stuser, *tmpuser;
1038
1039 pci_clear_master(stdev->pdev);
1040
1041 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1042
1043 /* Mark the hardware as unavailable and complete all completions */
1044 mutex_lock(&stdev->mrpc_mutex);
1045 stdev->alive = false;
1046
1047 /* Wake up and kill any users waiting on an MRPC request */
1048 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1049 complete_all(&stuser->comp);
1050 list_del_init(&stuser->list);
1051 stuser_put(stuser);
1052 }
1053
1054 mutex_unlock(&stdev->mrpc_mutex);
1055
1056 /* Wake up any users waiting on event_wq */
1057 wake_up_interruptible(&stdev->event_wq);
1058}
1059
1060static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1061{
1062 struct switchtec_dev *stdev;
1063 int minor;
1064 struct device *dev;
1065 struct cdev *cdev;
1066 int rc;
1067
1068 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1069 dev_to_node(&pdev->dev));
1070 if (!stdev)
1071 return ERR_PTR(-ENOMEM);
1072
1073 stdev->alive = true;
1074 stdev->pdev = pdev;
1075 INIT_LIST_HEAD(&stdev->mrpc_queue);
1076 mutex_init(&stdev->mrpc_mutex);
1077 stdev->mrpc_busy = 0;
1078 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1079 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
48c302dc 1080 INIT_WORK(&stdev->link_event_work, link_event_work);
080b47de
LG		 1081 init_waitqueue_head(&stdev->event_wq);
1082 atomic_set(&stdev->event_cnt, 0);
1083
1084 dev = &stdev->dev;
1085 device_initialize(dev);
1086 dev->class = switchtec_class;
1087 dev->parent = &pdev->dev;
5d8e1881 1088 dev->groups = switchtec_device_groups;
080b47de
LG		 1089 dev->release = stdev_release;
1090
1091 minor = ida_simple_get(&switchtec_minor_ida, 0, 0,
1092 GFP_KERNEL);
1093 if (minor < 0) {
1094 rc = minor;
1095 goto err_put;
1096 }
1097
1098 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1099 dev_set_name(dev, "switchtec%d", minor);
1100
1101 cdev = &stdev->cdev;
1102 cdev_init(cdev, &switchtec_fops);
1103 cdev->owner = THIS_MODULE;
080b47de
LG		 1104
1105 return stdev;
1106
1107err_put:
1108 put_device(&stdev->dev);
1109 return ERR_PTR(rc);
1110}
1111
52eabba5
LG		 1112static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1113{
1114 size_t off = event_regs[eid].offset;
1115 u32 __iomem *hdr_reg;
1116 u32 hdr;
1117
1118 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1119 hdr = ioread32(hdr_reg);
1120
1121 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1122 return 0;
1123
48c302dc
LG		 1124 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE)
1125 return 0;
1126
52eabba5
LG		 1127 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1128 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1129 iowrite32(hdr, hdr_reg);
1130
1131 return 1;
1132}
1133
1134static int mask_all_events(struct switchtec_dev *stdev, int eid)
1135{
1136 int idx;
1137 int count = 0;
1138
1139 if (event_regs[eid].map_reg == part_ev_reg) {
1140 for (idx = 0; idx < stdev->partition_count; idx++)
1141 count += mask_event(stdev, eid, idx);
1142 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1143 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1144 if (!stdev->pff_local[idx])
1145 continue;
48c302dc 1146
52eabba5
LG		 1147 count += mask_event(stdev, eid, idx);
1148 }
1149 } else {
1150 count += mask_event(stdev, eid, 0);
1151 }
1152
1153 return count;
1154}
1155
080b47de
LG		 1156static irqreturn_t switchtec_event_isr(int irq, void *dev)
1157{
1158 struct switchtec_dev *stdev = dev;
1159 u32 reg;
1160 irqreturn_t ret = IRQ_NONE;
52eabba5 1161 int eid, event_count = 0;
080b47de
LG		 1162
1163 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1164 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1165 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1166 ret = IRQ_HANDLED;
1167 schedule_work(&stdev->mrpc_work);
1168 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1169 }
1170
48c302dc
LG		 1171 check_link_state_events(stdev);
1172
52eabba5
LG		 1173 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++)
1174 event_count += mask_all_events(stdev, eid);
1175
1176 if (event_count) {
1177 atomic_inc(&stdev->event_cnt);
1178 wake_up_interruptible(&stdev->event_wq);
1179 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1180 event_count);
1181 return IRQ_HANDLED;
1182 }
1183
080b47de
LG		 1184 return ret;
1185}
1186
1187static int switchtec_init_isr(struct switchtec_dev *stdev)
1188{
1189 int nvecs;
1190 int event_irq;
1191
1192 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, 4,
1193 PCI_IRQ_MSIX | PCI_IRQ_MSI);
1194 if (nvecs < 0)
1195 return nvecs;
1196
1197 event_irq = ioread32(&stdev->mmio_part_cfg->vep_vector_number);
1198 if (event_irq < 0 || event_irq >= nvecs)
1199 return -EFAULT;
1200
1201 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1202 if (event_irq < 0)
1203 return event_irq;
1204
1205 return devm_request_irq(&stdev->pdev->dev, event_irq,
1206 switchtec_event_isr, 0,
1207 KBUILD_MODNAME, stdev);
1208}
1209
1210static void init_pff(struct switchtec_dev *stdev)
1211{
1212 int i;
1213 u32 reg;
1214 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg;
1215
1216 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1217 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1218 if (reg != MICROSEMI_VENDOR_ID)
1219 break;
1220 }
1221
1222 stdev->pff_csr_count = i;
1223
1224 reg = ioread32(&pcfg->usp_pff_inst_id);
1225 if (reg < SWITCHTEC_MAX_PFF_CSR)
1226 stdev->pff_local[reg] = 1;
1227
1228 reg = ioread32(&pcfg->vep_pff_inst_id);
1229 if (reg < SWITCHTEC_MAX_PFF_CSR)
1230 stdev->pff_local[reg] = 1;
1231
1232 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1233 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1234 if (reg < SWITCHTEC_MAX_PFF_CSR)
1235 stdev->pff_local[reg] = 1;
1236 }
1237}
1238
1239static int switchtec_init_pci(struct switchtec_dev *stdev,
1240 struct pci_dev *pdev)
1241{
1242 int rc;
1243
1244 rc = pcim_enable_device(pdev);
1245 if (rc)
1246 return rc;
1247
1248 rc = pcim_iomap_regions(pdev, 0x1, KBUILD_MODNAME);
1249 if (rc)
1250 return rc;
1251
1252 pci_set_master(pdev);
1253
1254 stdev->mmio = pcim_iomap_table(pdev)[0];
1255 stdev->mmio_mrpc = stdev->mmio + SWITCHTEC_GAS_MRPC_OFFSET;
1256 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1257 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1258 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1259 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
9871e9bb 1260 stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id);
080b47de
LG		 1261 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1262 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1263 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1264 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1265
9871e9bb
LG		 1266 if (stdev->partition_count < 1)
1267 stdev->partition_count = 1;
1268
080b47de
LG		 1269 init_pff(stdev);
1270
1271 pci_set_drvdata(pdev, stdev);
1272
1273 return 0;
1274}
1275
1276static int switchtec_pci_probe(struct pci_dev *pdev,
1277 const struct pci_device_id *id)
1278{
1279 struct switchtec_dev *stdev;
1280 int rc;
1281
33dea5aa
LG		 1282 if (pdev->class == MICROSEMI_NTB_CLASSCODE)
1283 request_module_nowait("ntb_hw_switchtec");
1284
080b47de
LG		 1285 stdev = stdev_create(pdev);
1286 if (IS_ERR(stdev))
1287 return PTR_ERR(stdev);
1288
1289 rc = switchtec_init_pci(stdev, pdev);
1290 if (rc)
1291 goto err_put;
1292
1293 rc = switchtec_init_isr(stdev);
1294 if (rc) {
1295 dev_err(&stdev->dev, "failed to init isr.\n");
1296 goto err_put;
1297 }
1298
1299 iowrite32(SWITCHTEC_EVENT_CLEAR |
1300 SWITCHTEC_EVENT_EN_IRQ,
1301 &stdev->mmio_part_cfg->mrpc_comp_hdr);
48c302dc 1302 enable_link_state_events(stdev);
080b47de 1303
e40cf640 1304 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
080b47de
LG		 1305 if (rc)
1306 goto err_devadd;
1307
1308 dev_info(&stdev->dev, "Management device registered.\n");
1309
1310 return 0;
1311
1312err_devadd:
080b47de
LG		 1313 stdev_kill(stdev);
1314err_put:
1315 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1316 put_device(&stdev->dev);
1317 return rc;
1318}
1319
1320static void switchtec_pci_remove(struct pci_dev *pdev)
1321{
1322 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1323
1324 pci_set_drvdata(pdev, NULL);
1325
e40cf640 1326 cdev_device_del(&stdev->cdev, &stdev->dev);
080b47de
LG		 1327 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1328 dev_info(&stdev->dev, "unregistered.\n");
1329
1330 stdev_kill(stdev);
1331 put_device(&stdev->dev);
1332}
1333
1334#define SWITCHTEC_PCI_DEVICE(device_id) \
1335 { \
1336 .vendor = MICROSEMI_VENDOR_ID, \
1337 .device = device_id, \
1338 .subvendor = PCI_ANY_ID, \
1339 .subdevice = PCI_ANY_ID, \
1340 .class = MICROSEMI_MGMT_CLASSCODE, \
1341 .class_mask = 0xFFFFFFFF, \
1342 }, \
1343 { \
1344 .vendor = MICROSEMI_VENDOR_ID, \
1345 .device = device_id, \
1346 .subvendor = PCI_ANY_ID, \
1347 .subdevice = PCI_ANY_ID, \
1348 .class = MICROSEMI_NTB_CLASSCODE, \
1349 .class_mask = 0xFFFFFFFF, \
1350 }
1351
1352static const struct pci_device_id switchtec_pci_tbl[] = {
1353 SWITCHTEC_PCI_DEVICE(0x8531), //PFX 24xG3
1354 SWITCHTEC_PCI_DEVICE(0x8532), //PFX 32xG3
1355 SWITCHTEC_PCI_DEVICE(0x8533), //PFX 48xG3
1356 SWITCHTEC_PCI_DEVICE(0x8534), //PFX 64xG3
1357 SWITCHTEC_PCI_DEVICE(0x8535), //PFX 80xG3
1358 SWITCHTEC_PCI_DEVICE(0x8536), //PFX 96xG3
1359 SWITCHTEC_PCI_DEVICE(0x8543), //PSX 48xG3
1360 SWITCHTEC_PCI_DEVICE(0x8544), //PSX 64xG3
1361 SWITCHTEC_PCI_DEVICE(0x8545), //PSX 80xG3
1362 SWITCHTEC_PCI_DEVICE(0x8546), //PSX 96xG3
393958d0
LG		 1363 SWITCHTEC_PCI_DEVICE(0x8551), //PAX 24XG3
1364 SWITCHTEC_PCI_DEVICE(0x8552), //PAX 32XG3
1365 SWITCHTEC_PCI_DEVICE(0x8553), //PAX 48XG3
1366 SWITCHTEC_PCI_DEVICE(0x8554), //PAX 64XG3
1367 SWITCHTEC_PCI_DEVICE(0x8555), //PAX 80XG3
1368 SWITCHTEC_PCI_DEVICE(0x8556), //PAX 96XG3
1369 SWITCHTEC_PCI_DEVICE(0x8561), //PFXL 24XG3
1370 SWITCHTEC_PCI_DEVICE(0x8562), //PFXL 32XG3
1371 SWITCHTEC_PCI_DEVICE(0x8563), //PFXL 48XG3
1372 SWITCHTEC_PCI_DEVICE(0x8564), //PFXL 64XG3
1373 SWITCHTEC_PCI_DEVICE(0x8565), //PFXL 80XG3
1374 SWITCHTEC_PCI_DEVICE(0x8566), //PFXL 96XG3
1375 SWITCHTEC_PCI_DEVICE(0x8571), //PFXI 24XG3
1376 SWITCHTEC_PCI_DEVICE(0x8572), //PFXI 32XG3
1377 SWITCHTEC_PCI_DEVICE(0x8573), //PFXI 48XG3
1378 SWITCHTEC_PCI_DEVICE(0x8574), //PFXI 64XG3
1379 SWITCHTEC_PCI_DEVICE(0x8575), //PFXI 80XG3
1380 SWITCHTEC_PCI_DEVICE(0x8576), //PFXI 96XG3
080b47de
LG		 1381 {0}
1382};
1383MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1384
1385static struct pci_driver switchtec_pci_driver = {
1386 .name = KBUILD_MODNAME,
1387 .id_table = switchtec_pci_tbl,
1388 .probe = switchtec_pci_probe,
1389 .remove = switchtec_pci_remove,
1390};
1391
1392static int __init switchtec_init(void)
1393{
1394 int rc;
1395
1396 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1397 "switchtec");
1398 if (rc)
1399 return rc;
1400
1401 switchtec_class = class_create(THIS_MODULE, "switchtec");
1402 if (IS_ERR(switchtec_class)) {
1403 rc = PTR_ERR(switchtec_class);
1404 goto err_create_class;
1405 }
1406
1407 rc = pci_register_driver(&switchtec_pci_driver);
1408 if (rc)
1409 goto err_pci_register;
1410
1411 pr_info(KBUILD_MODNAME ": loaded.\n");
1412
1413 return 0;
1414
1415err_pci_register:
1416 class_destroy(switchtec_class);
1417
1418err_create_class:
1419 unregister_chrdev_region(switchtec_devt, max_devices);
1420
1421 return rc;
1422}
1423module_init(switchtec_init);
1424
1425static void __exit switchtec_exit(void)
1426{
1427 pci_unregister_driver(&switchtec_pci_driver);
1428 class_destroy(switchtec_class);
1429 unregister_chrdev_region(switchtec_devt, max_devices);
1430 ida_destroy(&switchtec_minor_ida);
1431
1432 pr_info(KBUILD_MODNAME ": unloaded.\n");
1433}
1434module_exit(switchtec_exit);
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