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a49d2536 AC |
1 | #ifndef ISP2401 |
2 | /* | |
3 | * Support for Intel Camera Imaging ISP subsystem. | |
4 | * Copyright (c) 2015, Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | */ | |
15 | #else | |
d929fb4e | 16 | /* |
a49d2536 AC |
17 | Support for Intel Camera Imaging ISP subsystem. |
18 | Copyright (c) 2010 - 2015, Intel Corporation. | |
19 | ||
20 | This program is free software; you can redistribute it and/or modify it | |
21 | under the terms and conditions of the GNU General Public License, | |
22 | version 2, as published by the Free Software Foundation. | |
23 | ||
24 | This program is distributed in the hope it will be useful, but WITHOUT | |
25 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
26 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
27 | more details. | |
28 | */ | |
29 | #endif | |
30 | ||
31 | #include "system_global.h" | |
32 | ||
33 | #ifdef USE_INPUT_SYSTEM_VERSION_2401 | |
34 | ||
35 | #include "assert_support.h" | |
36 | #include "platform_support.h" | |
37 | #include "ia_css_isys.h" | |
38 | #include "bitop_support.h" | |
39 | #include "ia_css_pipeline.h" /* ia_css_pipeline_get_pipe_io_status() */ | |
40 | #include "sh_css_internal.h" /* sh_css_sp_pipeline_io_status | |
41 | * SH_CSS_MAX_SP_THREADS | |
42 | */ | |
43 | #include "csi_rx_rmgr.h" | |
44 | ||
45 | static isys_csi_rx_rsrc_t isys_csi_rx_rsrc[N_CSI_RX_BACKEND_ID]; | |
46 | ||
47 | void ia_css_isys_csi_rx_lut_rmgr_init(void) | |
48 | { | |
49 | memset(isys_csi_rx_rsrc, 0, sizeof(isys_csi_rx_rsrc)); | |
50 | } | |
51 | ||
52 | void ia_css_isys_csi_rx_lut_rmgr_uninit(void) | |
53 | { | |
54 | memset(isys_csi_rx_rsrc, 0, sizeof(isys_csi_rx_rsrc)); | |
55 | } | |
56 | ||
57 | bool ia_css_isys_csi_rx_lut_rmgr_acquire( | |
58 | csi_rx_backend_ID_t backend, | |
59 | csi_mipi_packet_type_t packet_type, | |
60 | csi_rx_backend_lut_entry_t *entry) | |
61 | { | |
62 | bool retval = false; | |
63 | uint32_t max_num_packets_of_type; | |
64 | uint32_t num_active_of_type; | |
65 | isys_csi_rx_rsrc_t *cur_rsrc = NULL; | |
66 | uint16_t i; | |
67 | ||
68 | assert(backend < N_CSI_RX_BACKEND_ID); | |
69 | assert((packet_type == CSI_MIPI_PACKET_TYPE_LONG) || (packet_type == CSI_MIPI_PACKET_TYPE_SHORT)); | |
70 | assert(entry != NULL); | |
71 | ||
72 | if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { | |
73 | cur_rsrc = &isys_csi_rx_rsrc[backend]; | |
74 | if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { | |
75 | max_num_packets_of_type = N_LONG_PACKET_LUT_ENTRIES[backend]; | |
76 | num_active_of_type = cur_rsrc->num_long_packets; | |
77 | } else { | |
78 | max_num_packets_of_type = N_SHORT_PACKET_LUT_ENTRIES[backend]; | |
79 | num_active_of_type = cur_rsrc->num_short_packets; | |
80 | } | |
81 | ||
82 | if (num_active_of_type < max_num_packets_of_type) { | |
83 | for (i = 0; i < max_num_packets_of_type; i++) { | |
84 | if (bitop_getbit(cur_rsrc->active_table, i) == 0) { | |
85 | bitop_setbit(cur_rsrc->active_table, i); | |
86 | ||
87 | if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { | |
88 | entry->long_packet_entry = i; | |
89 | entry->short_packet_entry = 0; | |
90 | cur_rsrc->num_long_packets++; | |
91 | } else { | |
92 | entry->long_packet_entry = 0; | |
93 | entry->short_packet_entry = i; | |
94 | cur_rsrc->num_short_packets++; | |
95 | } | |
96 | cur_rsrc->num_active++; | |
97 | retval = true; | |
98 | break; | |
99 | } | |
100 | } | |
101 | } | |
102 | } | |
103 | return retval; | |
104 | } | |
105 | ||
106 | void ia_css_isys_csi_rx_lut_rmgr_release( | |
107 | csi_rx_backend_ID_t backend, | |
108 | csi_mipi_packet_type_t packet_type, | |
109 | csi_rx_backend_lut_entry_t *entry) | |
110 | { | |
111 | uint32_t max_num_packets; | |
112 | isys_csi_rx_rsrc_t *cur_rsrc = NULL; | |
113 | uint32_t packet_entry = 0; | |
114 | ||
115 | assert(backend < N_CSI_RX_BACKEND_ID); | |
116 | assert(entry != NULL); | |
117 | assert((packet_type >= CSI_MIPI_PACKET_TYPE_LONG) || (packet_type <= CSI_MIPI_PACKET_TYPE_SHORT)); | |
118 | ||
119 | if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { | |
120 | if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { | |
121 | max_num_packets = N_LONG_PACKET_LUT_ENTRIES[backend]; | |
122 | packet_entry = entry->long_packet_entry; | |
123 | } else { | |
124 | max_num_packets = N_SHORT_PACKET_LUT_ENTRIES[backend]; | |
125 | packet_entry = entry->short_packet_entry; | |
126 | } | |
127 | ||
128 | cur_rsrc = &isys_csi_rx_rsrc[backend]; | |
129 | if ((packet_entry < max_num_packets) && (cur_rsrc->num_active > 0)) { | |
130 | if (bitop_getbit(cur_rsrc->active_table, packet_entry) == 1) { | |
131 | bitop_clearbit(cur_rsrc->active_table, packet_entry); | |
132 | ||
133 | if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) | |
134 | cur_rsrc->num_long_packets--; | |
135 | else | |
136 | cur_rsrc->num_short_packets--; | |
137 | cur_rsrc->num_active--; | |
138 | } | |
139 | } | |
140 | } | |
141 | } | |
142 | ||
143 | enum ia_css_err ia_css_isys_csi_rx_register_stream( | |
144 | enum ia_css_csi2_port port, | |
145 | uint32_t isys_stream_id) | |
146 | { | |
147 | enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; | |
148 | ||
149 | if ((port < N_INPUT_SYSTEM_CSI_PORT) && | |
150 | (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { | |
151 | struct sh_css_sp_pipeline_io_status *pipe_io_status; | |
152 | pipe_io_status = ia_css_pipeline_get_pipe_io_status(); | |
153 | if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 0) { | |
154 | bitop_setbit(pipe_io_status->active[port], isys_stream_id); | |
155 | pipe_io_status->running[port] = 0; | |
156 | retval = IA_CSS_SUCCESS; | |
157 | } | |
158 | } | |
159 | return retval; | |
160 | } | |
161 | ||
162 | enum ia_css_err ia_css_isys_csi_rx_unregister_stream( | |
163 | enum ia_css_csi2_port port, | |
164 | uint32_t isys_stream_id) | |
165 | { | |
166 | enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; | |
167 | ||
168 | if ((port < N_INPUT_SYSTEM_CSI_PORT) && | |
169 | (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { | |
170 | struct sh_css_sp_pipeline_io_status *pipe_io_status; | |
171 | pipe_io_status = ia_css_pipeline_get_pipe_io_status(); | |
172 | if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 1) { | |
173 | bitop_clearbit(pipe_io_status->active[port], isys_stream_id); | |
174 | retval = IA_CSS_SUCCESS; | |
175 | } | |
176 | } | |
177 | return retval; | |
178 | } | |
179 | #endif |