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6c386655
JF
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
3
6c386655
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4#define FIRST_USER_ADDRESS 0
5
43cdf5d6
JS
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
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13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
9bf5a475 15#define _PAGE_BIT_PAT 7 /* on 4KB pages */
6c386655
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16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
17#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
18#define _PAGE_BIT_UNUSED2 10
19#define _PAGE_BIT_UNUSED3 11
9bf5a475 20#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
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21#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
22
4226ab93
JF
23#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
24#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
25#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
26#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
27#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
28#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
29#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
30#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
31#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
32#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
33#define _PAGE_UNUSED2 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED2)
34#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
35#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
36#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
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37
38#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
4226ab93 39#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
6c386655 40#else
4226ab93 41#define _PAGE_NX (_AT(pteval_t, 0))
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42#endif
43
44/* If _PAGE_PRESENT is clear, we use these: */
3cbaeafe
JP
45#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
46 * saved PTE; unset:swap */
6c386655
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47#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
48 pte_present gives true */
49
3cbaeafe
JP
50#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
51 _PAGE_ACCESSED | _PAGE_DIRTY)
52#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
53 _PAGE_DIRTY)
6c386655 54
86aaf4fd 55/* Set of bits not changed in pte_modify */
1c12c4cf
VP
56#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_PCD | _PAGE_PWT | \
57 _PAGE_ACCESSED | _PAGE_DIRTY)
6c386655 58
2e5d9c85 59#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
60#define _PAGE_CACHE_WB (0)
61#define _PAGE_CACHE_WC (_PAGE_PWT)
62#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
63#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
64
6c386655 65#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
3cbaeafe
JP
66#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
67 _PAGE_ACCESSED | _PAGE_NX)
68
69#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
70 _PAGE_USER | _PAGE_ACCESSED)
71#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
72 _PAGE_ACCESSED | _PAGE_NX)
73#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
74 _PAGE_ACCESSED)
6c386655 75#define PAGE_COPY PAGE_COPY_NOEXEC
3cbaeafe
JP
76#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED)
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80
81#ifdef CONFIG_X86_32
82#define _PAGE_KERNEL_EXEC \
83 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
84#define _PAGE_KERNEL (_PAGE_KERNEL_EXEC | _PAGE_NX)
85
86#ifndef __ASSEMBLY__
c93c82bb 87extern pteval_t __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
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88#endif /* __ASSEMBLY__ */
89#else
90#define __PAGE_KERNEL_EXEC \
91 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
92#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
93#endif
94
95#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
96#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
d2e626f4 97#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
b310f381 98#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
6c386655 99#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
d546b67a 100#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
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101#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
102#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
103#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
104#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
105
106#ifdef CONFIG_X86_32
107# define MAKE_GLOBAL(x) __pgprot((x))
108#else
109# define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
110#endif
111
112#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
113#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
114#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
115#define PAGE_KERNEL_RX MAKE_GLOBAL(__PAGE_KERNEL_RX)
b310f381 116#define PAGE_KERNEL_WC MAKE_GLOBAL(__PAGE_KERNEL_WC)
6c386655 117#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
d546b67a 118#define PAGE_KERNEL_UC_MINUS MAKE_GLOBAL(__PAGE_KERNEL_UC_MINUS)
d2e626f4 119#define PAGE_KERNEL_EXEC_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_EXEC_NOCACHE)
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120#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
121#define PAGE_KERNEL_LARGE_EXEC MAKE_GLOBAL(__PAGE_KERNEL_LARGE_EXEC)
122#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
123#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
124
125/* xwr */
126#define __P000 PAGE_NONE
127#define __P001 PAGE_READONLY
128#define __P010 PAGE_COPY
129#define __P011 PAGE_COPY
130#define __P100 PAGE_READONLY_EXEC
131#define __P101 PAGE_READONLY_EXEC
132#define __P110 PAGE_COPY_EXEC
133#define __P111 PAGE_COPY_EXEC
134
135#define __S000 PAGE_NONE
136#define __S001 PAGE_READONLY
137#define __S010 PAGE_SHARED
138#define __S011 PAGE_SHARED
139#define __S100 PAGE_READONLY_EXEC
140#define __S101 PAGE_READONLY_EXEC
141#define __S110 PAGE_SHARED_EXEC
142#define __S111 PAGE_SHARED_EXEC
143
4614139c 144#ifndef __ASSEMBLY__
195466dc 145
8405b122
JF
146/*
147 * ZERO_PAGE is a global shared page that is always zero: used
148 * for zero-mapped memory areas etc..
149 */
3cbaeafe 150extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
151#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
152
e3ed910d
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153extern spinlock_t pgd_lock;
154extern struct list_head pgd_list;
8405b122 155
4614139c
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156/*
157 * The following only work if pte_present() is true.
158 * Undefined behaviour if not..
159 */
3cbaeafe
JP
160static inline int pte_dirty(pte_t pte)
161{
a15af1c9 162 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
163}
164
165static inline int pte_young(pte_t pte)
166{
a15af1c9 167 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
168}
169
170static inline int pte_write(pte_t pte)
171{
a15af1c9 172 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
173}
174
175static inline int pte_file(pte_t pte)
176{
a15af1c9 177 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
178}
179
180static inline int pte_huge(pte_t pte)
181{
a15af1c9 182 return pte_flags(pte) & _PAGE_PSE;
4614139c
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183}
184
3cbaeafe
JP
185static inline int pte_global(pte_t pte)
186{
a15af1c9 187 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
188}
189
190static inline int pte_exec(pte_t pte)
191{
a15af1c9 192 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
193}
194
7e675137
NP
195static inline int pte_special(pte_t pte)
196{
197 return 0;
198}
199
3cbaeafe
JP
200static inline int pmd_large(pmd_t pte)
201{
202 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
203 (_PAGE_PSE | _PAGE_PRESENT);
204}
205
206static inline pte_t pte_mkclean(pte_t pte)
207{
4226ab93 208 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
3cbaeafe
JP
209}
210
211static inline pte_t pte_mkold(pte_t pte)
212{
4226ab93 213 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
3cbaeafe
JP
214}
215
216static inline pte_t pte_wrprotect(pte_t pte)
217{
4226ab93 218 return __pte(pte_val(pte) & ~_PAGE_RW);
3cbaeafe
JP
219}
220
221static inline pte_t pte_mkexec(pte_t pte)
222{
4226ab93 223 return __pte(pte_val(pte) & ~_PAGE_NX);
3cbaeafe
JP
224}
225
226static inline pte_t pte_mkdirty(pte_t pte)
227{
228 return __pte(pte_val(pte) | _PAGE_DIRTY);
229}
230
231static inline pte_t pte_mkyoung(pte_t pte)
232{
233 return __pte(pte_val(pte) | _PAGE_ACCESSED);
234}
235
236static inline pte_t pte_mkwrite(pte_t pte)
237{
238 return __pte(pte_val(pte) | _PAGE_RW);
239}
240
241static inline pte_t pte_mkhuge(pte_t pte)
242{
243 return __pte(pte_val(pte) | _PAGE_PSE);
244}
245
246static inline pte_t pte_clrhuge(pte_t pte)
247{
4226ab93 248 return __pte(pte_val(pte) & ~_PAGE_PSE);
3cbaeafe
JP
249}
250
251static inline pte_t pte_mkglobal(pte_t pte)
252{
253 return __pte(pte_val(pte) | _PAGE_GLOBAL);
254}
255
256static inline pte_t pte_clrglobal(pte_t pte)
257{
4226ab93 258 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
3cbaeafe 259}
4614139c 260
7e675137
NP
261static inline pte_t pte_mkspecial(pte_t pte)
262{
263 return pte;
264}
265
6fdc05d4
JF
266extern pteval_t __supported_pte_mask;
267
268static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
269{
270 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
271 pgprot_val(pgprot)) & __supported_pte_mask);
272}
273
274static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
275{
276 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
277 pgprot_val(pgprot)) & __supported_pte_mask);
278}
279
38472311
IM
280static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
281{
282 pteval_t val = pte_val(pte);
283
284 /*
285 * Chop off the NX bit (if present), and add the NX portion of
286 * the newprot (if present):
287 */
1c12c4cf
VP
288 val &= _PAGE_CHG_MASK;
289 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
38472311
IM
290
291 return __pte(val);
292}
293
1c12c4cf
VP
294/* mprotect needs to preserve PAT bits when updating vm_page_prot */
295#define pgprot_modify pgprot_modify
296static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
297{
298 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
299 pgprotval_t addbits = pgprot_val(newprot);
300 return __pgprot(preservebits | addbits);
301}
302
a15af1c9 303#define pte_pgprot(x) __pgprot(pte_flags(x) & ~PTE_MASK)
c6ca18eb 304
1e8e23bc
AK
305#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
306
f0970c13 307#ifndef __ASSEMBLY__
308#define __HAVE_PHYS_MEM_ACCESS_PROT
309struct file;
310pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
311 unsigned long size, pgprot_t vma_prot);
312int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
313 unsigned long size, pgprot_t *vma_prot);
314#endif
315
d494a961
JF
316/* Install a pte for a particular vaddr in kernel space. */
317void set_pte_vaddr(unsigned long vaddr, pte_t pte);
318
4891645e
JF
319#ifdef CONFIG_PARAVIRT
320#include <asm/paravirt.h>
321#else /* !CONFIG_PARAVIRT */
322#define set_pte(ptep, pte) native_set_pte(ptep, pte)
323#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
324
325#define set_pte_present(mm, addr, ptep, pte) \
326 native_set_pte_present(mm, addr, ptep, pte)
327#define set_pte_atomic(ptep, pte) \
328 native_set_pte_atomic(ptep, pte)
329
330#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
331
332#ifndef __PAGETABLE_PUD_FOLDED
333#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
334#define pgd_clear(pgd) native_pgd_clear(pgd)
335#endif
336
337#ifndef set_pud
338# define set_pud(pudp, pud) native_set_pud(pudp, pud)
339#endif
340
341#ifndef __PAGETABLE_PMD_FOLDED
342#define pud_clear(pud) native_pud_clear(pud)
343#endif
344
345#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
346#define pmd_clear(pmd) native_pmd_clear(pmd)
347
348#define pte_update(mm, addr, ptep) do { } while (0)
349#define pte_update_defer(mm, addr, ptep) do { } while (0)
350#endif /* CONFIG_PARAVIRT */
351
4614139c
JF
352#endif /* __ASSEMBLY__ */
353
96a388de
TG
354#ifdef CONFIG_X86_32
355# include "pgtable_32.h"
356#else
357# include "pgtable_64.h"
358#endif
6c386655 359
68db065c
JF
360#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
361#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
362
195466dc
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363#ifndef __ASSEMBLY__
364
30551bb3
TG
365enum {
366 PG_LEVEL_NONE,
367 PG_LEVEL_4K,
368 PG_LEVEL_2M,
86f03989 369 PG_LEVEL_1G,
ce0c0e50 370 PG_LEVEL_NUM
30551bb3
TG
371};
372
65280e61
TG
373#ifdef CONFIG_PROC_FS
374extern void update_page_count(int level, unsigned long pages);
375#else
376static inline void update_page_count(int level, unsigned long pages) { }
377#endif
ce0c0e50 378
0a663088
TG
379/*
380 * Helper function that returns the kernel pagetable entry controlling
381 * the virtual address 'address'. NULL means no pagetable entry present.
382 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
383 * as a pte too.
384 */
da7bfc50 385extern pte_t *lookup_address(unsigned long address, unsigned int *level);
0a663088 386
4891645e
JF
387/* local pte updates need not use xchg for locking */
388static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
389{
390 pte_t res = *ptep;
391
392 /* Pure native function needs no input for mm, addr */
393 native_pte_clear(NULL, 0, ptep);
394 return res;
395}
396
397static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
398 pte_t *ptep , pte_t pte)
399{
400 native_set_pte(ptep, pte);
401}
402
195466dc
JF
403#ifndef CONFIG_PARAVIRT
404/*
405 * Rules for using pte_update - it must be called after any PTE update which
406 * has not been done using the set_pte / clear_pte interfaces. It is used by
407 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
408 * updates should either be sets, clears, or set_pte_atomic for P->P
409 * transitions, which means this hook should only be called for user PTEs.
410 * This hook implies a P->P protection or access change has taken place, which
411 * requires a subsequent TLB flush. The notification can optionally be delayed
412 * until the TLB flush event by using the pte_update_defer form of the
413 * interface, but care must be taken to assure that the flush happens while
414 * still holding the same page table lock so that the shadow and primary pages
415 * do not become out of sync on SMP.
416 */
417#define pte_update(mm, addr, ptep) do { } while (0)
418#define pte_update_defer(mm, addr, ptep) do { } while (0)
419#endif
420
195466dc
JF
421/*
422 * We only update the dirty/accessed state if we set
423 * the dirty bit by hand in the kernel, since the hardware
424 * will do the accessed bit for us, and we don't want to
425 * race with other CPU's that might be updating the dirty
426 * bit at the same time.
427 */
428#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
429extern int ptep_set_access_flags(struct vm_area_struct *vma,
430 unsigned long address, pte_t *ptep,
431 pte_t entry, int dirty);
195466dc
JF
432
433#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
434extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
435 unsigned long addr, pte_t *ptep);
195466dc
JF
436
437#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
438extern int ptep_clear_flush_young(struct vm_area_struct *vma,
439 unsigned long address, pte_t *ptep);
195466dc
JF
440
441#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
442static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
443 pte_t *ptep)
195466dc
JF
444{
445 pte_t pte = native_ptep_get_and_clear(ptep);
446 pte_update(mm, addr, ptep);
447 return pte;
448}
449
450#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
451static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
452 unsigned long addr, pte_t *ptep,
453 int full)
195466dc
JF
454{
455 pte_t pte;
456 if (full) {
457 /*
458 * Full address destruction in progress; paravirt does not
459 * care about updates and native needs no locking
460 */
461 pte = native_local_ptep_get_and_clear(ptep);
462 } else {
463 pte = ptep_get_and_clear(mm, addr, ptep);
464 }
465 return pte;
466}
467
468#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
469static inline void ptep_set_wrprotect(struct mm_struct *mm,
470 unsigned long addr, pte_t *ptep)
195466dc 471{
d8d89827 472 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
473 pte_update(mm, addr, ptep);
474}
475
85958b46
JF
476/*
477 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
478 *
479 * dst - pointer to pgd range anwhere on a pgd page
480 * src - ""
481 * count - the number of pgds to copy.
482 *
483 * dst and src can be on the same page, but the range must not overlap,
484 * and must not cross a page boundary.
485 */
486static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
487{
488 memcpy(dst, src, count * sizeof(pgd_t));
489}
490
491
195466dc
JF
492#include <asm-generic/pgtable.h>
493#endif /* __ASSEMBLY__ */
494
6c386655 495#endif /* _ASM_X86_PGTABLE_H */