x86/cpu: Sanitize FAM6_ATOM naming

[mirror_ubuntu-bionic-kernel.git] / arch / x86 / include / asm / intel-family.h

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index cf090e584202259e5480af9e3248aa03f6f79873..d21401b69a3314de40ead158123abab6956054a2 100644 (file)
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -8,9 +8,6 @@
  * The "_X" parts are generally the EP and EX Xeons, or the
  * "Extreme" ones, like Broadwell-E.
  *
- * Things ending in "2" are usually because we have no better
- * name for them.  There's no processor called "SILVERMONT2".
- *
  * While adding a new CPUID for a new microarchitecture, add a new
  * group to keep logically sorted out in chronological order. Within
  * that group keep the CPUID for the variants sorted by model number.
@@ -57,19 +54,23 @@
 
 /* "Small Core" Processors (Atom) */
 
-#define INTEL_FAM6_ATOM_PINEVIEW       0x1C
-#define INTEL_FAM6_ATOM_LINCROFT       0x26
-#define INTEL_FAM6_ATOM_PENWELL                0x27
-#define INTEL_FAM6_ATOM_CLOVERVIEW     0x35
-#define INTEL_FAM6_ATOM_CEDARVIEW      0x36
-#define INTEL_FAM6_ATOM_SILVERMONT1    0x37 /* BayTrail/BYT / Valleyview */
-#define INTEL_FAM6_ATOM_SILVERMONT2    0x4D /* Avaton/Rangely */
-#define INTEL_FAM6_ATOM_AIRMONT                0x4C /* CherryTrail / Braswell */
-#define INTEL_FAM6_ATOM_MERRIFIELD     0x4A /* Tangier */
-#define INTEL_FAM6_ATOM_MOOREFIELD     0x5A /* Anniedale */
-#define INTEL_FAM6_ATOM_GOLDMONT       0x5C
-#define INTEL_FAM6_ATOM_DENVERTON      0x5F /* Goldmont Microserver */
-#define INTEL_FAM6_ATOM_GEMINI_LAKE    0x7A
+#define INTEL_FAM6_ATOM_BONNELL                0x1C /* Diamondville, Pineview */
+#define INTEL_FAM6_ATOM_BONNELL_MID    0x26 /* Silverthorne, Lincroft */
+
+#define INTEL_FAM6_ATOM_SALTWELL       0x36 /* Cedarview */
+#define INTEL_FAM6_ATOM_SALTWELL_MID   0x27 /* Penwell */
+#define INTEL_FAM6_ATOM_SALTWELL_TABLET        0x35 /* Cloverview */
+
+#define INTEL_FAM6_ATOM_SILVERMONT     0x37 /* Bay Trail, Valleyview */
+#define INTEL_FAM6_ATOM_SILVERMONT_X   0x4D /* Avaton, Rangely */
+#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
+
+#define INTEL_FAM6_ATOM_AIRMONT                0x4C /* Cherry Trail, Braswell */
+#define INTEL_FAM6_ATOM_AIRMONT_MID    0x5A /* Moorefield */
+
+#define INTEL_FAM6_ATOM_GOLDMONT       0x5C /* Apollo Lake */
+#define INTEL_FAM6_ATOM_GOLDMONT_X     0x5F /* Denverton */
+#define INTEL_FAM6_ATOM_GOLDMONT_PLUS  0x7A /* Gemini Lake */
 
 /* Xeon Phi */