drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54b5d4c582b610b0164e151a1786b683ebc00618..eaba810a928e8d19004a1a56f1aac21a4f152e89 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1231,6 +1231,7 @@ enum intel_sbi_destination {
 #define QUIRK_BACKLIGHT_PRESENT (1<<3)
 #define QUIRK_PIN_SWIZZLED_PAGES (1<<5)
 #define QUIRK_INCREASE_T12_DELAY (1<<6)
+#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
 
 struct intel_fbdev;
 struct intel_fbc_work;
@@ -2357,6 +2358,8 @@ struct drm_i915_private {
                struct intel_cdclk_state actual;
                /* The current hardware cdclk state */
                struct intel_cdclk_state hw;
+
+               int force_min_cdclk;
        } cdclk;
 
        /**
@@ -2368,6 +2371,9 @@ struct drm_i915_private {
         */
        struct workqueue_struct *wq;
 
+       /* ordered wq for modesets */
+       struct workqueue_struct *modeset_wq;
+
        /* Display functions */
        struct drm_i915_display_funcs display;
 
@@ -2474,6 +2480,7 @@ struct drm_i915_private {
         *
         */
        struct mutex av_mutex;
+       int audio_power_refcount;
 
        struct {
                struct list_head list;
@@ -2501,7 +2508,7 @@ struct drm_i915_private {
        u32 bxt_phy_grc;
 
        u32 suspend_count;
-       bool suspended_to_idle;
+       bool power_domains_suspended;
        struct i915_suspend_saved_registers regfile;
        struct vlv_s0ix_state vlv_s0ix_state;
 
@@ -2742,6 +2749,9 @@ struct drm_i915_private {
 
        bool ipc_enabled;
 
+       /* Hack to bypass TMDS_OE write on DP->HDMI dongle */
+       bool bypass_tmds_oe;
+
        /* Used to save the pipe-to-encoder mapping for audio */
        struct intel_encoder *av_enc_map[I915_MAX_PIPES];
 
@@ -4137,7 +4147,11 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
                                            struct intel_display_error_state *error);
 
 int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);
-int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);
+int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, u32 mbox,
+                                   u32 val, int timeout_us);
+#define sandybridge_pcode_write(dev_priv, mbox, val)   \
+       sandybridge_pcode_write_timeout(dev_priv, mbox, val, 500)
+
 int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request,
                      u32 reply_mask, u32 reply, int timeout_base_ms);