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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 low-level entry points. |
3 | * | |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2012 |
1da177e4 | 5 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
6 | * Hartmut Penner (hp@de.ibm.com), |
7 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 8 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
9 | */ |
10 | ||
2bc89b5e | 11 | #include <linux/init.h> |
144d634a | 12 | #include <linux/linkage.h> |
eb608fb3 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
eb546195 | 21 | #include <asm/sigp.h> |
1f44a225 | 22 | #include <asm/irq.h> |
9977e886 | 23 | #include <asm/vx-insn.h> |
83abeffb HB |
24 | #include <asm/setup.h> |
25 | #include <asm/nmi.h> | |
711f5df7 | 26 | #include <asm/export.h> |
1da177e4 | 27 | |
c5328901 MS |
28 | __PT_R0 = __PT_GPRS |
29 | __PT_R1 = __PT_GPRS + 8 | |
30 | __PT_R2 = __PT_GPRS + 16 | |
31 | __PT_R3 = __PT_GPRS + 24 | |
32 | __PT_R4 = __PT_GPRS + 32 | |
33 | __PT_R5 = __PT_GPRS + 40 | |
34 | __PT_R6 = __PT_GPRS + 48 | |
35 | __PT_R7 = __PT_GPRS + 56 | |
36 | __PT_R8 = __PT_GPRS + 64 | |
37 | __PT_R9 = __PT_GPRS + 72 | |
38 | __PT_R10 = __PT_GPRS + 80 | |
39 | __PT_R11 = __PT_GPRS + 88 | |
40 | __PT_R12 = __PT_GPRS + 96 | |
41 | __PT_R13 = __PT_GPRS + 104 | |
42 | __PT_R14 = __PT_GPRS + 112 | |
43 | __PT_R15 = __PT_GPRS + 120 | |
1da177e4 LT |
44 | |
45 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
46 | STACK_SIZE = 1 << STACK_SHIFT | |
dc7ee00d | 47 | STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE |
1da177e4 | 48 | |
2a0a5b22 JW |
49 | _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
50 | _TIF_UPROBE) | |
d3a73acb MS |
51 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
52 | _TIF_SYSCALL_TRACEPOINT) | |
9977e886 | 53 | _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU) |
d3a73acb | 54 | _PIF_WORK = (_PIF_PER_TRAP) |
1da177e4 | 55 | |
9977e886 | 56 | #define BASED(name) name-cleanup_critical(%r13) |
1da177e4 | 57 | |
1f194a4c | 58 | .macro TRACE_IRQS_ON |
c5328901 | 59 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
60 | basr %r2,%r0 |
61 | brasl %r14,trace_hardirqs_on_caller | |
c5328901 | 62 | #endif |
1f194a4c HC |
63 | .endm |
64 | ||
65 | .macro TRACE_IRQS_OFF | |
c5328901 | 66 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
67 | basr %r2,%r0 |
68 | brasl %r14,trace_hardirqs_off_caller | |
411788ea | 69 | #endif |
c5328901 | 70 | .endm |
411788ea | 71 | |
411788ea | 72 | .macro LOCKDEP_SYS_EXIT |
c5328901 MS |
73 | #ifdef CONFIG_LOCKDEP |
74 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
75 | jz .+10 | |
411788ea | 76 | brasl %r14,lockdep_sys_exit |
1f194a4c | 77 | #endif |
1da177e4 | 78 | .endm |
1da177e4 | 79 | |
c5328901 | 80 | .macro CHECK_STACK stacksize,savearea |
63b12246 | 81 | #ifdef CONFIG_CHECK_STACK |
c5328901 MS |
82 | tml %r15,\stacksize - CONFIG_STACK_GUARD |
83 | lghi %r14,\savearea | |
84 | jz stack_overflow | |
63b12246 | 85 | #endif |
63b12246 MS |
86 | .endm |
87 | ||
2acb94f4 | 88 | .macro SWITCH_ASYNC savearea,timer |
c5328901 MS |
89 | tmhh %r8,0x0001 # interrupting from user ? |
90 | jnz 1f | |
91 | lgr %r14,%r9 | |
92 | slg %r14,BASED(.Lcritical_start) | |
93 | clg %r14,BASED(.Lcritical_length) | |
1da177e4 | 94 | jhe 0f |
c5328901 | 95 | lghi %r11,\savearea # inside critical section, do cleanup |
1da177e4 | 96 | brasl %r14,cleanup_critical |
c5328901 | 97 | tmhh %r8,0x0001 # retest problem state after cleanup |
1da177e4 | 98 | jnz 1f |
2acb94f4 | 99 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? |
1da177e4 | 100 | slgr %r14,%r15 |
2acb94f4 | 101 | srag %r14,%r14,STACK_SHIFT |
a359bb11 | 102 | jnz 2f |
2acb94f4 | 103 | CHECK_STACK 1<<STACK_SHIFT,\savearea |
dc7ee00d | 104 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
a359bb11 MS |
105 | j 3f |
106 | 1: LAST_BREAK %r14 | |
107 | UPDATE_VTIME %r14,%r15,\timer | |
2acb94f4 | 108 | 2: lg %r15,__LC_ASYNC_STACK # load async stack |
a359bb11 | 109 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
25d83cbf | 110 | .endm |
1da177e4 | 111 | |
a359bb11 MS |
112 | .macro UPDATE_VTIME w1,w2,enter_timer |
113 | lg \w1,__LC_EXIT_TIMER | |
114 | lg \w2,__LC_LAST_UPDATE_TIMER | |
115 | slg \w1,\enter_timer | |
116 | slg \w2,__LC_EXIT_TIMER | |
117 | alg \w1,__LC_USER_TIMER | |
118 | alg \w2,__LC_SYSTEM_TIMER | |
119 | stg \w1,__LC_USER_TIMER | |
120 | stg \w2,__LC_SYSTEM_TIMER | |
c5328901 | 121 | mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer |
1da177e4 LT |
122 | .endm |
123 | ||
c5328901 MS |
124 | .macro LAST_BREAK scratch |
125 | srag \scratch,%r10,23 | |
126 | jz .+10 | |
ef280c85 MS |
127 | #ifdef CONFIG_HAVE_MARCH_Z990_FEATURES |
128 | stg %r10,__TASK_thread+__THREAD_last_break(%r12) | |
129 | #else | |
130 | lghi \scratch,__TASK_thread | |
131 | stg %r10,__THREAD_last_break(\scratch,%r12) | |
132 | #endif | |
86f2552b MS |
133 | .endm |
134 | ||
1e54622e | 135 | .macro REENABLE_IRQS |
c5328901 MS |
136 | stg %r8,__LC_RETURN_PSW |
137 | ni __LC_RETURN_PSW,0xbf | |
138 | ssm __LC_RETURN_PSW | |
1e54622e MS |
139 | .endm |
140 | ||
473e66ba | 141 | .macro STCK savearea |
d652d596 | 142 | #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES |
473e66ba HC |
143 | .insn s,0xb27c0000,\savearea # store clock fast |
144 | #else | |
145 | .insn s,0xb2050000,\savearea # store clock | |
146 | #endif | |
147 | .endm | |
148 | ||
83abeffb HB |
149 | /* |
150 | * The TSTMSK macro generates a test-under-mask instruction by | |
151 | * calculating the memory offset for the specified mask value. | |
152 | * Mask value can be any constant. The macro shifts the mask | |
153 | * value to calculate the memory offset for the test-under-mask | |
154 | * instruction. | |
155 | */ | |
156 | .macro TSTMSK addr, mask, size=8, bytepos=0 | |
157 | .if (\bytepos < \size) && (\mask >> 8) | |
158 | .if (\mask & 0xff) | |
159 | .error "Mask exceeds byte boundary" | |
160 | .endif | |
161 | TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" | |
162 | .exitm | |
163 | .endif | |
164 | .ifeq \mask | |
165 | .error "Mask must not be zero" | |
166 | .endif | |
167 | off = \size - \bytepos - 1 | |
168 | tm off+\addr, \mask | |
169 | .endm | |
170 | ||
860dba45 | 171 | .section .kprobes.text, "ax" |
46210c44 HC |
172 | .Ldummy: |
173 | /* | |
174 | * This nop exists only in order to avoid that __switch_to starts at | |
175 | * the beginning of the kprobes text section. In that case we would | |
176 | * have several symbols at the same address. E.g. objdump would take | |
177 | * an arbitrary symbol name when disassembling this code. | |
178 | * With the added nop in between the __switch_to symbol is unique | |
179 | * again. | |
180 | */ | |
181 | nop 0 | |
860dba45 | 182 | |
1da177e4 LT |
183 | /* |
184 | * Scheduler resume function, called by switch_to | |
185 | * gpr2 = (task_struct *) prev | |
186 | * gpr3 = (task_struct *) next | |
187 | * Returns: | |
188 | * gpr2 = prev | |
189 | */ | |
144d634a | 190 | ENTRY(__switch_to) |
eda0c6d6 | 191 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
3827ec3d MS |
192 | lgr %r1,%r2 |
193 | aghi %r1,__TASK_thread # thread_struct of prev task | |
d5c352cd | 194 | lg %r5,__TASK_stack(%r3) # start of kernel stack of next |
3827ec3d MS |
195 | stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev |
196 | lgr %r1,%r3 | |
197 | aghi %r1,__TASK_thread # thread_struct of next task | |
eda0c6d6 | 198 | lgr %r15,%r5 |
dc7ee00d | 199 | aghi %r15,STACK_INIT # end of kernel stack of next |
eda0c6d6 | 200 | stg %r3,__LC_CURRENT # store task struct of next |
eda0c6d6 | 201 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack |
3827ec3d | 202 | lg %r15,__THREAD_ksp(%r1) # load kernel stack of next |
b1685ab9 | 203 | /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */ |
eda0c6d6 | 204 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 |
e22cf8ca | 205 | mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next |
d3a73acb | 206 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
e22cf8ca CB |
207 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
208 | bzr %r14 | |
209 | .insn s,0xb2800000,__LC_LPP # set program parameter | |
1da177e4 LT |
210 | br %r14 |
211 | ||
86ed42f4 | 212 | .L__critical_start: |
d0fc4107 MS |
213 | |
214 | #if IS_ENABLED(CONFIG_KVM) | |
215 | /* | |
216 | * sie64a calling convention: | |
217 | * %r2 pointer to sie control block | |
218 | * %r3 guest register save area | |
219 | */ | |
220 | ENTRY(sie64a) | |
221 | stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers | |
222 | stg %r2,__SF_EMPTY(%r15) # save control block pointer | |
223 | stg %r3,__SF_EMPTY+8(%r15) # save guest register save area | |
e22cf8ca | 224 | xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 |
83abeffb | 225 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? |
d0fc4107 | 226 | jno .Lsie_load_guest_gprs |
d0fc4107 MS |
227 | brasl %r14,load_fpu_regs # load guest fp/vx regs |
228 | .Lsie_load_guest_gprs: | |
229 | lmg %r0,%r13,0(%r3) # load guest gprs 0-13 | |
230 | lg %r14,__LC_GMAP # get gmap pointer | |
231 | ltgr %r14,%r14 | |
232 | jz .Lsie_gmap | |
233 | lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce | |
234 | .Lsie_gmap: | |
235 | lg %r14,__SF_EMPTY(%r15) # get control block pointer | |
236 | oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now | |
237 | tm __SIE_PROG20+3(%r14),3 # last exit... | |
238 | jnz .Lsie_skip | |
83abeffb | 239 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
d0fc4107 | 240 | jo .Lsie_skip # exit if fp/vx regs changed |
d0fc4107 | 241 | sie 0(%r14) |
d0fc4107 MS |
242 | .Lsie_skip: |
243 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
244 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
245 | .Lsie_done: | |
246 | # some program checks are suppressing. C code (e.g. do_protection_exception) | |
247 | # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other | |
248 | # instructions between sie64a and .Lsie_done should not cause program | |
249 | # interrupts. So lets use a nop (47 00 00 00) as a landing pad. | |
250 | # See also .Lcleanup_sie | |
251 | .Lrewind_pad: | |
252 | nop 0 | |
253 | .globl sie_exit | |
254 | sie_exit: | |
255 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area | |
256 | stmg %r0,%r13,0(%r14) # save guest gprs 0-13 | |
257 | lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers | |
e22cf8ca | 258 | lg %r2,__SF_EMPTY+16(%r15) # return exit reason code |
d0fc4107 MS |
259 | br %r14 |
260 | .Lsie_fault: | |
261 | lghi %r14,-EFAULT | |
e22cf8ca | 262 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
d0fc4107 MS |
263 | j sie_exit |
264 | ||
265 | EX_TABLE(.Lrewind_pad,.Lsie_fault) | |
266 | EX_TABLE(sie_exit,.Lsie_fault) | |
711f5df7 AV |
267 | EXPORT_SYMBOL(sie64a) |
268 | EXPORT_SYMBOL(sie_exit) | |
d0fc4107 MS |
269 | #endif |
270 | ||
1da177e4 LT |
271 | /* |
272 | * SVC interrupt handler routine. System calls are synchronous events and | |
273 | * are executed with interrupts enabled. | |
274 | */ | |
275 | ||
144d634a | 276 | ENTRY(system_call) |
c185b783 | 277 | stpt __LC_SYNC_ENTER_TIMER |
86ed42f4 | 278 | .Lsysc_stmg: |
c5328901 MS |
279 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
280 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 281 | lg %r12,__LC_CURRENT |
d3a73acb | 282 | lghi %r14,_PIF_SYSCALL |
86ed42f4 | 283 | .Lsysc_per: |
c5328901 | 284 | lg %r15,__LC_KERNEL_STACK |
c5328901 | 285 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
c5328901 | 286 | LAST_BREAK %r13 |
a359bb11 MS |
287 | .Lsysc_vtime: |
288 | UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER | |
c5328901 MS |
289 | stmg %r0,%r7,__PT_R0(%r11) |
290 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
291 | mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW | |
aa33c8cb | 292 | mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC |
d3a73acb | 293 | stg %r14,__PT_FLAGS(%r11) |
86ed42f4 | 294 | .Lsysc_do_svc: |
ef280c85 MS |
295 | # load address of system call table |
296 | #ifdef CONFIG_HAVE_MARCH_Z990_FEATURES | |
297 | lg %r10,__TASK_thread+__THREAD_sysc_table(%r12) | |
298 | #else | |
299 | lghi %r13,__TASK_thread | |
300 | lg %r10,__THREAD_sysc_table(%r13,%r12) | |
301 | #endif | |
aa33c8cb | 302 | llgh %r8,__PT_INT_CODE+2(%r11) |
c5328901 | 303 | slag %r8,%r8,2 # shift and test for svc 0 |
86ed42f4 | 304 | jnz .Lsysc_nr_ok |
1da177e4 | 305 | # svc 0: system call number in %r1 |
c5328901 | 306 | llgfr %r1,%r1 # clear high word in r1 |
86f2552b | 307 | cghi %r1,NR_syscalls |
86ed42f4 | 308 | jnl .Lsysc_nr_ok |
aa33c8cb | 309 | sth %r1,__PT_INT_CODE+2(%r11) |
c5328901 | 310 | slag %r8,%r1,2 |
86ed42f4 | 311 | .Lsysc_nr_ok: |
c5328901 MS |
312 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
313 | stg %r2,__PT_ORIG_GPR2(%r11) | |
314 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
315 | lgf %r9,0(%r8,%r10) # get system call add. | |
83abeffb | 316 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 317 | jnz .Lsysc_tracesys |
c5328901 MS |
318 | basr %r14,%r9 # call sys_xxxx |
319 | stg %r2,__PT_R2(%r11) # store return value | |
1da177e4 | 320 | |
86ed42f4 | 321 | .Lsysc_return: |
6a2df3a8 | 322 | LOCKDEP_SYS_EXIT |
86ed42f4 | 323 | .Lsysc_tif: |
83abeffb | 324 | TSTMSK __PT_FLAGS(%r11),_PIF_WORK |
86ed42f4 | 325 | jnz .Lsysc_work |
83abeffb | 326 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 327 | jnz .Lsysc_work # check for work |
83abeffb | 328 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
329 | jnz .Lsysc_work |
330 | .Lsysc_restore: | |
c5328901 MS |
331 | lg %r14,__LC_VDSO_PER_CPU |
332 | lmg %r0,%r10,__PT_R0(%r11) | |
333 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
334 | stpt __LC_EXIT_TIMER | |
335 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
336 | lmg %r11,%r15,__PT_R11(%r11) | |
337 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 338 | .Lsysc_done: |
411788ea | 339 | |
43d399d2 MS |
340 | # |
341 | # One of the work bits is on. Find out which one. | |
342 | # | |
86ed42f4 | 343 | .Lsysc_work: |
83abeffb | 344 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 345 | jo .Lsysc_mcck_pending |
83abeffb | 346 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 347 | jo .Lsysc_reschedule |
2a0a5b22 | 348 | #ifdef CONFIG_UPROBES |
83abeffb | 349 | TSTMSK __TI_flags(%r12),_TIF_UPROBE |
86ed42f4 | 350 | jo .Lsysc_uprobe_notify |
2a0a5b22 | 351 | #endif |
83abeffb | 352 | TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP |
86ed42f4 | 353 | jo .Lsysc_singlestep |
83abeffb | 354 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 355 | jo .Lsysc_sigpending |
83abeffb | 356 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 357 | jo .Lsysc_notify_resume |
83abeffb | 358 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 359 | jo .Lsysc_vxrs |
83abeffb | 360 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
361 | jo .Lsysc_uaccess |
362 | j .Lsysc_return # beware of critical section cleanup | |
1da177e4 LT |
363 | |
364 | # | |
365 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 366 | # |
86ed42f4 MS |
367 | .Lsysc_reschedule: |
368 | larl %r14,.Lsysc_return | |
c5328901 | 369 | jg schedule |
1da177e4 | 370 | |
77fa2245 | 371 | # |
d3a73acb | 372 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 373 | # |
86ed42f4 MS |
374 | .Lsysc_mcck_pending: |
375 | larl %r14,.Lsysc_return | |
25d83cbf | 376 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 377 | |
457f2180 | 378 | # |
d3a73acb | 379 | # _CIF_ASCE is set, load user space asce |
457f2180 | 380 | # |
86ed42f4 | 381 | .Lsysc_uaccess: |
d3a73acb | 382 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 383 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 384 | j .Lsysc_return |
457f2180 | 385 | |
9977e886 HB |
386 | # |
387 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
388 | # | |
389 | .Lsysc_vxrs: | |
390 | larl %r14,.Lsysc_return | |
391 | jg load_fpu_regs | |
392 | ||
1da177e4 | 393 | # |
02a029b3 | 394 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 395 | # |
86ed42f4 | 396 | .Lsysc_sigpending: |
c5328901 MS |
397 | lgr %r2,%r11 # pass pointer to pt_regs |
398 | brasl %r14,do_signal | |
83abeffb | 399 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
86ed42f4 | 400 | jno .Lsysc_return |
c5328901 MS |
401 | lmg %r2,%r7,__PT_R2(%r11) # load svc arguments |
402 | lghi %r8,0 # svc 0 returns -ENOSYS | |
450e47da | 403 | llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number |
b6ef5bb3 | 404 | cghi %r1,NR_syscalls |
86ed42f4 | 405 | jnl .Lsysc_nr_ok # invalid svc number -> do svc 0 |
c5328901 | 406 | slag %r8,%r1,2 |
86ed42f4 | 407 | j .Lsysc_nr_ok # restart svc |
1da177e4 | 408 | |
753c4dd6 MS |
409 | # |
410 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
411 | # | |
86ed42f4 | 412 | .Lsysc_notify_resume: |
c5328901 | 413 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 414 | larl %r14,.Lsysc_return |
c5328901 | 415 | jg do_notify_resume |
753c4dd6 | 416 | |
2a0a5b22 JW |
417 | # |
418 | # _TIF_UPROBE is set, call uprobe_notify_resume | |
419 | # | |
420 | #ifdef CONFIG_UPROBES | |
86ed42f4 | 421 | .Lsysc_uprobe_notify: |
2a0a5b22 | 422 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 423 | larl %r14,.Lsysc_return |
2a0a5b22 JW |
424 | jg uprobe_notify_resume |
425 | #endif | |
426 | ||
1da177e4 | 427 | # |
d3a73acb | 428 | # _PIF_PER_TRAP is set, call do_per_trap |
1da177e4 | 429 | # |
86ed42f4 | 430 | .Lsysc_singlestep: |
d3a73acb | 431 | ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP |
c5328901 | 432 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 433 | larl %r14,.Lsysc_return |
5e9a2692 | 434 | jg do_per_trap |
1da177e4 | 435 | |
1da177e4 | 436 | # |
753c4dd6 MS |
437 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
438 | # and after the system call | |
1da177e4 | 439 | # |
86ed42f4 | 440 | .Lsysc_tracesys: |
c5328901 | 441 | lgr %r2,%r11 # pass pointer to pt_regs |
1da177e4 | 442 | la %r3,0 |
aa33c8cb | 443 | llgh %r0,__PT_INT_CODE+2(%r11) |
c5328901 | 444 | stg %r0,__PT_R2(%r11) |
753c4dd6 | 445 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 446 | lghi %r0,NR_syscalls |
753c4dd6 | 447 | clgr %r0,%r2 |
86ed42f4 | 448 | jnh .Lsysc_tracenogo |
c5328901 MS |
449 | sllg %r8,%r2,2 |
450 | lgf %r9,0(%r8,%r10) | |
86ed42f4 | 451 | .Lsysc_tracego: |
c5328901 MS |
452 | lmg %r3,%r7,__PT_R3(%r11) |
453 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
454 | lg %r2,__PT_ORIG_GPR2(%r11) | |
455 | basr %r14,%r9 # call sys_xxx | |
456 | stg %r2,__PT_R2(%r11) # store return value | |
86ed42f4 | 457 | .Lsysc_tracenogo: |
83abeffb | 458 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 459 | jz .Lsysc_return |
c5328901 | 460 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 461 | larl %r14,.Lsysc_return |
753c4dd6 | 462 | jg do_syscall_trace_exit |
1da177e4 LT |
463 | |
464 | # | |
465 | # a new process exits the kernel with ret_from_fork | |
466 | # | |
144d634a | 467 | ENTRY(ret_from_fork) |
c5328901 | 468 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
d5c352cd | 469 | lg %r12,__LC_CURRENT |
37fe5d41 AV |
470 | brasl %r14,schedule_tail |
471 | TRACE_IRQS_ON | |
472 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
30dcb099 | 473 | tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? |
86ed42f4 | 474 | jne .Lsysc_tracenogo |
30dcb099 AV |
475 | # it's a kernel thread |
476 | lmg %r9,%r10,__PT_R9(%r11) # load gprs | |
37fe5d41 AV |
477 | ENTRY(kernel_thread_starter) |
478 | la %r2,0(%r10) | |
479 | basr %r14,%r9 | |
86ed42f4 | 480 | j .Lsysc_tracenogo |
1da177e4 LT |
481 | |
482 | /* | |
483 | * Program check handler routine | |
484 | */ | |
485 | ||
144d634a | 486 | ENTRY(pgm_check_handler) |
c185b783 | 487 | stpt __LC_SYNC_ENTER_TIMER |
c5328901 MS |
488 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
489 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 490 | lg %r12,__LC_CURRENT |
9977e886 | 491 | larl %r13,cleanup_critical |
c5328901 | 492 | lmg %r8,%r9,__LC_PGM_OLD_PSW |
c5328901 | 493 | tmhh %r8,0x0001 # test problem state bit |
d0fc4107 MS |
494 | jnz 2f # -> fault in user space |
495 | #if IS_ENABLED(CONFIG_KVM) | |
496 | # cleanup critical section for sie64a | |
497 | lgr %r14,%r9 | |
498 | slg %r14,BASED(.Lsie_critical_start) | |
499 | clg %r14,BASED(.Lsie_critical_length) | |
500 | jhe 0f | |
501 | brasl %r14,.Lcleanup_sie | |
502 | #endif | |
503 | 0: tmhh %r8,0x4000 # PER bit set in old PSW ? | |
504 | jnz 1f # -> enabled, can't be a double fault | |
c5328901 | 505 | tm __LC_PGM_ILC+3,0x80 # check for per exception |
86ed42f4 | 506 | jnz .Lpgm_svcper # -> single stepped svc |
d0fc4107 | 507 | 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC |
dc7ee00d | 508 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
d0fc4107 | 509 | j 3f |
a359bb11 MS |
510 | 2: LAST_BREAK %r14 |
511 | UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER | |
c5328901 | 512 | lg %r15,__LC_KERNEL_STACK |
d5c352cd | 513 | lgr %r14,%r12 |
3827ec3d | 514 | aghi %r14,__TASK_thread # pointer to thread_struct |
d35339a4 MS |
515 | lghi %r13,__LC_PGM_TDB |
516 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort | |
d0fc4107 | 517 | jz 3f |
d35339a4 | 518 | mvc __THREAD_trap_tdb(256,%r14),0(%r13) |
d0fc4107 | 519 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
c5328901 MS |
520 | stmg %r0,%r7,__PT_R0(%r11) |
521 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
522 | stmg %r8,%r9,__PT_PSW(%r11) | |
aa33c8cb MS |
523 | mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC |
524 | mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE | |
d3a73acb | 525 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
526 | stg %r10,__PT_ARGS(%r11) |
527 | tm __LC_PGM_ILC+3,0x80 # check for per exception | |
d0fc4107 | 528 | jz 4f |
c5328901 | 529 | tmhh %r8,0x0001 # kernel per event ? |
86ed42f4 | 530 | jz .Lpgm_kprobe |
d3a73acb | 531 | oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP |
d35339a4 | 532 | mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS |
21ee7ffd JF |
533 | mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE |
534 | mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID | |
d0fc4107 | 535 | 4: REENABLE_IRQS |
c5328901 | 536 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
f5cdac27 | 537 | larl %r1,pgm_check_table |
aa33c8cb MS |
538 | llgh %r10,__PT_INT_CODE+2(%r11) |
539 | nill %r10,0x007f | |
b01a37a7 | 540 | sll %r10,2 |
a359bb11 | 541 | je .Lpgm_return |
b01a37a7 | 542 | lgf %r1,0(%r10,%r1) # load address of handler routine |
c5328901 | 543 | lgr %r2,%r11 # pass pointer to pt_regs |
f5cdac27 | 544 | basr %r14,%r1 # branch to interrupt-handler |
a359bb11 MS |
545 | .Lpgm_return: |
546 | LOCKDEP_SYS_EXIT | |
547 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
548 | jno .Lsysc_restore | |
549 | j .Lsysc_tif | |
1da177e4 LT |
550 | |
551 | # | |
c5328901 | 552 | # PER event in supervisor state, must be kprobes |
1da177e4 | 553 | # |
86ed42f4 | 554 | .Lpgm_kprobe: |
c5328901 MS |
555 | REENABLE_IRQS |
556 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
557 | lgr %r2,%r11 # pass pointer to pt_regs | |
558 | brasl %r14,do_per_trap | |
a359bb11 | 559 | j .Lpgm_return |
1da177e4 | 560 | |
4ba069b8 | 561 | # |
c5328901 | 562 | # single stepped system call |
4ba069b8 | 563 | # |
86ed42f4 | 564 | .Lpgm_svcper: |
c5328901 | 565 | mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW |
86ed42f4 | 566 | larl %r14,.Lsysc_per |
c5328901 | 567 | stg %r14,__LC_RETURN_PSW+8 |
d3a73acb | 568 | lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP |
86ed42f4 | 569 | lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs |
4ba069b8 | 570 | |
1da177e4 LT |
571 | /* |
572 | * IO interrupt handler routine | |
573 | */ | |
144d634a | 574 | ENTRY(io_int_handler) |
473e66ba | 575 | STCK __LC_INT_CLOCK |
9cfb9b3c | 576 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
577 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
578 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 579 | lg %r12,__LC_CURRENT |
9977e886 | 580 | larl %r13,cleanup_critical |
c5328901 | 581 | lmg %r8,%r9,__LC_IO_OLD_PSW |
2acb94f4 | 582 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
583 | stmg %r0,%r7,__PT_R0(%r11) |
584 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
585 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c | 586 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
d3a73acb | 587 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
588 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
589 | jo .Lio_restore | |
1f194a4c | 590 | TRACE_IRQS_OFF |
c5328901 | 591 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
86ed42f4 | 592 | .Lio_loop: |
c5328901 | 593 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
594 | lghi %r3,IO_INTERRUPT |
595 | tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? | |
86ed42f4 | 596 | jz .Lio_call |
1f44a225 | 597 | lghi %r3,THIN_INTERRUPT |
86ed42f4 | 598 | .Lio_call: |
c5328901 | 599 | brasl %r14,do_IRQ |
83abeffb | 600 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR |
86ed42f4 | 601 | jz .Lio_return |
48f6b00c | 602 | tpi 0 |
86ed42f4 | 603 | jz .Lio_return |
48f6b00c | 604 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
86ed42f4 MS |
605 | j .Lio_loop |
606 | .Lio_return: | |
6a2df3a8 MS |
607 | LOCKDEP_SYS_EXIT |
608 | TRACE_IRQS_ON | |
86ed42f4 | 609 | .Lio_tif: |
83abeffb | 610 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 611 | jnz .Lio_work # there is work to do (signals etc.) |
83abeffb | 612 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
613 | jnz .Lio_work |
614 | .Lio_restore: | |
c5328901 MS |
615 | lg %r14,__LC_VDSO_PER_CPU |
616 | lmg %r0,%r10,__PT_R0(%r11) | |
617 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
c5328901 MS |
618 | stpt __LC_EXIT_TIMER |
619 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
620 | lmg %r11,%r15,__PT_R11(%r11) | |
621 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 622 | .Lio_done: |
1da177e4 | 623 | |
2688905e | 624 | # |
43d399d2 | 625 | # There is work todo, find out in which context we have been interrupted: |
d3a73acb | 626 | # 1) if we return to user space we can do all _TIF_WORK work |
43d399d2 MS |
627 | # 2) if we return to kernel code and kvm is enabled check if we need to |
628 | # modify the psw to leave SIE | |
629 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
630 | # the preemption counter and if it is zero call preempt_schedule_irq | |
631 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e | 632 | # |
86ed42f4 | 633 | .Lio_work: |
c5328901 | 634 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 635 | jo .Lio_work_user # yes -> do resched & signal |
43d399d2 | 636 | #ifdef CONFIG_PREEMPT |
2688905e | 637 | # check for preemptive scheduling |
c360192b | 638 | icm %r0,15,__LC_PREEMPT_COUNT |
86ed42f4 | 639 | jnz .Lio_restore # preemption is disabled |
83abeffb | 640 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 641 | jno .Lio_restore |
1da177e4 | 642 | # switch to kernel stack |
c5328901 MS |
643 | lg %r1,__PT_R15(%r11) |
644 | aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | |
645 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) | |
646 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
647 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 648 | lgr %r15,%r1 |
86ed42f4 | 649 | # TRACE_IRQS_ON already done at .Lio_return, call |
6a2df3a8 MS |
650 | # TRACE_IRQS_OFF to keep things symmetrical |
651 | TRACE_IRQS_OFF | |
652 | brasl %r14,preempt_schedule_irq | |
86ed42f4 | 653 | j .Lio_return |
6a2df3a8 | 654 | #else |
86ed42f4 | 655 | j .Lio_restore |
6a2df3a8 | 656 | #endif |
1da177e4 | 657 | |
43d399d2 MS |
658 | # |
659 | # Need to do work before returning to userspace, switch to kernel stack | |
660 | # | |
86ed42f4 | 661 | .Lio_work_user: |
1da177e4 | 662 | lg %r1,__LC_KERNEL_STACK |
c5328901 MS |
663 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
664 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
665 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 666 | lgr %r15,%r1 |
43d399d2 | 667 | |
1da177e4 LT |
668 | # |
669 | # One of the work bits is on. Find out which one. | |
1da177e4 | 670 | # |
86ed42f4 | 671 | .Lio_work_tif: |
83abeffb | 672 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 673 | jo .Lio_mcck_pending |
83abeffb | 674 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 675 | jo .Lio_reschedule |
83abeffb | 676 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 677 | jo .Lio_sigpending |
83abeffb | 678 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 679 | jo .Lio_notify_resume |
83abeffb | 680 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 681 | jo .Lio_vxrs |
83abeffb | 682 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
683 | jo .Lio_uaccess |
684 | j .Lio_return # beware of critical section cleanup | |
0eaeafa1 | 685 | |
77fa2245 | 686 | # |
d3a73acb | 687 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 688 | # |
86ed42f4 MS |
689 | .Lio_mcck_pending: |
690 | # TRACE_IRQS_ON already done at .Lio_return | |
b771aeac | 691 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 | 692 | TRACE_IRQS_OFF |
86ed42f4 | 693 | j .Lio_return |
77fa2245 | 694 | |
457f2180 | 695 | # |
d3a73acb | 696 | # _CIF_ASCE is set, load user space asce |
457f2180 | 697 | # |
86ed42f4 | 698 | .Lio_uaccess: |
d3a73acb | 699 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 700 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 701 | j .Lio_return |
457f2180 | 702 | |
9977e886 HB |
703 | # |
704 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
705 | # | |
706 | .Lio_vxrs: | |
707 | larl %r14,.Lio_return | |
708 | jg load_fpu_regs | |
709 | ||
1da177e4 LT |
710 | # |
711 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 712 | # |
86ed42f4 MS |
713 | .Lio_reschedule: |
714 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 | 715 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
25d83cbf | 716 | brasl %r14,schedule # call scheduler |
c5328901 | 717 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts |
411788ea | 718 | TRACE_IRQS_OFF |
86ed42f4 | 719 | j .Lio_return |
1da177e4 LT |
720 | |
721 | # | |
02a029b3 | 722 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 723 | # |
86ed42f4 MS |
724 | .Lio_sigpending: |
725 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
726 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
727 | lgr %r2,%r11 # pass pointer to pt_regs | |
728 | brasl %r14,do_signal | |
729 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
411788ea | 730 | TRACE_IRQS_OFF |
86ed42f4 | 731 | j .Lio_return |
1da177e4 | 732 | |
753c4dd6 MS |
733 | # |
734 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
735 | # | |
86ed42f4 MS |
736 | .Lio_notify_resume: |
737 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
738 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
739 | lgr %r2,%r11 # pass pointer to pt_regs | |
740 | brasl %r14,do_notify_resume | |
741 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
753c4dd6 | 742 | TRACE_IRQS_OFF |
86ed42f4 | 743 | j .Lio_return |
753c4dd6 | 744 | |
1da177e4 LT |
745 | /* |
746 | * External interrupt handler routine | |
747 | */ | |
144d634a | 748 | ENTRY(ext_int_handler) |
473e66ba | 749 | STCK __LC_INT_CLOCK |
9cfb9b3c | 750 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
751 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
752 | lg %r10,__LC_LAST_BREAK | |
d5c352cd | 753 | lg %r12,__LC_CURRENT |
9977e886 | 754 | larl %r13,cleanup_critical |
c5328901 | 755 | lmg %r8,%r9,__LC_EXT_OLD_PSW |
2acb94f4 | 756 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
757 | stmg %r0,%r7,__PT_R0(%r11) |
758 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
759 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c MS |
760 | lghi %r1,__LC_EXT_PARAMS2 |
761 | mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR | |
762 | mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS | |
763 | mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) | |
d3a73acb | 764 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
765 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
766 | jo .Lio_restore | |
1f194a4c | 767 | TRACE_IRQS_OFF |
0de9db37 | 768 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
c5328901 | 769 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
770 | lghi %r3,EXT_INTERRUPT |
771 | brasl %r14,do_IRQ | |
86ed42f4 | 772 | j .Lio_return |
1da177e4 | 773 | |
4c1051e3 | 774 | /* |
86ed42f4 | 775 | * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. |
4c1051e3 MS |
776 | */ |
777 | ENTRY(psw_idle) | |
27f6b416 | 778 | stg %r3,__SF_EMPTY(%r15) |
86ed42f4 | 779 | larl %r1,.Lpsw_idle_lpsw+4 |
4c1051e3 | 780 | stg %r1,__SF_EMPTY+8(%r15) |
72d38b19 MS |
781 | #ifdef CONFIG_SMP |
782 | larl %r1,smp_cpu_mtid | |
783 | llgf %r1,0(%r1) | |
784 | ltgr %r1,%r1 | |
785 | jz .Lpsw_idle_stcctm | |
786 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) | |
787 | .Lpsw_idle_stcctm: | |
788 | #endif | |
419123f9 | 789 | oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT |
27f6b416 MS |
790 | STCK __CLOCK_IDLE_ENTER(%r2) |
791 | stpt __TIMER_IDLE_ENTER(%r2) | |
86ed42f4 | 792 | .Lpsw_idle_lpsw: |
4c1051e3 MS |
793 | lpswe __SF_EMPTY(%r15) |
794 | br %r14 | |
86ed42f4 | 795 | .Lpsw_idle_end: |
4c1051e3 | 796 | |
b5510d9b HB |
797 | /* |
798 | * Store floating-point controls and floating-point or vector register | |
799 | * depending whether the vector facility is available. A critical section | |
800 | * cleanup assures that the registers are stored even if interrupted for | |
801 | * some other work. The CIF_FPU flag is set to trigger a lazy restore | |
802 | * of the register contents at return from io or a system call. | |
9977e886 HB |
803 | */ |
804 | ENTRY(save_fpu_regs) | |
d0164ee2 HB |
805 | lg %r2,__LC_CURRENT |
806 | aghi %r2,__TASK_thread | |
83abeffb | 807 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 808 | bor %r14 |
d0164ee2 | 809 | stfpc __THREAD_FPU_fpc(%r2) |
9977e886 | 810 | .Lsave_fpu_regs_fpc_end: |
d0164ee2 | 811 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 812 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 HB |
813 | jz .Lsave_fpu_regs_fp # no -> store FP regs |
814 | .Lsave_fpu_regs_vx_low: | |
815 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) | |
816 | .Lsave_fpu_regs_vx_high: | |
817 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) | |
818 | j .Lsave_fpu_regs_done # -> set CIF_FPU flag | |
819 | .Lsave_fpu_regs_fp: | |
820 | std 0,0(%r3) | |
821 | std 1,8(%r3) | |
822 | std 2,16(%r3) | |
823 | std 3,24(%r3) | |
824 | std 4,32(%r3) | |
825 | std 5,40(%r3) | |
826 | std 6,48(%r3) | |
827 | std 7,56(%r3) | |
828 | std 8,64(%r3) | |
829 | std 9,72(%r3) | |
830 | std 10,80(%r3) | |
831 | std 11,88(%r3) | |
832 | std 12,96(%r3) | |
833 | std 13,104(%r3) | |
834 | std 14,112(%r3) | |
835 | std 15,120(%r3) | |
836 | .Lsave_fpu_regs_done: | |
837 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
838 | br %r14 | |
839 | .Lsave_fpu_regs_end: | |
711f5df7 AV |
840 | #if IS_ENABLED(CONFIG_KVM) |
841 | EXPORT_SYMBOL(save_fpu_regs) | |
842 | #endif | |
9977e886 | 843 | |
b5510d9b HB |
844 | /* |
845 | * Load floating-point controls and floating-point or vector registers. | |
846 | * A critical section cleanup assures that the register contents are | |
847 | * loaded even if interrupted for some other work. | |
9977e886 HB |
848 | * |
849 | * There are special calling conventions to fit into sysc and io return work: | |
9977e886 HB |
850 | * %r15: <kernel stack> |
851 | * The function requires: | |
b5510d9b | 852 | * %r4 |
9977e886 HB |
853 | */ |
854 | load_fpu_regs: | |
d0164ee2 HB |
855 | lg %r4,__LC_CURRENT |
856 | aghi %r4,__TASK_thread | |
83abeffb | 857 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 858 | bnor %r14 |
d0164ee2 | 859 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 860 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 861 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b | 862 | jz .Lload_fpu_regs_fp # -> no VX, load FP regs |
9977e886 HB |
863 | .Lload_fpu_regs_vx: |
864 | VLM %v0,%v15,0,%r4 | |
865 | .Lload_fpu_regs_vx_high: | |
866 | VLM %v16,%v31,256,%r4 | |
867 | j .Lload_fpu_regs_done | |
9977e886 HB |
868 | .Lload_fpu_regs_fp: |
869 | ld 0,0(%r4) | |
870 | ld 1,8(%r4) | |
871 | ld 2,16(%r4) | |
872 | ld 3,24(%r4) | |
873 | ld 4,32(%r4) | |
874 | ld 5,40(%r4) | |
875 | ld 6,48(%r4) | |
876 | ld 7,56(%r4) | |
877 | ld 8,64(%r4) | |
878 | ld 9,72(%r4) | |
879 | ld 10,80(%r4) | |
880 | ld 11,88(%r4) | |
881 | ld 12,96(%r4) | |
882 | ld 13,104(%r4) | |
883 | ld 14,112(%r4) | |
884 | ld 15,120(%r4) | |
885 | .Lload_fpu_regs_done: | |
886 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
887 | br %r14 | |
888 | .Lload_fpu_regs_end: | |
889 | ||
86ed42f4 | 890 | .L__critical_end: |
ae6aa2ea | 891 | |
1da177e4 LT |
892 | /* |
893 | * Machine check handler routines | |
894 | */ | |
144d634a | 895 | ENTRY(mcck_int_handler) |
473e66ba | 896 | STCK __LC_MCCK_CLOCK |
77fa2245 HC |
897 | la %r1,4095 # revalidate r1 |
898 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 899 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
c5328901 | 900 | lg %r10,__LC_LAST_BREAK |
d5c352cd | 901 | lg %r12,__LC_CURRENT |
9977e886 | 902 | larl %r13,cleanup_critical |
c5328901 | 903 | lmg %r8,%r9,__LC_MCK_OLD_PSW |
83abeffb | 904 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE |
86ed42f4 | 905 | jo .Lmcck_panic # yes -> rest of mcck code invalid |
c5328901 MS |
906 | lghi %r14,__LC_CPU_TIMER_SAVE_AREA |
907 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) | |
83abeffb | 908 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID |
c5328901 | 909 | jo 3f |
63b12246 MS |
910 | la %r14,__LC_SYNC_ENTER_TIMER |
911 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
912 | jl 0f | |
913 | la %r14,__LC_ASYNC_ENTER_TIMER | |
914 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
c5328901 | 915 | jl 1f |
63b12246 | 916 | la %r14,__LC_EXIT_TIMER |
c5328901 MS |
917 | 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER |
918 | jl 2f | |
63b12246 | 919 | la %r14,__LC_LAST_UPDATE_TIMER |
c5328901 | 920 | 2: spt 0(%r14) |
6377981f | 921 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
83abeffb | 922 | 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) |
86ed42f4 | 923 | jno .Lmcck_panic # no -> skip cleanup critical |
2acb94f4 | 924 | SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER |
86ed42f4 | 925 | .Lmcck_skip: |
6551fbdf MS |
926 | lghi %r14,__LC_GPREGS_SAVE_AREA+64 |
927 | stmg %r0,%r7,__PT_R0(%r11) | |
928 | mvc __PT_R8(64,%r11),0(%r14) | |
c5328901 | 929 | stmg %r8,%r9,__PT_PSW(%r11) |
d3a73acb | 930 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
931 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
932 | lgr %r2,%r11 # pass pointer to pt_regs | |
77fa2245 | 933 | brasl %r14,s390_do_machine_check |
c5328901 | 934 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 935 | jno .Lmcck_return |
77fa2245 | 936 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack |
c5328901 MS |
937 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
938 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
939 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
77fa2245 | 940 | lgr %r15,%r1 |
c5328901 | 941 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off |
83abeffb | 942 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 943 | jno .Lmcck_return |
1f194a4c | 944 | TRACE_IRQS_OFF |
77fa2245 | 945 | brasl %r14,s390_handle_mcck |
1f194a4c | 946 | TRACE_IRQS_ON |
86ed42f4 | 947 | .Lmcck_return: |
c5328901 MS |
948 | lg %r14,__LC_VDSO_PER_CPU |
949 | lmg %r0,%r10,__PT_R0(%r11) | |
950 | mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW | |
63b12246 MS |
951 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
952 | jno 0f | |
953 | stpt __LC_EXIT_TIMER | |
c5328901 MS |
954 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
955 | 0: lmg %r11,%r15,__PT_R11(%r11) | |
956 | lpswe __LC_RETURN_MCCK_PSW | |
957 | ||
86ed42f4 | 958 | .Lmcck_panic: |
c5328901 | 959 | lg %r15,__LC_PANIC_STACK |
2acb94f4 | 960 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
86ed42f4 | 961 | j .Lmcck_skip |
1da177e4 | 962 | |
7dd6b334 MH |
963 | # |
964 | # PSW restart interrupt handler | |
965 | # | |
8b646bd7 | 966 | ENTRY(restart_int_handler) |
e22cf8ca CB |
967 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
968 | jz 0f | |
969 | .insn s,0xb2800000,__LC_LPP | |
970 | 0: stg %r15,__LC_SAVE_AREA_RESTART | |
8b646bd7 | 971 | lg %r15,__LC_RESTART_STACK |
c5328901 | 972 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
8b646bd7 | 973 | xc 0(__PT_SIZE,%r15),0(%r15) |
c5328901 MS |
974 | stmg %r0,%r14,__PT_R0(%r15) |
975 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | |
976 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | |
8b646bd7 MS |
977 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
978 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) | |
fbe76568 HC |
979 | lg %r1,__LC_RESTART_FN # load fn, parm & source cpu |
980 | lg %r2,__LC_RESTART_DATA | |
981 | lg %r3,__LC_RESTART_SOURCE | |
8b646bd7 MS |
982 | ltgr %r3,%r3 # test source cpu address |
983 | jm 1f # negative -> skip source stop | |
eb546195 | 984 | 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu |
8b646bd7 MS |
985 | brc 10,0b # wait for status stored |
986 | 1: basr %r14,%r1 # call function | |
987 | stap __SF_EMPTY(%r15) # store cpu address | |
988 | llgh %r3,__SF_EMPTY(%r15) | |
eb546195 | 989 | 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu |
8b646bd7 MS |
990 | brc 2,2b |
991 | 3: j 3b | |
7dd6b334 | 992 | |
860dba45 MS |
993 | .section .kprobes.text, "ax" |
994 | ||
1da177e4 LT |
995 | #ifdef CONFIG_CHECK_STACK |
996 | /* | |
997 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
998 | * No need to properly save the registers, we are going to panic anyway. | |
999 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
1000 | */ | |
1001 | stack_overflow: | |
dc7ee00d MS |
1002 | lg %r15,__LC_PANIC_STACK # change to panic stack |
1003 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
1004 | stmg %r0,%r7,__PT_R0(%r11) |
1005 | stmg %r8,%r9,__PT_PSW(%r11) | |
1006 | mvc __PT_R8(64,%r11),0(%r14) | |
1007 | stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 | |
c5328901 MS |
1008 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
1009 | lgr %r2,%r11 # pass pointer to pt_regs | |
1da177e4 LT |
1010 | jg kernel_stack_overflow |
1011 | #endif | |
1012 | ||
1da177e4 | 1013 | cleanup_critical: |
d0fc4107 MS |
1014 | #if IS_ENABLED(CONFIG_KVM) |
1015 | clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap | |
1016 | jl 0f | |
1017 | clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done | |
1018 | jl .Lcleanup_sie | |
1019 | #endif | |
86ed42f4 | 1020 | clg %r9,BASED(.Lcleanup_table) # system_call |
1da177e4 | 1021 | jl 0f |
86ed42f4 MS |
1022 | clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc |
1023 | jl .Lcleanup_system_call | |
1024 | clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif | |
1da177e4 | 1025 | jl 0f |
86ed42f4 MS |
1026 | clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore |
1027 | jl .Lcleanup_sysc_tif | |
1028 | clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done | |
1029 | jl .Lcleanup_sysc_restore | |
1030 | clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif | |
63b12246 | 1031 | jl 0f |
86ed42f4 MS |
1032 | clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore |
1033 | jl .Lcleanup_io_tif | |
1034 | clg %r9,BASED(.Lcleanup_table+56) # .Lio_done | |
1035 | jl .Lcleanup_io_restore | |
1036 | clg %r9,BASED(.Lcleanup_table+64) # psw_idle | |
4c1051e3 | 1037 | jl 0f |
86ed42f4 MS |
1038 | clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end |
1039 | jl .Lcleanup_idle | |
9977e886 HB |
1040 | clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs |
1041 | jl 0f | |
1042 | clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end | |
1043 | jl .Lcleanup_save_fpu_regs | |
1044 | clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs | |
1045 | jl 0f | |
1046 | clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end | |
1047 | jl .Lcleanup_load_fpu_regs | |
c5328901 MS |
1048 | 0: br %r14 |
1049 | ||
d0fc4107 MS |
1050 | .align 8 |
1051 | .Lcleanup_table: | |
1052 | .quad system_call | |
1053 | .quad .Lsysc_do_svc | |
1054 | .quad .Lsysc_tif | |
1055 | .quad .Lsysc_restore | |
1056 | .quad .Lsysc_done | |
1057 | .quad .Lio_tif | |
1058 | .quad .Lio_restore | |
1059 | .quad .Lio_done | |
1060 | .quad psw_idle | |
1061 | .quad .Lpsw_idle_end | |
1062 | .quad save_fpu_regs | |
1063 | .quad .Lsave_fpu_regs_end | |
1064 | .quad load_fpu_regs | |
1065 | .quad .Lload_fpu_regs_end | |
d0fc4107 MS |
1066 | |
1067 | #if IS_ENABLED(CONFIG_KVM) | |
1068 | .Lcleanup_table_sie: | |
1069 | .quad .Lsie_gmap | |
1070 | .quad .Lsie_done | |
1071 | ||
1072 | .Lcleanup_sie: | |
1073 | lg %r9,__SF_EMPTY(%r15) # get control block pointer | |
e22cf8ca | 1074 | ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE |
d0fc4107 MS |
1075 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
1076 | larl %r9,sie_exit # skip forward to sie_exit | |
1077 | br %r14 | |
1078 | #endif | |
1da177e4 | 1079 | |
86ed42f4 | 1080 | .Lcleanup_system_call: |
c5328901 | 1081 | # check if stpt has been executed |
86ed42f4 | 1082 | clg %r9,BASED(.Lcleanup_system_call_insn) |
1da177e4 LT |
1083 | jh 0f |
1084 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
c5328901 | 1085 | cghi %r11,__LC_SAVE_AREA_ASYNC |
6377981f | 1086 | je 0f |
c5328901 MS |
1087 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
1088 | 0: # check if stmg has been executed | |
86ed42f4 | 1089 | clg %r9,BASED(.Lcleanup_system_call_insn+8) |
1da177e4 | 1090 | jh 0f |
c5328901 MS |
1091 | mvc __LC_SAVE_AREA_SYNC(64),0(%r11) |
1092 | 0: # check if base register setup + TIF bit load has been done | |
86ed42f4 | 1093 | clg %r9,BASED(.Lcleanup_system_call_insn+16) |
c5328901 MS |
1094 | jhe 0f |
1095 | # set up saved registers r10 and r12 | |
1096 | stg %r10,16(%r11) # r10 last break | |
ef280c85 | 1097 | stg %r12,32(%r11) # r12 task struct pointer |
c5328901 | 1098 | 0: # check if the user time update has been done |
86ed42f4 | 1099 | clg %r9,BASED(.Lcleanup_system_call_insn+24) |
c5328901 MS |
1100 | jh 0f |
1101 | lg %r15,__LC_EXIT_TIMER | |
1102 | slg %r15,__LC_SYNC_ENTER_TIMER | |
1103 | alg %r15,__LC_USER_TIMER | |
1104 | stg %r15,__LC_USER_TIMER | |
1105 | 0: # check if the system time update has been done | |
86ed42f4 | 1106 | clg %r9,BASED(.Lcleanup_system_call_insn+32) |
c5328901 MS |
1107 | jh 0f |
1108 | lg %r15,__LC_LAST_UPDATE_TIMER | |
1109 | slg %r15,__LC_EXIT_TIMER | |
1110 | alg %r15,__LC_SYSTEM_TIMER | |
1111 | stg %r15,__LC_SYSTEM_TIMER | |
1112 | 0: # update accounting time stamp | |
1da177e4 | 1113 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER |
c5328901 MS |
1114 | # do LAST_BREAK |
1115 | lg %r9,16(%r11) | |
1116 | srag %r9,%r9,23 | |
86f2552b | 1117 | jz 0f |
ef280c85 MS |
1118 | lgr %r9,%r12 |
1119 | aghi %r9,__TASK_thread | |
1120 | mvc __THREAD_last_break(8,%r9),16(%r11) | |
c5328901 MS |
1121 | 0: # set up saved register r11 |
1122 | lg %r15,__LC_KERNEL_STACK | |
dc7ee00d MS |
1123 | la %r9,STACK_FRAME_OVERHEAD(%r15) |
1124 | stg %r9,24(%r11) # r11 pt_regs pointer | |
c5328901 | 1125 | # fill pt_regs |
dc7ee00d MS |
1126 | mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC |
1127 | stmg %r0,%r7,__PT_R0(%r9) | |
1128 | mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW | |
1129 | mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC | |
d3a73acb MS |
1130 | xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) |
1131 | mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL | |
c5328901 | 1132 | # setup saved register r15 |
c5328901 MS |
1133 | stg %r15,56(%r11) # r15 stack pointer |
1134 | # set new psw address and exit | |
86ed42f4 | 1135 | larl %r9,.Lsysc_do_svc |
1da177e4 | 1136 | br %r14 |
86ed42f4 | 1137 | .Lcleanup_system_call_insn: |
25d83cbf | 1138 | .quad system_call |
86ed42f4 MS |
1139 | .quad .Lsysc_stmg |
1140 | .quad .Lsysc_per | |
a359bb11 | 1141 | .quad .Lsysc_vtime+36 |
86ed42f4 | 1142 | .quad .Lsysc_vtime+42 |
1da177e4 | 1143 | |
86ed42f4 MS |
1144 | .Lcleanup_sysc_tif: |
1145 | larl %r9,.Lsysc_tif | |
1da177e4 LT |
1146 | br %r14 |
1147 | ||
86ed42f4 MS |
1148 | .Lcleanup_sysc_restore: |
1149 | clg %r9,BASED(.Lcleanup_sysc_restore_insn) | |
6377981f | 1150 | je 0f |
c5328901 MS |
1151 | lg %r9,24(%r11) # get saved pointer to pt_regs |
1152 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
1153 | mvc 0(64,%r11),__PT_R8(%r9) | |
1154 | lmg %r0,%r7,__PT_R0(%r9) | |
1155 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
1da177e4 | 1156 | br %r14 |
86ed42f4 MS |
1157 | .Lcleanup_sysc_restore_insn: |
1158 | .quad .Lsysc_done - 4 | |
1da177e4 | 1159 | |
86ed42f4 MS |
1160 | .Lcleanup_io_tif: |
1161 | larl %r9,.Lio_tif | |
176b1803 MS |
1162 | br %r14 |
1163 | ||
86ed42f4 MS |
1164 | .Lcleanup_io_restore: |
1165 | clg %r9,BASED(.Lcleanup_io_restore_insn) | |
c5328901 MS |
1166 | je 0f |
1167 | lg %r9,24(%r11) # get saved r11 pointer to pt_regs | |
1168 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
c5328901 MS |
1169 | mvc 0(64,%r11),__PT_R8(%r9) |
1170 | lmg %r0,%r7,__PT_R0(%r9) | |
1171 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
ae6aa2ea | 1172 | br %r14 |
86ed42f4 MS |
1173 | .Lcleanup_io_restore_insn: |
1174 | .quad .Lio_done - 4 | |
ae6aa2ea | 1175 | |
86ed42f4 | 1176 | .Lcleanup_idle: |
419123f9 | 1177 | ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT |
4c1051e3 | 1178 | # copy interrupt clock & cpu timer |
27f6b416 MS |
1179 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK |
1180 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER | |
4c1051e3 MS |
1181 | cghi %r11,__LC_SAVE_AREA_ASYNC |
1182 | je 0f | |
27f6b416 MS |
1183 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK |
1184 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER | |
4c1051e3 | 1185 | 0: # check if stck & stpt have been executed |
86ed42f4 | 1186 | clg %r9,BASED(.Lcleanup_idle_insn) |
4c1051e3 | 1187 | jhe 1f |
27f6b416 MS |
1188 | mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) |
1189 | mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) | |
72d38b19 MS |
1190 | 1: # calculate idle cycles |
1191 | #ifdef CONFIG_SMP | |
1192 | clg %r9,BASED(.Lcleanup_idle_insn) | |
1193 | jl 3f | |
1194 | larl %r1,smp_cpu_mtid | |
1195 | llgf %r1,0(%r1) | |
1196 | ltgr %r1,%r1 | |
1197 | jz 3f | |
1198 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) | |
1199 | larl %r3,mt_cycles | |
1200 | ag %r3,__LC_PERCPU_OFFSET | |
1201 | la %r4,__SF_EMPTY+16(%r15) | |
1202 | 2: lg %r0,0(%r3) | |
1203 | slg %r0,0(%r4) | |
1204 | alg %r0,64(%r4) | |
1205 | stg %r0,0(%r3) | |
1206 | la %r3,8(%r3) | |
1207 | la %r4,8(%r4) | |
1208 | brct %r1,2b | |
1209 | #endif | |
1210 | 3: # account system time going idle | |
4c1051e3 | 1211 | lg %r9,__LC_STEAL_TIMER |
27f6b416 | 1212 | alg %r9,__CLOCK_IDLE_ENTER(%r2) |
4c1051e3 MS |
1213 | slg %r9,__LC_LAST_UPDATE_CLOCK |
1214 | stg %r9,__LC_STEAL_TIMER | |
27f6b416 | 1215 | mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) |
4c1051e3 MS |
1216 | lg %r9,__LC_SYSTEM_TIMER |
1217 | alg %r9,__LC_LAST_UPDATE_TIMER | |
27f6b416 | 1218 | slg %r9,__TIMER_IDLE_ENTER(%r2) |
4c1051e3 | 1219 | stg %r9,__LC_SYSTEM_TIMER |
27f6b416 | 1220 | mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) |
4c1051e3 | 1221 | # prepare return psw |
0587d409 | 1222 | nihh %r8,0xfcfd # clear irq & wait state bits |
4c1051e3 MS |
1223 | lg %r9,48(%r11) # return from psw_idle |
1224 | br %r14 | |
86ed42f4 MS |
1225 | .Lcleanup_idle_insn: |
1226 | .quad .Lpsw_idle_lpsw | |
4c1051e3 | 1227 | |
9977e886 | 1228 | .Lcleanup_save_fpu_regs: |
e370e476 | 1229 | larl %r9,save_fpu_regs |
9977e886 | 1230 | br %r14 |
9977e886 HB |
1231 | |
1232 | .Lcleanup_load_fpu_regs: | |
e370e476 | 1233 | larl %r9,load_fpu_regs |
9977e886 | 1234 | br %r14 |
9977e886 | 1235 | |
1da177e4 LT |
1236 | /* |
1237 | * Integer constants | |
1238 | */ | |
c5328901 | 1239 | .align 8 |
1da177e4 | 1240 | .Lcritical_start: |
86ed42f4 | 1241 | .quad .L__critical_start |
c5328901 | 1242 | .Lcritical_length: |
86ed42f4 | 1243 | .quad .L__critical_end - .L__critical_start |
61aa4884 | 1244 | #if IS_ENABLED(CONFIG_KVM) |
d0fc4107 | 1245 | .Lsie_critical_start: |
86ed42f4 | 1246 | .quad .Lsie_gmap |
7c470539 | 1247 | .Lsie_critical_length: |
86ed42f4 | 1248 | .quad .Lsie_done - .Lsie_gmap |
603d1a50 MS |
1249 | #endif |
1250 | ||
a876cb3f HC |
1251 | .section .rodata, "a" |
1252 | #define SYSCALL(esame,emu) .long esame | |
9bf1226b | 1253 | .globl sys_call_table |
1da177e4 LT |
1254 | sys_call_table: |
1255 | #include "syscalls.S" | |
1256 | #undef SYSCALL | |
1257 | ||
347a8dc3 | 1258 | #ifdef CONFIG_COMPAT |
1da177e4 | 1259 | |
a876cb3f | 1260 | #define SYSCALL(esame,emu) .long emu |
61649881 | 1261 | .globl sys_call_table_emu |
1da177e4 LT |
1262 | sys_call_table_emu: |
1263 | #include "syscalls.S" | |
1264 | #undef SYSCALL | |
1265 | #endif |