]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/net/ethernet/amazon/ena/ena_netdev.c
projects / mirror_ubuntu-zesty-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
net: ena: add missing unmap bars on device removal
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / amazon / ena / ena_netdev.c
CommitLineData
1738cd3e
NB		 1/*
2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35#ifdef CONFIG_RFS_ACCEL
36#include <linux/cpu_rmap.h>
37#endif /* CONFIG_RFS_ACCEL */
38#include <linux/ethtool.h>
39#include <linux/if_vlan.h>
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/moduleparam.h>
43#include <linux/numa.h>
44#include <linux/pci.h>
45#include <linux/utsname.h>
46#include <linux/version.h>
47#include <linux/vmalloc.h>
48#include <net/ip.h>
49
50#include "ena_netdev.h"
51#include "ena_pci_id_tbl.h"
52
53static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
54
55MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
56MODULE_DESCRIPTION(DEVICE_NAME);
57MODULE_LICENSE("GPL");
58MODULE_VERSION(DRV_MODULE_VERSION);
59
60/* Time in jiffies before concluding the transmitter is hung. */
61#define TX_TIMEOUT (5 * HZ)
62
63#define ENA_NAPI_BUDGET 64
64
65#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
66 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
67static int debug = -1;
68module_param(debug, int, 0);
69MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71static struct ena_aenq_handlers aenq_handlers;
72
73static struct workqueue_struct *ena_wq;
74
75MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
76
77static int ena_rss_init_default(struct ena_adapter *adapter);
78
79static void ena_tx_timeout(struct net_device *dev)
80{
81 struct ena_adapter *adapter = netdev_priv(dev);
82
d5796182
NB		 83 /* Change the state of the device to trigger reset
84 * Check that we are not in the middle or a trigger already
85 */
86
87 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
88 return;
89
1738cd3e
NB		 90 u64_stats_update_begin(&adapter->syncp);
91 adapter->dev_stats.tx_timeout++;
92 u64_stats_update_end(&adapter->syncp);
93
94 netif_err(adapter, tx_err, dev, "Transmit time out\n");
1738cd3e
NB		 95}
96
97static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
98{
99 int i;
100
101 for (i = 0; i < adapter->num_queues; i++)
102 adapter->rx_ring[i].mtu = mtu;
103}
104
105static int ena_change_mtu(struct net_device *dev, int new_mtu)
106{
107 struct ena_adapter *adapter = netdev_priv(dev);
108 int ret;
109
1738cd3e
NB		 110 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
111 if (!ret) {
112 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
113 update_rx_ring_mtu(adapter, new_mtu);
114 dev->mtu = new_mtu;
115 } else {
116 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
117 new_mtu);
118 }
119
120 return ret;
121}
122
123static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
124{
125#ifdef CONFIG_RFS_ACCEL
126 u32 i;
127 int rc;
128
129 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
130 if (!adapter->netdev->rx_cpu_rmap)
131 return -ENOMEM;
132 for (i = 0; i < adapter->num_queues; i++) {
133 int irq_idx = ENA_IO_IRQ_IDX(i);
134
135 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
e328a031 136 pci_irq_vector(adapter->pdev, irq_idx));
1738cd3e
NB		 137 if (rc) {
138 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
139 adapter->netdev->rx_cpu_rmap = NULL;
140 return rc;
141 }
142 }
143#endif /* CONFIG_RFS_ACCEL */
144 return 0;
145}
146
147static void ena_init_io_rings_common(struct ena_adapter *adapter,
148 struct ena_ring *ring, u16 qid)
149{
150 ring->qid = qid;
151 ring->pdev = adapter->pdev;
152 ring->dev = &adapter->pdev->dev;
153 ring->netdev = adapter->netdev;
154 ring->napi = &adapter->ena_napi[qid].napi;
155 ring->adapter = adapter;
156 ring->ena_dev = adapter->ena_dev;
157 ring->per_napi_packets = 0;
158 ring->per_napi_bytes = 0;
159 ring->cpu = 0;
160 u64_stats_init(&ring->syncp);
161}
162
163static void ena_init_io_rings(struct ena_adapter *adapter)
164{
165 struct ena_com_dev *ena_dev;
166 struct ena_ring *txr, *rxr;
167 int i;
168
169 ena_dev = adapter->ena_dev;
170
171 for (i = 0; i < adapter->num_queues; i++) {
172 txr = &adapter->tx_ring[i];
173 rxr = &adapter->rx_ring[i];
174
175 /* TX/RX common ring state */
176 ena_init_io_rings_common(adapter, txr, i);
177 ena_init_io_rings_common(adapter, rxr, i);
178
179 /* TX specific ring state */
180 txr->ring_size = adapter->tx_ring_size;
181 txr->tx_max_header_size = ena_dev->tx_max_header_size;
182 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
183 txr->sgl_size = adapter->max_tx_sgl_size;
184 txr->smoothed_interval =
185 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
186
187 /* RX specific ring state */
188 rxr->ring_size = adapter->rx_ring_size;
189 rxr->rx_copybreak = adapter->rx_copybreak;
190 rxr->sgl_size = adapter->max_rx_sgl_size;
191 rxr->smoothed_interval =
192 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
193 }
194}
195
196/* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
197 * @adapter: network interface device structure
198 * @qid: queue index
199 *
200 * Return 0 on success, negative on failure
201 */
202static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
203{
204 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
205 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
206 int size, i, node;
207
208 if (tx_ring->tx_buffer_info) {
209 netif_err(adapter, ifup,
210 adapter->netdev, "tx_buffer_info info is not NULL");
211 return -EEXIST;
212 }
213
214 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
215 node = cpu_to_node(ena_irq->cpu);
216
217 tx_ring->tx_buffer_info = vzalloc_node(size, node);
218 if (!tx_ring->tx_buffer_info) {
219 tx_ring->tx_buffer_info = vzalloc(size);
220 if (!tx_ring->tx_buffer_info)
221 return -ENOMEM;
222 }
223
224 size = sizeof(u16) * tx_ring->ring_size;
225 tx_ring->free_tx_ids = vzalloc_node(size, node);
226 if (!tx_ring->free_tx_ids) {
227 tx_ring->free_tx_ids = vzalloc(size);
228 if (!tx_ring->free_tx_ids) {
229 vfree(tx_ring->tx_buffer_info);
230 return -ENOMEM;
231 }
232 }
233
234 /* Req id ring for TX out of order completions */
235 for (i = 0; i < tx_ring->ring_size; i++)
236 tx_ring->free_tx_ids[i] = i;
237
238 /* Reset tx statistics */
239 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
240
241 tx_ring->next_to_use = 0;
242 tx_ring->next_to_clean = 0;
243 tx_ring->cpu = ena_irq->cpu;
244 return 0;
245}
246
247/* ena_free_tx_resources - Free I/O Tx Resources per Queue
248 * @adapter: network interface device structure
249 * @qid: queue index
250 *
251 * Free all transmit software resources
252 */
253static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
254{
255 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
256
257 vfree(tx_ring->tx_buffer_info);
258 tx_ring->tx_buffer_info = NULL;
259
260 vfree(tx_ring->free_tx_ids);
261 tx_ring->free_tx_ids = NULL;
262}
263
264/* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
265 * @adapter: private structure
266 *
267 * Return 0 on success, negative on failure
268 */
269static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
270{
271 int i, rc = 0;
272
273 for (i = 0; i < adapter->num_queues; i++) {
274 rc = ena_setup_tx_resources(adapter, i);
275 if (rc)
276 goto err_setup_tx;
277 }
278
279 return 0;
280
281err_setup_tx:
282
283 netif_err(adapter, ifup, adapter->netdev,
284 "Tx queue %d: allocation failed\n", i);
285
286 /* rewind the index freeing the rings as we go */
287 while (i--)
288 ena_free_tx_resources(adapter, i);
289 return rc;
290}
291
292/* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
293 * @adapter: board private structure
294 *
295 * Free all transmit software resources
296 */
297static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
298{
299 int i;
300
301 for (i = 0; i < adapter->num_queues; i++)
302 ena_free_tx_resources(adapter, i);
303}
304
305/* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
306 * @adapter: network interface device structure
307 * @qid: queue index
308 *
309 * Returns 0 on success, negative on failure
310 */
311static int ena_setup_rx_resources(struct ena_adapter *adapter,
312 u32 qid)
313{
314 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
315 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
316 int size, node;
317
318 if (rx_ring->rx_buffer_info) {
319 netif_err(adapter, ifup, adapter->netdev,
320 "rx_buffer_info is not NULL");
321 return -EEXIST;
322 }
323
324 /* alloc extra element so in rx path
325 * we can always prefetch rx_info + 1
326 */
327 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
328 node = cpu_to_node(ena_irq->cpu);
329
330 rx_ring->rx_buffer_info = vzalloc_node(size, node);
331 if (!rx_ring->rx_buffer_info) {
332 rx_ring->rx_buffer_info = vzalloc(size);
333 if (!rx_ring->rx_buffer_info)
334 return -ENOMEM;
335 }
336
337 /* Reset rx statistics */
338 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
339
340 rx_ring->next_to_clean = 0;
341 rx_ring->next_to_use = 0;
342 rx_ring->cpu = ena_irq->cpu;
343
344 return 0;
345}
346
347/* ena_free_rx_resources - Free I/O Rx Resources
348 * @adapter: network interface device structure
349 * @qid: queue index
350 *
351 * Free all receive software resources
352 */
353static void ena_free_rx_resources(struct ena_adapter *adapter,
354 u32 qid)
355{
356 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
357
358 vfree(rx_ring->rx_buffer_info);
359 rx_ring->rx_buffer_info = NULL;
360}
361
362/* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
363 * @adapter: board private structure
364 *
365 * Return 0 on success, negative on failure
366 */
367static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
368{
369 int i, rc = 0;
370
371 for (i = 0; i < adapter->num_queues; i++) {
372 rc = ena_setup_rx_resources(adapter, i);
373 if (rc)
374 goto err_setup_rx;
375 }
376
377 return 0;
378
379err_setup_rx:
380
381 netif_err(adapter, ifup, adapter->netdev,
382 "Rx queue %d: allocation failed\n", i);
383
384 /* rewind the index freeing the rings as we go */
385 while (i--)
386 ena_free_rx_resources(adapter, i);
387 return rc;
388}
389
390/* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
391 * @adapter: board private structure
392 *
393 * Free all receive software resources
394 */
395static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
396{
397 int i;
398
399 for (i = 0; i < adapter->num_queues; i++)
400 ena_free_rx_resources(adapter, i);
401}
402
403static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,
404 struct ena_rx_buffer *rx_info, gfp_t gfp)
405{
406 struct ena_com_buf *ena_buf;
407 struct page *page;
408 dma_addr_t dma;
409
410 /* if previous allocated page is not used */
411 if (unlikely(rx_info->page))
412 return 0;
413
414 page = alloc_page(gfp);
415 if (unlikely(!page)) {
416 u64_stats_update_begin(&rx_ring->syncp);
417 rx_ring->rx_stats.page_alloc_fail++;
418 u64_stats_update_end(&rx_ring->syncp);
419 return -ENOMEM;
420 }
421
422 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE,
423 DMA_FROM_DEVICE);
424 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
425 u64_stats_update_begin(&rx_ring->syncp);
426 rx_ring->rx_stats.dma_mapping_err++;
427 u64_stats_update_end(&rx_ring->syncp);
428
429 __free_page(page);
430 return -EIO;
431 }
432 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
433 "alloc page %p, rx_info %p\n", page, rx_info);
434
435 rx_info->page = page;
436 rx_info->page_offset = 0;
437 ena_buf = &rx_info->ena_buf;
438 ena_buf->paddr = dma;
439 ena_buf->len = PAGE_SIZE;
440
441 return 0;
442}
443
444static void ena_free_rx_page(struct ena_ring *rx_ring,
445 struct ena_rx_buffer *rx_info)
446{
447 struct page *page = rx_info->page;
448 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
449
450 if (unlikely(!page)) {
451 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
452 "Trying to free unallocated buffer\n");
453 return;
454 }
455
456 dma_unmap_page(rx_ring->dev, ena_buf->paddr, PAGE_SIZE,
457 DMA_FROM_DEVICE);
458
459 __free_page(page);
460 rx_info->page = NULL;
461}
462
463static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
464{
465 u16 next_to_use;
466 u32 i;
467 int rc;
468
469 next_to_use = rx_ring->next_to_use;
470
471 for (i = 0; i < num; i++) {
472 struct ena_rx_buffer *rx_info =
473 &rx_ring->rx_buffer_info[next_to_use];
474
475 rc = ena_alloc_rx_page(rx_ring, rx_info,
476 __GFP_COLD | GFP_ATOMIC | __GFP_COMP);
477 if (unlikely(rc < 0)) {
478 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
479 "failed to alloc buffer for rx queue %d\n",
480 rx_ring->qid);
481 break;
482 }
483 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
484 &rx_info->ena_buf,
485 next_to_use);
486 if (unlikely(rc)) {
487 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
488 "failed to add buffer for rx queue %d\n",
489 rx_ring->qid);
490 break;
491 }
492 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
493 rx_ring->ring_size);
494 }
495
496 if (unlikely(i < num)) {
497 u64_stats_update_begin(&rx_ring->syncp);
498 rx_ring->rx_stats.refil_partial++;
499 u64_stats_update_end(&rx_ring->syncp);
500 netdev_warn(rx_ring->netdev,
501 "refilled rx qid %d with only %d buffers (from %d)\n",
502 rx_ring->qid, i, num);
503 }
504
505 if (likely(i)) {
506 /* Add memory barrier to make sure the desc were written before
507 * issue a doorbell
508 */
509 wmb();
510 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
511 }
512
513 rx_ring->next_to_use = next_to_use;
514
515 return i;
516}
517
518static void ena_free_rx_bufs(struct ena_adapter *adapter,
519 u32 qid)
520{
521 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
522 u32 i;
523
524 for (i = 0; i < rx_ring->ring_size; i++) {
525 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
526
527 if (rx_info->page)
528 ena_free_rx_page(rx_ring, rx_info);
529 }
530}
531
532/* ena_refill_all_rx_bufs - allocate all queues Rx buffers
533 * @adapter: board private structure
534 *
535 */
536static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
537{
538 struct ena_ring *rx_ring;
539 int i, rc, bufs_num;
540
541 for (i = 0; i < adapter->num_queues; i++) {
542 rx_ring = &adapter->rx_ring[i];
543 bufs_num = rx_ring->ring_size - 1;
544 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
545
546 if (unlikely(rc != bufs_num))
547 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
548 "refilling Queue %d failed. allocated %d buffers from: %d\n",
549 i, rc, bufs_num);
550 }
551}
552
553static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
554{
555 int i;
556
557 for (i = 0; i < adapter->num_queues; i++)
558 ena_free_rx_bufs(adapter, i);
559}
560
561/* ena_free_tx_bufs - Free Tx Buffers per Queue
562 * @tx_ring: TX ring for which buffers be freed
563 */
564static void ena_free_tx_bufs(struct ena_ring *tx_ring)
565{
11a2f0ed 566 bool print_once = true;
1738cd3e
NB		 567 u32 i;
568
569 for (i = 0; i < tx_ring->ring_size; i++) {
570 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
571 struct ena_com_buf *ena_buf;
572 int nr_frags;
573 int j;
574
575 if (!tx_info->skb)
576 continue;
577
11a2f0ed
NB		 578 if (print_once) {
579 netdev_notice(tx_ring->netdev,
580 "free uncompleted tx skb qid %d idx 0x%x\n",
581 tx_ring->qid, i);
582 print_once = false;
583 } else {
584 netdev_dbg(tx_ring->netdev,
585 "free uncompleted tx skb qid %d idx 0x%x\n",
586 tx_ring->qid, i);
587 }
1738cd3e
NB		 588
589 ena_buf = tx_info->bufs;
590 dma_unmap_single(tx_ring->dev,
591 ena_buf->paddr,
592 ena_buf->len,
593 DMA_TO_DEVICE);
594
595 /* unmap remaining mapped pages */
596 nr_frags = tx_info->num_of_bufs - 1;
597 for (j = 0; j < nr_frags; j++) {
598 ena_buf++;
599 dma_unmap_page(tx_ring->dev,
600 ena_buf->paddr,
601 ena_buf->len,
602 DMA_TO_DEVICE);
603 }
604
605 dev_kfree_skb_any(tx_info->skb);
606 }
607 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
608 tx_ring->qid));
609}
610
611static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
612{
613 struct ena_ring *tx_ring;
614 int i;
615
616 for (i = 0; i < adapter->num_queues; i++) {
617 tx_ring = &adapter->tx_ring[i];
618 ena_free_tx_bufs(tx_ring);
619 }
620}
621
622static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
623{
624 u16 ena_qid;
625 int i;
626
627 for (i = 0; i < adapter->num_queues; i++) {
628 ena_qid = ENA_IO_TXQ_IDX(i);
629 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
630 }
631}
632
633static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
634{
635 u16 ena_qid;
636 int i;
637
638 for (i = 0; i < adapter->num_queues; i++) {
639 ena_qid = ENA_IO_RXQ_IDX(i);
640 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
641 }
642}
643
644static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
645{
646 ena_destroy_all_tx_queues(adapter);
647 ena_destroy_all_rx_queues(adapter);
648}
649
650static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
651{
652 struct ena_tx_buffer *tx_info = NULL;
653
654 if (likely(req_id < tx_ring->ring_size)) {
655 tx_info = &tx_ring->tx_buffer_info[req_id];
656 if (likely(tx_info->skb))
657 return 0;
658 }
659
660 if (tx_info)
661 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
662 "tx_info doesn't have valid skb\n");
663 else
664 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
665 "Invalid req_id: %hu\n", req_id);
666
667 u64_stats_update_begin(&tx_ring->syncp);
668 tx_ring->tx_stats.bad_req_id++;
669 u64_stats_update_end(&tx_ring->syncp);
670
671 /* Trigger device reset */
672 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
673 return -EFAULT;
674}
675
676static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
677{
678 struct netdev_queue *txq;
679 bool above_thresh;
680 u32 tx_bytes = 0;
681 u32 total_done = 0;
682 u16 next_to_clean;
683 u16 req_id;
684 int tx_pkts = 0;
685 int rc;
686
687 next_to_clean = tx_ring->next_to_clean;
688 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
689
690 while (tx_pkts < budget) {
691 struct ena_tx_buffer *tx_info;
692 struct sk_buff *skb;
693 struct ena_com_buf *ena_buf;
694 int i, nr_frags;
695
696 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
697 &req_id);
698 if (rc)
699 break;
700
701 rc = validate_tx_req_id(tx_ring, req_id);
702 if (rc)
703 break;
704
705 tx_info = &tx_ring->tx_buffer_info[req_id];
706 skb = tx_info->skb;
707
708 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
709 prefetch(&skb->end);
710
711 tx_info->skb = NULL;
712 tx_info->last_jiffies = 0;
713
714 if (likely(tx_info->num_of_bufs != 0)) {
715 ena_buf = tx_info->bufs;
716
717 dma_unmap_single(tx_ring->dev,
718 dma_unmap_addr(ena_buf, paddr),
719 dma_unmap_len(ena_buf, len),
720 DMA_TO_DEVICE);
721
722 /* unmap remaining mapped pages */
723 nr_frags = tx_info->num_of_bufs - 1;
724 for (i = 0; i < nr_frags; i++) {
725 ena_buf++;
726 dma_unmap_page(tx_ring->dev,
727 dma_unmap_addr(ena_buf, paddr),
728 dma_unmap_len(ena_buf, len),
729 DMA_TO_DEVICE);
730 }
731 }
732
733 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
734 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
735 skb);
736
737 tx_bytes += skb->len;
738 dev_kfree_skb(skb);
739 tx_pkts++;
740 total_done += tx_info->tx_descs;
741
742 tx_ring->free_tx_ids[next_to_clean] = req_id;
743 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
744 tx_ring->ring_size);
745 }
746
747 tx_ring->next_to_clean = next_to_clean;
748 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
749 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
750
751 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
752
753 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
754 "tx_poll: q %d done. total pkts: %d\n",
755 tx_ring->qid, tx_pkts);
756
757 /* need to make the rings circular update visible to
758 * ena_start_xmit() before checking for netif_queue_stopped().
759 */
760 smp_mb();
761
762 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
763 ENA_TX_WAKEUP_THRESH;
764 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
765 __netif_tx_lock(txq, smp_processor_id());
766 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
767 ENA_TX_WAKEUP_THRESH;
768 if (netif_tx_queue_stopped(txq) && above_thresh) {
769 netif_tx_wake_queue(txq);
770 u64_stats_update_begin(&tx_ring->syncp);
771 tx_ring->tx_stats.queue_wakeup++;
772 u64_stats_update_end(&tx_ring->syncp);
773 }
774 __netif_tx_unlock(txq);
775 }
776
777 tx_ring->per_napi_bytes += tx_bytes;
778 tx_ring->per_napi_packets += tx_pkts;
779
780 return tx_pkts;
781}
782
783static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
784 struct ena_com_rx_buf_info *ena_bufs,
785 u32 descs,
786 u16 *next_to_clean)
787{
788 struct sk_buff *skb;
789 struct ena_rx_buffer *rx_info =
790 &rx_ring->rx_buffer_info[*next_to_clean];
791 u32 len;
792 u32 buf = 0;
793 void *va;
794
795 len = ena_bufs[0].len;
796 if (unlikely(!rx_info->page)) {
797 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
798 "Page is NULL\n");
799 return NULL;
800 }
801
802 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
803 "rx_info %p page %p\n",
804 rx_info, rx_info->page);
805
806 /* save virt address of first buffer */
807 va = page_address(rx_info->page) + rx_info->page_offset;
808 prefetch(va + NET_IP_ALIGN);
809
810 if (len <= rx_ring->rx_copybreak) {
811 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
812 rx_ring->rx_copybreak);
813 if (unlikely(!skb)) {
814 u64_stats_update_begin(&rx_ring->syncp);
815 rx_ring->rx_stats.skb_alloc_fail++;
816 u64_stats_update_end(&rx_ring->syncp);
817 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
818 "Failed to allocate skb\n");
819 return NULL;
820 }
821
822 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
823 "rx allocated small packet. len %d. data_len %d\n",
824 skb->len, skb->data_len);
825
826 /* sync this buffer for CPU use */
827 dma_sync_single_for_cpu(rx_ring->dev,
828 dma_unmap_addr(&rx_info->ena_buf, paddr),
829 len,
830 DMA_FROM_DEVICE);
831 skb_copy_to_linear_data(skb, va, len);
832 dma_sync_single_for_device(rx_ring->dev,
833 dma_unmap_addr(&rx_info->ena_buf, paddr),
834 len,
835 DMA_FROM_DEVICE);
836
837 skb_put(skb, len);
838 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
839 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
840 rx_ring->ring_size);
841 return skb;
842 }
843
844 skb = napi_get_frags(rx_ring->napi);
845 if (unlikely(!skb)) {
846 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
847 "Failed allocating skb\n");
848 u64_stats_update_begin(&rx_ring->syncp);
849 rx_ring->rx_stats.skb_alloc_fail++;
850 u64_stats_update_end(&rx_ring->syncp);
851 return NULL;
852 }
853
854 do {
855 dma_unmap_page(rx_ring->dev,
856 dma_unmap_addr(&rx_info->ena_buf, paddr),
857 PAGE_SIZE, DMA_FROM_DEVICE);
858
859 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
860 rx_info->page_offset, len, PAGE_SIZE);
861
862 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
863 "rx skb updated. len %d. data_len %d\n",
864 skb->len, skb->data_len);
865
866 rx_info->page = NULL;
867 *next_to_clean =
868 ENA_RX_RING_IDX_NEXT(*next_to_clean,
869 rx_ring->ring_size);
870 if (likely(--descs == 0))
871 break;
872 rx_info = &rx_ring->rx_buffer_info[*next_to_clean];
873 len = ena_bufs[++buf].len;
874 } while (1);
875
876 return skb;
877}
878
879/* ena_rx_checksum - indicate in skb if hw indicated a good cksum
880 * @adapter: structure containing adapter specific data
881 * @ena_rx_ctx: received packet context/metadata
882 * @skb: skb currently being received and modified
883 */
884static inline void ena_rx_checksum(struct ena_ring *rx_ring,
885 struct ena_com_rx_ctx *ena_rx_ctx,
886 struct sk_buff *skb)
887{
888 /* Rx csum disabled */
889 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
890 skb->ip_summed = CHECKSUM_NONE;
891 return;
892 }
893
894 /* For fragmented packets the checksum isn't valid */
895 if (ena_rx_ctx->frag) {
896 skb->ip_summed = CHECKSUM_NONE;
897 return;
898 }
899
900 /* if IP and error */
901 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
902 (ena_rx_ctx->l3_csum_err))) {
903 /* ipv4 checksum error */
904 skb->ip_summed = CHECKSUM_NONE;
905 u64_stats_update_begin(&rx_ring->syncp);
906 rx_ring->rx_stats.bad_csum++;
907 u64_stats_update_end(&rx_ring->syncp);
908 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
909 "RX IPv4 header checksum error\n");
910 return;
911 }
912
913 /* if TCP/UDP */
914 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
915 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
916 if (unlikely(ena_rx_ctx->l4_csum_err)) {
917 /* TCP/UDP checksum error */
918 u64_stats_update_begin(&rx_ring->syncp);
919 rx_ring->rx_stats.bad_csum++;
920 u64_stats_update_end(&rx_ring->syncp);
921 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
922 "RX L4 checksum error\n");
923 skb->ip_summed = CHECKSUM_NONE;
924 return;
925 }
926
927 skb->ip_summed = CHECKSUM_UNNECESSARY;
928 }
929}
930
931static void ena_set_rx_hash(struct ena_ring *rx_ring,
932 struct ena_com_rx_ctx *ena_rx_ctx,
933 struct sk_buff *skb)
934{
935 enum pkt_hash_types hash_type;
936
937 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
938 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
939 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
940
941 hash_type = PKT_HASH_TYPE_L4;
942 else
943 hash_type = PKT_HASH_TYPE_NONE;
944
945 /* Override hash type if the packet is fragmented */
946 if (ena_rx_ctx->frag)
947 hash_type = PKT_HASH_TYPE_NONE;
948
949 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
950 }
951}
952
953/* ena_clean_rx_irq - Cleanup RX irq
954 * @rx_ring: RX ring to clean
955 * @napi: napi handler
956 * @budget: how many packets driver is allowed to clean
957 *
958 * Returns the number of cleaned buffers.
959 */
960static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
961 u32 budget)
962{
963 u16 next_to_clean = rx_ring->next_to_clean;
964 u32 res_budget, work_done;
965
966 struct ena_com_rx_ctx ena_rx_ctx;
967 struct ena_adapter *adapter;
968 struct sk_buff *skb;
969 int refill_required;
970 int refill_threshold;
971 int rc = 0;
972 int total_len = 0;
973 int rx_copybreak_pkt = 0;
974
975 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
976 "%s qid %d\n", __func__, rx_ring->qid);
977 res_budget = budget;
978
979 do {
980 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
981 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
982 ena_rx_ctx.descs = 0;
983 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
984 rx_ring->ena_com_io_sq,
985 &ena_rx_ctx);
986 if (unlikely(rc))
987 goto error;
988
989 if (unlikely(ena_rx_ctx.descs == 0))
990 break;
991
992 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
993 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
994 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
995 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
996
997 /* allocate skb and fill it */
998 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
999 &next_to_clean);
1000
1001 /* exit if we failed to retrieve a buffer */
1002 if (unlikely(!skb)) {
1003 next_to_clean = ENA_RX_RING_IDX_ADD(next_to_clean,
1004 ena_rx_ctx.descs,
1005 rx_ring->ring_size);
1006 break;
1007 }
1008
1009 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1010
1011 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1012
1013 skb_record_rx_queue(skb, rx_ring->qid);
1014
1015 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1016 total_len += rx_ring->ena_bufs[0].len;
1017 rx_copybreak_pkt++;
1018 napi_gro_receive(napi, skb);
1019 } else {
1020 total_len += skb->len;
1021 napi_gro_frags(napi);
1022 }
1023
1024 res_budget--;
1025 } while (likely(res_budget));
1026
1027 work_done = budget - res_budget;
1028 rx_ring->per_napi_bytes += total_len;
1029 rx_ring->per_napi_packets += work_done;
1030 u64_stats_update_begin(&rx_ring->syncp);
1031 rx_ring->rx_stats.bytes += total_len;
1032 rx_ring->rx_stats.cnt += work_done;
1033 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1034 u64_stats_update_end(&rx_ring->syncp);
1035
1036 rx_ring->next_to_clean = next_to_clean;
1037
1038 refill_required = ena_com_sq_empty_space(rx_ring->ena_com_io_sq);
1039 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER;
1040
1041 /* Optimization, try to batch new rx buffers */
1042 if (refill_required > refill_threshold) {
1043 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1044 ena_refill_rx_bufs(rx_ring, refill_required);
1045 }
1046
1047 return work_done;
1048
1049error:
1050 adapter = netdev_priv(rx_ring->netdev);
1051
1052 u64_stats_update_begin(&rx_ring->syncp);
1053 rx_ring->rx_stats.bad_desc_num++;
1054 u64_stats_update_end(&rx_ring->syncp);
1055
1056 /* Too many desc from the device. Trigger reset */
1057 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1058
1059 return 0;
1060}
1061
1062inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1063 struct ena_ring *tx_ring)
1064{
1065 /* We apply adaptive moderation on Rx path only.
1066 * Tx uses static interrupt moderation.
1067 */
1068 ena_com_calculate_interrupt_delay(rx_ring->ena_dev,
1069 rx_ring->per_napi_packets,
1070 rx_ring->per_napi_bytes,
1071 &rx_ring->smoothed_interval,
1072 &rx_ring->moder_tbl_idx);
1073
1074 /* Reset per napi packets/bytes */
1075 tx_ring->per_napi_packets = 0;
1076 tx_ring->per_napi_bytes = 0;
1077 rx_ring->per_napi_packets = 0;
1078 rx_ring->per_napi_bytes = 0;
1079}
1080
77f27aaa
NB		 1081static inline void ena_unmask_interrupt(struct ena_ring *tx_ring,
1082 struct ena_ring *rx_ring)
1083{
1084 struct ena_eth_io_intr_reg intr_reg;
1085
1086 /* Update intr register: rx intr delay,
1087 * tx intr delay and interrupt unmask
1088 */
1089 ena_com_update_intr_reg(&intr_reg,
1090 rx_ring->smoothed_interval,
1091 tx_ring->smoothed_interval,
1092 true);
1093
1094 /* It is a shared MSI-X.
1095 * Tx and Rx CQ have pointer to it.
1096 * So we use one of them to reach the intr reg
1097 */
1098 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1099}
1100
1738cd3e
NB		 1101static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1102 struct ena_ring *rx_ring)
1103{
1104 int cpu = get_cpu();
1105 int numa_node;
1106
1107 /* Check only one ring since the 2 rings are running on the same cpu */
1108 if (likely(tx_ring->cpu == cpu))
1109 goto out;
1110
1111 numa_node = cpu_to_node(cpu);
1112 put_cpu();
1113
1114 if (numa_node != NUMA_NO_NODE) {
1115 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1116 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1117 }
1118
1119 tx_ring->cpu = cpu;
1120 rx_ring->cpu = cpu;
1121
1122 return;
1123out:
1124 put_cpu();
1125}
1126
1127static int ena_io_poll(struct napi_struct *napi, int budget)
1128{
1129 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1130 struct ena_ring *tx_ring, *rx_ring;
1738cd3e
NB		 1131
1132 u32 tx_work_done;
1133 u32 rx_work_done;
1134 int tx_budget;
1135 int napi_comp_call = 0;
1136 int ret;
1137
1138 tx_ring = ena_napi->tx_ring;
1139 rx_ring = ena_napi->rx_ring;
1140
1141 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1142
d5796182
NB		 1143 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1144 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1738cd3e
NB		 1145 napi_complete_done(napi, 0);
1146 return 0;
1147 }
1148
1149 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1150 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1151
e9b1d2a8
NB		 1152 /* If the device is about to reset or down, avoid unmask
1153 * the interrupt and return 0 so NAPI won't reschedule
1154 */
1155 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1156 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1157 napi_complete_done(napi, 0);
1158 ret = 0;
1738cd3e 1159
e9b1d2a8 1160 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1738cd3e 1161 napi_comp_call = 1;
1738cd3e 1162
e9b1d2a8
NB		 1163 /* Update numa and unmask the interrupt only when schedule
1164 * from the interrupt context (vs from sk_busy_loop)
1738cd3e 1165 */
e9b1d2a8
NB		 1166 if (napi_complete_done(napi, rx_work_done)) {
1167 /* Tx and Rx share the same interrupt vector */
1168 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1169 ena_adjust_intr_moderation(rx_ring, tx_ring);
1170
77f27aaa 1171 ena_unmask_interrupt(tx_ring, rx_ring);
e9b1d2a8 1172 }
1738cd3e 1173
1738cd3e
NB		 1174 ena_update_ring_numa_node(tx_ring, rx_ring);
1175
1176 ret = rx_work_done;
1177 } else {
1178 ret = budget;
1179 }
1180
1181 u64_stats_update_begin(&tx_ring->syncp);
1182 tx_ring->tx_stats.napi_comp += napi_comp_call;
1183 tx_ring->tx_stats.tx_poll++;
1184 u64_stats_update_end(&tx_ring->syncp);
1185
1186 return ret;
1187}
1188
1189static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1190{
1191 struct ena_adapter *adapter = (struct ena_adapter *)data;
1192
1193 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1194
1195 /* Don't call the aenq handler before probe is done */
1196 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1197 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1198
1199 return IRQ_HANDLED;
1200}
1201
1202/* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1203 * @irq: interrupt number
1204 * @data: pointer to a network interface private napi device structure
1205 */
1206static irqreturn_t ena_intr_msix_io(int irq, void *data)
1207{
1208 struct ena_napi *ena_napi = data;
1209
1210 napi_schedule(&ena_napi->napi);
1211
1212 return IRQ_HANDLED;
1213}
1214
1215static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1216{
e328a031 1217 int msix_vecs, rc;
1738cd3e
NB		 1218
1219 /* Reserved the max msix vectors we might need */
1220 msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1221
1222 netif_dbg(adapter, probe, adapter->netdev,
1223 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1224
e328a031
CH		 1225 rc = pci_alloc_irq_vectors(adapter->pdev, msix_vecs, msix_vecs,
1226 PCI_IRQ_MSIX);
1227 if (rc < 0) {
1738cd3e
NB		 1228 netif_err(adapter, probe, adapter->netdev,
1229 "Failed to enable MSI-X, vectors %d rc %d\n",
1230 msix_vecs, rc);
1231 return -ENOSPC;
1232 }
1233
1234 netif_dbg(adapter, probe, adapter->netdev, "enable MSI-X, vectors %d\n",
1235 msix_vecs);
1236
1237 if (msix_vecs >= 1) {
1238 if (ena_init_rx_cpu_rmap(adapter))
1239 netif_warn(adapter, probe, adapter->netdev,
1240 "Failed to map IRQs to CPUs\n");
1241 }
1242
1243 adapter->msix_vecs = msix_vecs;
1738cd3e
NB		 1244
1245 return 0;
1246}
1247
1248static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1249{
1250 u32 cpu;
1251
1252 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1253 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1254 pci_name(adapter->pdev));
1255 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1256 ena_intr_msix_mgmnt;
1257 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1258 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
e328a031 1259 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1738cd3e
NB		 1260 cpu = cpumask_first(cpu_online_mask);
1261 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1262 cpumask_set_cpu(cpu,
1263 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1264}
1265
1266static void ena_setup_io_intr(struct ena_adapter *adapter)
1267{
1268 struct net_device *netdev;
1269 int irq_idx, i, cpu;
1270
1271 netdev = adapter->netdev;
1272
1273 for (i = 0; i < adapter->num_queues; i++) {
1274 irq_idx = ENA_IO_IRQ_IDX(i);
1275 cpu = i % num_online_cpus();
1276
1277 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1278 "%s-Tx-Rx-%d", netdev->name, i);
1279 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1280 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1281 adapter->irq_tbl[irq_idx].vector =
e328a031 1282 pci_irq_vector(adapter->pdev, irq_idx);
1738cd3e
NB		 1283 adapter->irq_tbl[irq_idx].cpu = cpu;
1284
1285 cpumask_set_cpu(cpu,
1286 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1287 }
1288}
1289
1290static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1291{
1292 unsigned long flags = 0;
1293 struct ena_irq *irq;
1294 int rc;
1295
1296 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1297 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1298 irq->data);
1299 if (rc) {
1300 netif_err(adapter, probe, adapter->netdev,
1301 "failed to request admin irq\n");
1302 return rc;
1303 }
1304
1305 netif_dbg(adapter, probe, adapter->netdev,
1306 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1307 irq->affinity_hint_mask.bits[0], irq->vector);
1308
1309 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1310
1311 return rc;
1312}
1313
1314static int ena_request_io_irq(struct ena_adapter *adapter)
1315{
1316 unsigned long flags = 0;
1317 struct ena_irq *irq;
1318 int rc = 0, i, k;
1319
1738cd3e
NB		 1320 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1321 irq = &adapter->irq_tbl[i];
1322 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1323 irq->data);
1324 if (rc) {
1325 netif_err(adapter, ifup, adapter->netdev,
1326 "Failed to request I/O IRQ. index %d rc %d\n",
1327 i, rc);
1328 goto err;
1329 }
1330
1331 netif_dbg(adapter, ifup, adapter->netdev,
1332 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1333 i, irq->affinity_hint_mask.bits[0], irq->vector);
1334
1335 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1336 }
1337
1338 return rc;
1339
1340err:
1341 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1342 irq = &adapter->irq_tbl[k];
1343 free_irq(irq->vector, irq->data);
1344 }
1345
1346 return rc;
1347}
1348
1349static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1350{
1351 struct ena_irq *irq;
1352
1353 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1354 synchronize_irq(irq->vector);
1355 irq_set_affinity_hint(irq->vector, NULL);
1356 free_irq(irq->vector, irq->data);
1357}
1358
1359static void ena_free_io_irq(struct ena_adapter *adapter)
1360{
1361 struct ena_irq *irq;
1362 int i;
1363
1364#ifdef CONFIG_RFS_ACCEL
1365 if (adapter->msix_vecs >= 1) {
1366 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1367 adapter->netdev->rx_cpu_rmap = NULL;
1368 }
1369#endif /* CONFIG_RFS_ACCEL */
1370
1371 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1372 irq = &adapter->irq_tbl[i];
1373 irq_set_affinity_hint(irq->vector, NULL);
1374 free_irq(irq->vector, irq->data);
1375 }
1376}
1377
1738cd3e
NB		 1378static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1379{
1380 int i;
1381
1382 if (!netif_running(adapter->netdev))
1383 return;
1384
1385 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1386 synchronize_irq(adapter->irq_tbl[i].vector);
1387}
1388
1389static void ena_del_napi(struct ena_adapter *adapter)
1390{
1391 int i;
1392
1393 for (i = 0; i < adapter->num_queues; i++)
1394 netif_napi_del(&adapter->ena_napi[i].napi);
1395}
1396
1397static void ena_init_napi(struct ena_adapter *adapter)
1398{
1399 struct ena_napi *napi;
1400 int i;
1401
1402 for (i = 0; i < adapter->num_queues; i++) {
1403 napi = &adapter->ena_napi[i];
1404
1405 netif_napi_add(adapter->netdev,
1406 &adapter->ena_napi[i].napi,
1407 ena_io_poll,
1408 ENA_NAPI_BUDGET);
1409 napi->rx_ring = &adapter->rx_ring[i];
1410 napi->tx_ring = &adapter->tx_ring[i];
1411 napi->qid = i;
1412 }
1413}
1414
1415static void ena_napi_disable_all(struct ena_adapter *adapter)
1416{
1417 int i;
1418
1419 for (i = 0; i < adapter->num_queues; i++)
1420 napi_disable(&adapter->ena_napi[i].napi);
1421}
1422
1423static void ena_napi_enable_all(struct ena_adapter *adapter)
1424{
1425 int i;
1426
1427 for (i = 0; i < adapter->num_queues; i++)
1428 napi_enable(&adapter->ena_napi[i].napi);
1429}
1430
1431static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1432{
1433 adapter->tx_usecs = 0;
1434 adapter->rx_usecs = 0;
1435 adapter->tx_frames = 1;
1436 adapter->rx_frames = 1;
1437}
1438
1439/* Configure the Rx forwarding */
1440static int ena_rss_configure(struct ena_adapter *adapter)
1441{
1442 struct ena_com_dev *ena_dev = adapter->ena_dev;
1443 int rc;
1444
1445 /* In case the RSS table wasn't initialized by probe */
1446 if (!ena_dev->rss.tbl_log_size) {
1447 rc = ena_rss_init_default(adapter);
1448 if (rc && (rc != -EPERM)) {
1449 netif_err(adapter, ifup, adapter->netdev,
1450 "Failed to init RSS rc: %d\n", rc);
1451 return rc;
1452 }
1453 }
1454
1455 /* Set indirect table */
1456 rc = ena_com_indirect_table_set(ena_dev);
1457 if (unlikely(rc && rc != -EPERM))
1458 return rc;
1459
1460 /* Configure hash function (if supported) */
1461 rc = ena_com_set_hash_function(ena_dev);
1462 if (unlikely(rc && (rc != -EPERM)))
1463 return rc;
1464
1465 /* Configure hash inputs (if supported) */
1466 rc = ena_com_set_hash_ctrl(ena_dev);
1467 if (unlikely(rc && (rc != -EPERM)))
1468 return rc;
1469
1470 return 0;
1471}
1472
1473static int ena_up_complete(struct ena_adapter *adapter)
1474{
1475 int rc, i;
1476
1477 rc = ena_rss_configure(adapter);
1478 if (rc)
1479 return rc;
1480
1481 ena_init_napi(adapter);
1482
1483 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1484
1485 ena_refill_all_rx_bufs(adapter);
1486
1487 /* enable transmits */
1488 netif_tx_start_all_queues(adapter->netdev);
1489
1490 ena_restore_ethtool_params(adapter);
1491
1492 ena_napi_enable_all(adapter);
1493
77f27aaa
NB		 1494 /* Enable completion queues interrupt */
1495 for (i = 0; i < adapter->num_queues; i++)
1496 ena_unmask_interrupt(&adapter->tx_ring[i],
1497 &adapter->rx_ring[i]);
1498
1738cd3e
NB		 1499 /* schedule napi in case we had pending packets
1500 * from the last time we disable napi
1501 */
1502 for (i = 0; i < adapter->num_queues; i++)
1503 napi_schedule(&adapter->ena_napi[i].napi);
1504
1505 return 0;
1506}
1507
1508static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1509{
1510 struct ena_com_create_io_ctx ctx = { 0 };
1511 struct ena_com_dev *ena_dev;
1512 struct ena_ring *tx_ring;
1513 u32 msix_vector;
1514 u16 ena_qid;
1515 int rc;
1516
1517 ena_dev = adapter->ena_dev;
1518
1519 tx_ring = &adapter->tx_ring[qid];
1520 msix_vector = ENA_IO_IRQ_IDX(qid);
1521 ena_qid = ENA_IO_TXQ_IDX(qid);
1522
1523 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1524 ctx.qid = ena_qid;
1525 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1526 ctx.msix_vector = msix_vector;
1527 ctx.queue_size = adapter->tx_ring_size;
1528 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1529
1530 rc = ena_com_create_io_queue(ena_dev, &ctx);
1531 if (rc) {
1532 netif_err(adapter, ifup, adapter->netdev,
1533 "Failed to create I/O TX queue num %d rc: %d\n",
1534 qid, rc);
1535 return rc;
1536 }
1537
1538 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1539 &tx_ring->ena_com_io_sq,
1540 &tx_ring->ena_com_io_cq);
1541 if (rc) {
1542 netif_err(adapter, ifup, adapter->netdev,
1543 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1544 qid, rc);
1545 ena_com_destroy_io_queue(ena_dev, ena_qid);
50b95fe7 1546 return rc;
1738cd3e
NB		 1547 }
1548
1549 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1550 return rc;
1551}
1552
1553static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1554{
1555 struct ena_com_dev *ena_dev = adapter->ena_dev;
1556 int rc, i;
1557
1558 for (i = 0; i < adapter->num_queues; i++) {
1559 rc = ena_create_io_tx_queue(adapter, i);
1560 if (rc)
1561 goto create_err;
1562 }
1563
1564 return 0;
1565
1566create_err:
1567 while (i--)
1568 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1569
1570 return rc;
1571}
1572
1573static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1574{
1575 struct ena_com_dev *ena_dev;
1576 struct ena_com_create_io_ctx ctx = { 0 };
1577 struct ena_ring *rx_ring;
1578 u32 msix_vector;
1579 u16 ena_qid;
1580 int rc;
1581
1582 ena_dev = adapter->ena_dev;
1583
1584 rx_ring = &adapter->rx_ring[qid];
1585 msix_vector = ENA_IO_IRQ_IDX(qid);
1586 ena_qid = ENA_IO_RXQ_IDX(qid);
1587
1588 ctx.qid = ena_qid;
1589 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1590 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1591 ctx.msix_vector = msix_vector;
1592 ctx.queue_size = adapter->rx_ring_size;
1593 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1594
1595 rc = ena_com_create_io_queue(ena_dev, &ctx);
1596 if (rc) {
1597 netif_err(adapter, ifup, adapter->netdev,
1598 "Failed to create I/O RX queue num %d rc: %d\n",
1599 qid, rc);
1600 return rc;
1601 }
1602
1603 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1604 &rx_ring->ena_com_io_sq,
1605 &rx_ring->ena_com_io_cq);
1606 if (rc) {
1607 netif_err(adapter, ifup, adapter->netdev,
1608 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1609 qid, rc);
1610 ena_com_destroy_io_queue(ena_dev, ena_qid);
50b95fe7 1611 return rc;
1738cd3e
NB		 1612 }
1613
1614 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1615
1616 return rc;
1617}
1618
1619static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1620{
1621 struct ena_com_dev *ena_dev = adapter->ena_dev;
1622 int rc, i;
1623
1624 for (i = 0; i < adapter->num_queues; i++) {
1625 rc = ena_create_io_rx_queue(adapter, i);
1626 if (rc)
1627 goto create_err;
1628 }
1629
1630 return 0;
1631
1632create_err:
1633 while (i--)
1634 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1635
1636 return rc;
1637}
1638
1639static int ena_up(struct ena_adapter *adapter)
1640{
1641 int rc;
1642
1643 netdev_dbg(adapter->netdev, "%s\n", __func__);
1644
1645 ena_setup_io_intr(adapter);
1646
1647 rc = ena_request_io_irq(adapter);
1648 if (rc)
1649 goto err_req_irq;
1650
1651 /* allocate transmit descriptors */
1652 rc = ena_setup_all_tx_resources(adapter);
1653 if (rc)
1654 goto err_setup_tx;
1655
1656 /* allocate receive descriptors */
1657 rc = ena_setup_all_rx_resources(adapter);
1658 if (rc)
1659 goto err_setup_rx;
1660
1661 /* Create TX queues */
1662 rc = ena_create_all_io_tx_queues(adapter);
1663 if (rc)
1664 goto err_create_tx_queues;
1665
1666 /* Create RX queues */
1667 rc = ena_create_all_io_rx_queues(adapter);
1668 if (rc)
1669 goto err_create_rx_queues;
1670
1671 rc = ena_up_complete(adapter);
1672 if (rc)
1673 goto err_up;
1674
1675 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1676 netif_carrier_on(adapter->netdev);
1677
1678 u64_stats_update_begin(&adapter->syncp);
1679 adapter->dev_stats.interface_up++;
1680 u64_stats_update_end(&adapter->syncp);
1681
1682 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1683
1684 return rc;
1685
1686err_up:
1687 ena_destroy_all_rx_queues(adapter);
1688err_create_rx_queues:
1689 ena_destroy_all_tx_queues(adapter);
1690err_create_tx_queues:
1691 ena_free_all_io_rx_resources(adapter);
1692err_setup_rx:
1693 ena_free_all_io_tx_resources(adapter);
1694err_setup_tx:
1695 ena_free_io_irq(adapter);
1696err_req_irq:
1697
1698 return rc;
1699}
1700
1701static void ena_down(struct ena_adapter *adapter)
1702{
1703 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1704
1705 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1706
1707 u64_stats_update_begin(&adapter->syncp);
1708 adapter->dev_stats.interface_down++;
1709 u64_stats_update_end(&adapter->syncp);
1710
1738cd3e
NB		 1711 netif_carrier_off(adapter->netdev);
1712 netif_tx_disable(adapter->netdev);
1713
d5796182
NB		 1714 /* After this point the napi handler won't enable the tx queue */
1715 ena_napi_disable_all(adapter);
1716
1738cd3e 1717 /* After destroy the queue there won't be any new interrupts */
d5796182
NB		 1718
1719 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1720 int rc;
1721
1722 rc = ena_com_dev_reset(adapter->ena_dev);
1723 if (rc)
1724 dev_err(&adapter->pdev->dev, "Device reset failed\n");
1725 }
1726
1738cd3e
NB		 1727 ena_destroy_all_io_queues(adapter);
1728
1729 ena_disable_io_intr_sync(adapter);
1730 ena_free_io_irq(adapter);
1731 ena_del_napi(adapter);
1732
1733 ena_free_all_tx_bufs(adapter);
1734 ena_free_all_rx_bufs(adapter);
1735 ena_free_all_io_tx_resources(adapter);
1736 ena_free_all_io_rx_resources(adapter);
1737}
1738
1739/* ena_open - Called when a network interface is made active
1740 * @netdev: network interface device structure
1741 *
1742 * Returns 0 on success, negative value on failure
1743 *
1744 * The open entry point is called when a network interface is made
1745 * active by the system (IFF_UP). At this point all resources needed
1746 * for transmit and receive operations are allocated, the interrupt
1747 * handler is registered with the OS, the watchdog timer is started,
1748 * and the stack is notified that the interface is ready.
1749 */
1750static int ena_open(struct net_device *netdev)
1751{
1752 struct ena_adapter *adapter = netdev_priv(netdev);
1753 int rc;
1754
1755 /* Notify the stack of the actual queue counts. */
1756 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1757 if (rc) {
1758 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1759 return rc;
1760 }
1761
1762 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
1763 if (rc) {
1764 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1765 return rc;
1766 }
1767
1768 rc = ena_up(adapter);
1769 if (rc)
1770 return rc;
1771
1772 return rc;
1773}
1774
1775/* ena_close - Disables a network interface
1776 * @netdev: network interface device structure
1777 *
1778 * Returns 0, this is not allowed to fail
1779 *
1780 * The close entry point is called when an interface is de-activated
1781 * by the OS. The hardware is still under the drivers control, but
1782 * needs to be disabled. A global MAC reset is issued to stop the
1783 * hardware, and all transmit and receive resources are freed.
1784 */
1785static int ena_close(struct net_device *netdev)
1786{
1787 struct ena_adapter *adapter = netdev_priv(netdev);
1788
1789 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
1790
1791 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
1792 ena_down(adapter);
1793
1794 return 0;
1795}
1796
1797static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1798{
1799 u32 mss = skb_shinfo(skb)->gso_size;
1800 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
1801 u8 l4_protocol = 0;
1802
1803 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
1804 ena_tx_ctx->l4_csum_enable = 1;
1805 if (mss) {
1806 ena_tx_ctx->tso_enable = 1;
1807 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
1808 ena_tx_ctx->l4_csum_partial = 0;
1809 } else {
1810 ena_tx_ctx->tso_enable = 0;
1811 ena_meta->l4_hdr_len = 0;
1812 ena_tx_ctx->l4_csum_partial = 1;
1813 }
1814
1815 switch (ip_hdr(skb)->version) {
1816 case IPVERSION:
1817 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
1818 if (ip_hdr(skb)->frag_off & htons(IP_DF))
1819 ena_tx_ctx->df = 1;
1820 if (mss)
1821 ena_tx_ctx->l3_csum_enable = 1;
1822 l4_protocol = ip_hdr(skb)->protocol;
1823 break;
1824 case 6:
1825 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
1826 l4_protocol = ipv6_hdr(skb)->nexthdr;
1827 break;
1828 default:
1829 break;
1830 }
1831
1832 if (l4_protocol == IPPROTO_TCP)
1833 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
1834 else
1835 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
1836
1837 ena_meta->mss = mss;
1838 ena_meta->l3_hdr_len = skb_network_header_len(skb);
1839 ena_meta->l3_hdr_offset = skb_network_offset(skb);
1840 ena_tx_ctx->meta_valid = 1;
1841
1842 } else {
1843 ena_tx_ctx->meta_valid = 0;
1844 }
1845}
1846
1847static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
1848 struct sk_buff *skb)
1849{
1850 int num_frags, header_len, rc;
1851
1852 num_frags = skb_shinfo(skb)->nr_frags;
1853 header_len = skb_headlen(skb);
1854
1855 if (num_frags < tx_ring->sgl_size)
1856 return 0;
1857
1858 if ((num_frags == tx_ring->sgl_size) &&
1859 (header_len < tx_ring->tx_max_header_size))
1860 return 0;
1861
1862 u64_stats_update_begin(&tx_ring->syncp);
1863 tx_ring->tx_stats.linearize++;
1864 u64_stats_update_end(&tx_ring->syncp);
1865
1866 rc = skb_linearize(skb);
1867 if (unlikely(rc)) {
1868 u64_stats_update_begin(&tx_ring->syncp);
1869 tx_ring->tx_stats.linearize_failed++;
1870 u64_stats_update_end(&tx_ring->syncp);
1871 }
1872
1873 return rc;
1874}
1875
1876/* Called with netif_tx_lock. */
1877static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
1878{
1879 struct ena_adapter *adapter = netdev_priv(dev);
1880 struct ena_tx_buffer *tx_info;
1881 struct ena_com_tx_ctx ena_tx_ctx;
1882 struct ena_ring *tx_ring;
1883 struct netdev_queue *txq;
1884 struct ena_com_buf *ena_buf;
1885 void *push_hdr;
1886 u32 len, last_frag;
1887 u16 next_to_use;
1888 u16 req_id;
1889 u16 push_len;
1890 u16 header_len;
1891 dma_addr_t dma;
1892 int qid, rc, nb_hw_desc;
1893 int i = -1;
1894
1895 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
1896 /* Determine which tx ring we will be placed on */
1897 qid = skb_get_queue_mapping(skb);
1898 tx_ring = &adapter->tx_ring[qid];
1899 txq = netdev_get_tx_queue(dev, qid);
1900
1901 rc = ena_check_and_linearize_skb(tx_ring, skb);
1902 if (unlikely(rc))
1903 goto error_drop_packet;
1904
1905 skb_tx_timestamp(skb);
1906 len = skb_headlen(skb);
1907
1908 next_to_use = tx_ring->next_to_use;
1909 req_id = tx_ring->free_tx_ids[next_to_use];
1910 tx_info = &tx_ring->tx_buffer_info[req_id];
1911 tx_info->num_of_bufs = 0;
1912
1913 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
1914 ena_buf = tx_info->bufs;
1915 tx_info->skb = skb;
1916
1917 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
1918 /* prepared the push buffer */
1919 push_len = min_t(u32, len, tx_ring->tx_max_header_size);
1920 header_len = push_len;
1921 push_hdr = skb->data;
1922 } else {
1923 push_len = 0;
1924 header_len = min_t(u32, len, tx_ring->tx_max_header_size);
1925 push_hdr = NULL;
1926 }
1927
1928 netif_dbg(adapter, tx_queued, dev,
1929 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
1930 push_hdr, push_len);
1931
1932 if (len > push_len) {
1933 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
1934 len - push_len, DMA_TO_DEVICE);
1935 if (dma_mapping_error(tx_ring->dev, dma))
1936 goto error_report_dma_error;
1937
1938 ena_buf->paddr = dma;
1939 ena_buf->len = len - push_len;
1940
1941 ena_buf++;
1942 tx_info->num_of_bufs++;
1943 }
1944
1945 last_frag = skb_shinfo(skb)->nr_frags;
1946
1947 for (i = 0; i < last_frag; i++) {
1948 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1949
1950 len = skb_frag_size(frag);
1951 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len,
1952 DMA_TO_DEVICE);
1953 if (dma_mapping_error(tx_ring->dev, dma))
1954 goto error_report_dma_error;
1955
1956 ena_buf->paddr = dma;
1957 ena_buf->len = len;
1958 ena_buf++;
1959 }
1960
1961 tx_info->num_of_bufs += last_frag;
1962
1963 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
1964 ena_tx_ctx.ena_bufs = tx_info->bufs;
1965 ena_tx_ctx.push_header = push_hdr;
1966 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
1967 ena_tx_ctx.req_id = req_id;
1968 ena_tx_ctx.header_len = header_len;
1969
1970 /* set flags and meta data */
1971 ena_tx_csum(&ena_tx_ctx, skb);
1972
1973 /* prepare the packet's descriptors to dma engine */
1974 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
1975 &nb_hw_desc);
1976
1977 if (unlikely(rc)) {
1978 netif_err(adapter, tx_queued, dev,
1979 "failed to prepare tx bufs\n");
1980 u64_stats_update_begin(&tx_ring->syncp);
1981 tx_ring->tx_stats.queue_stop++;
1982 tx_ring->tx_stats.prepare_ctx_err++;
1983 u64_stats_update_end(&tx_ring->syncp);
1984 netif_tx_stop_queue(txq);
1985 goto error_unmap_dma;
1986 }
1987
1988 netdev_tx_sent_queue(txq, skb->len);
1989
1990 u64_stats_update_begin(&tx_ring->syncp);
1991 tx_ring->tx_stats.cnt++;
1992 tx_ring->tx_stats.bytes += skb->len;
1993 u64_stats_update_end(&tx_ring->syncp);
1994
1995 tx_info->tx_descs = nb_hw_desc;
1996 tx_info->last_jiffies = jiffies;
1997
1998 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
1999 tx_ring->ring_size);
2000
2001 /* This WMB is aimed to:
2002 * 1 - perform smp barrier before reading next_to_completion
2003 * 2 - make sure the desc were written before trigger DB
2004 */
2005 wmb();
2006
2007 /* stop the queue when no more space available, the packet can have up
2008 * to sgl_size + 2. one for the meta descriptor and one for header
2009 * (if the header is larger than tx_max_header_size).
2010 */
2011 if (unlikely(ena_com_sq_empty_space(tx_ring->ena_com_io_sq) <
2012 (tx_ring->sgl_size + 2))) {
2013 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2014 __func__, qid);
2015
2016 netif_tx_stop_queue(txq);
2017 u64_stats_update_begin(&tx_ring->syncp);
2018 tx_ring->tx_stats.queue_stop++;
2019 u64_stats_update_end(&tx_ring->syncp);
2020
2021 /* There is a rare condition where this function decide to
2022 * stop the queue but meanwhile clean_tx_irq updates
2023 * next_to_completion and terminates.
2024 * The queue will remain stopped forever.
2025 * To solve this issue this function perform rmb, check
2026 * the wakeup condition and wake up the queue if needed.
2027 */
2028 smp_rmb();
2029
2030 if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq)
2031 > ENA_TX_WAKEUP_THRESH) {
2032 netif_tx_wake_queue(txq);
2033 u64_stats_update_begin(&tx_ring->syncp);
2034 tx_ring->tx_stats.queue_wakeup++;
2035 u64_stats_update_end(&tx_ring->syncp);
2036 }
2037 }
2038
2039 if (netif_xmit_stopped(txq) || !skb->xmit_more) {
2040 /* trigger the dma engine */
2041 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2042 u64_stats_update_begin(&tx_ring->syncp);
2043 tx_ring->tx_stats.doorbells++;
2044 u64_stats_update_end(&tx_ring->syncp);
2045 }
2046
2047 return NETDEV_TX_OK;
2048
2049error_report_dma_error:
2050 u64_stats_update_begin(&tx_ring->syncp);
2051 tx_ring->tx_stats.dma_mapping_err++;
2052 u64_stats_update_end(&tx_ring->syncp);
2053 netdev_warn(adapter->netdev, "failed to map skb\n");
2054
2055 tx_info->skb = NULL;
2056
2057error_unmap_dma:
2058 if (i >= 0) {
2059 /* save value of frag that failed */
2060 last_frag = i;
2061
2062 /* start back at beginning and unmap skb */
2063 tx_info->skb = NULL;
2064 ena_buf = tx_info->bufs;
2065 dma_unmap_single(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2066 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2067
2068 /* unmap remaining mapped pages */
2069 for (i = 0; i < last_frag; i++) {
2070 ena_buf++;
2071 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2072 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2073 }
2074 }
2075
2076error_drop_packet:
2077
2078 dev_kfree_skb(skb);
2079 return NETDEV_TX_OK;
2080}
2081
2082#ifdef CONFIG_NET_POLL_CONTROLLER
2083static void ena_netpoll(struct net_device *netdev)
2084{
2085 struct ena_adapter *adapter = netdev_priv(netdev);
2086 int i;
2087
d5796182
NB		 2088 /* Dont schedule NAPI if the driver is in the middle of reset
2089 * or netdev is down.
2090 */
2091
2092 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags) ||
2093 test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2094 return;
2095
1738cd3e
NB		 2096 for (i = 0; i < adapter->num_queues; i++)
2097 napi_schedule(&adapter->ena_napi[i].napi);
2098}
2099#endif /* CONFIG_NET_POLL_CONTROLLER */
2100
2101static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2102 void *accel_priv, select_queue_fallback_t fallback)
2103{
2104 u16 qid;
2105 /* we suspect that this is good for in--kernel network services that
2106 * want to loop incoming skb rx to tx in normal user generated traffic,
2107 * most probably we will not get to this
2108 */
2109 if (skb_rx_queue_recorded(skb))
2110 qid = skb_get_rx_queue(skb);
2111 else
2112 qid = fallback(dev, skb);
2113
2114 return qid;
2115}
2116
2117static void ena_config_host_info(struct ena_com_dev *ena_dev)
2118{
2119 struct ena_admin_host_info *host_info;
2120 int rc;
2121
2122 /* Allocate only the host info */
2123 rc = ena_com_allocate_host_info(ena_dev);
2124 if (rc) {
2125 pr_err("Cannot allocate host info\n");
2126 return;
2127 }
2128
2129 host_info = ena_dev->host_attr.host_info;
2130
2131 host_info->os_type = ENA_ADMIN_OS_LINUX;
2132 host_info->kernel_ver = LINUX_VERSION_CODE;
2133 strncpy(host_info->kernel_ver_str, utsname()->version,
2134 sizeof(host_info->kernel_ver_str) - 1);
2135 host_info->os_dist = 0;
2136 strncpy(host_info->os_dist_str, utsname()->release,
2137 sizeof(host_info->os_dist_str) - 1);
2138 host_info->driver_version =
2139 (DRV_MODULE_VER_MAJOR) |
2140 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2141 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
2142
2143 rc = ena_com_set_host_attributes(ena_dev);
2144 if (rc) {
2145 if (rc == -EPERM)
2146 pr_warn("Cannot set host attributes\n");
2147 else
2148 pr_err("Cannot set host attributes\n");
2149
2150 goto err;
2151 }
2152
2153 return;
2154
2155err:
2156 ena_com_delete_host_info(ena_dev);
2157}
2158
2159static void ena_config_debug_area(struct ena_adapter *adapter)
2160{
2161 u32 debug_area_size;
2162 int rc, ss_count;
2163
2164 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2165 if (ss_count <= 0) {
2166 netif_err(adapter, drv, adapter->netdev,
2167 "SS count is negative\n");
2168 return;
2169 }
2170
2171 /* allocate 32 bytes for each string and 64bit for the value */
2172 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2173
2174 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2175 if (rc) {
2176 pr_err("Cannot allocate debug area\n");
2177 return;
2178 }
2179
2180 rc = ena_com_set_host_attributes(adapter->ena_dev);
2181 if (rc) {
2182 if (rc == -EPERM)
2183 netif_warn(adapter, drv, adapter->netdev,
2184 "Cannot set host attributes\n");
2185 else
2186 netif_err(adapter, drv, adapter->netdev,
2187 "Cannot set host attributes\n");
2188 goto err;
2189 }
2190
2191 return;
2192err:
2193 ena_com_delete_debug_area(adapter->ena_dev);
2194}
2195
2196static struct rtnl_link_stats64 *ena_get_stats64(struct net_device *netdev,
2197 struct rtnl_link_stats64 *stats)
2198{
2199 struct ena_adapter *adapter = netdev_priv(netdev);
e487b3b0
NB		 2200 struct ena_ring *rx_ring, *tx_ring;
2201 unsigned int start;
2202 u64 rx_drops;
2203 int i;
1738cd3e
NB		 2204
2205 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2206 return NULL;
2207
e487b3b0
NB		 2208 for (i = 0; i < adapter->num_queues; i++) {
2209 u64 bytes, packets;
2210
2211 tx_ring = &adapter->tx_ring[i];
1738cd3e 2212
e487b3b0
NB		 2213 do {
2214 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2215 packets = tx_ring->tx_stats.cnt;
2216 bytes = tx_ring->tx_stats.bytes;
2217 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1738cd3e 2218
e487b3b0
NB		 2219 stats->tx_packets += packets;
2220 stats->tx_bytes += bytes;
2221
2222 rx_ring = &adapter->rx_ring[i];
2223
2224 do {
2225 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2226 packets = rx_ring->rx_stats.cnt;
2227 bytes = rx_ring->rx_stats.bytes;
2228 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2229
2230 stats->rx_packets += packets;
2231 stats->rx_bytes += bytes;
2232 }
2233
2234 do {
2235 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2236 rx_drops = adapter->dev_stats.rx_drops;
2237 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
1738cd3e 2238
e487b3b0 2239 stats->rx_dropped = rx_drops;
1738cd3e
NB		 2240
2241 stats->multicast = 0;
2242 stats->collisions = 0;
2243
2244 stats->rx_length_errors = 0;
2245 stats->rx_crc_errors = 0;
2246 stats->rx_frame_errors = 0;
2247 stats->rx_fifo_errors = 0;
2248 stats->rx_missed_errors = 0;
2249 stats->tx_window_errors = 0;
2250
2251 stats->rx_errors = 0;
2252 stats->tx_errors = 0;
2253
2254 return stats;
2255}
2256
2257static const struct net_device_ops ena_netdev_ops = {
2258 .ndo_open = ena_open,
2259 .ndo_stop = ena_close,
2260 .ndo_start_xmit = ena_start_xmit,
2261 .ndo_select_queue = ena_select_queue,
2262 .ndo_get_stats64 = ena_get_stats64,
2263 .ndo_tx_timeout = ena_tx_timeout,
2264 .ndo_change_mtu = ena_change_mtu,
2265 .ndo_set_mac_address = NULL,
2266 .ndo_validate_addr = eth_validate_addr,
2267#ifdef CONFIG_NET_POLL_CONTROLLER
2268 .ndo_poll_controller = ena_netpoll,
2269#endif /* CONFIG_NET_POLL_CONTROLLER */
2270};
2271
2272static void ena_device_io_suspend(struct work_struct *work)
2273{
2274 struct ena_adapter *adapter =
2275 container_of(work, struct ena_adapter, suspend_io_task);
2276 struct net_device *netdev = adapter->netdev;
2277
2278 /* ena_napi_disable_all disables only the IO handling.
2279 * We are still subject to AENQ keep alive watchdog.
2280 */
2281 u64_stats_update_begin(&adapter->syncp);
2282 adapter->dev_stats.io_suspend++;
2283 u64_stats_update_begin(&adapter->syncp);
2284 ena_napi_disable_all(adapter);
2285 netif_tx_lock(netdev);
2286 netif_device_detach(netdev);
2287 netif_tx_unlock(netdev);
2288}
2289
2290static void ena_device_io_resume(struct work_struct *work)
2291{
2292 struct ena_adapter *adapter =
2293 container_of(work, struct ena_adapter, resume_io_task);
2294 struct net_device *netdev = adapter->netdev;
2295
2296 u64_stats_update_begin(&adapter->syncp);
2297 adapter->dev_stats.io_resume++;
2298 u64_stats_update_end(&adapter->syncp);
2299
2300 netif_device_attach(netdev);
2301 ena_napi_enable_all(adapter);
2302}
2303
2304static int ena_device_validate_params(struct ena_adapter *adapter,
2305 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2306{
2307 struct net_device *netdev = adapter->netdev;
2308 int rc;
2309
2310 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2311 adapter->mac_addr);
2312 if (!rc) {
2313 netif_err(adapter, drv, netdev,
2314 "Error, mac address are different\n");
2315 return -EINVAL;
2316 }
2317
2318 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2319 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2320 netif_err(adapter, drv, netdev,
2321 "Error, device doesn't support enough queues\n");
2322 return -EINVAL;
2323 }
2324
2325 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2326 netif_err(adapter, drv, netdev,
2327 "Error, device max mtu is smaller than netdev MTU\n");
2328 return -EINVAL;
2329 }
2330
2331 return 0;
2332}
2333
2334static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2335 struct ena_com_dev_get_features_ctx *get_feat_ctx,
2336 bool *wd_state)
2337{
2338 struct device *dev = &pdev->dev;
2339 bool readless_supported;
2340 u32 aenq_groups;
2341 int dma_width;
2342 int rc;
2343
2344 rc = ena_com_mmio_reg_read_request_init(ena_dev);
2345 if (rc) {
2346 dev_err(dev, "failed to init mmio read less\n");
2347 return rc;
2348 }
2349
2350 /* The PCIe configuration space revision id indicate if mmio reg
2351 * read is disabled
2352 */
2353 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2354 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2355
2356 rc = ena_com_dev_reset(ena_dev);
2357 if (rc) {
2358 dev_err(dev, "Can not reset device\n");
2359 goto err_mmio_read_less;
2360 }
2361
2362 rc = ena_com_validate_version(ena_dev);
2363 if (rc) {
2364 dev_err(dev, "device version is too low\n");
2365 goto err_mmio_read_less;
2366 }
2367
2368 dma_width = ena_com_get_dma_width(ena_dev);
2369 if (dma_width < 0) {
2370 dev_err(dev, "Invalid dma width value %d", dma_width);
6e22066f 2371 rc = dma_width;
1738cd3e
NB		 2372 goto err_mmio_read_less;
2373 }
2374
2375 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2376 if (rc) {
2377 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2378 goto err_mmio_read_less;
2379 }
2380
2381 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2382 if (rc) {
2383 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2384 rc);
2385 goto err_mmio_read_less;
2386 }
2387
2388 /* ENA admin level init */
2389 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);
2390 if (rc) {
2391 dev_err(dev,
2392 "Can not initialize ena admin queue with device\n");
2393 goto err_mmio_read_less;
2394 }
2395
2396 /* To enable the msix interrupts the driver needs to know the number
2397 * of queues. So the driver uses polling mode to retrieve this
2398 * information
2399 */
2400 ena_com_set_admin_polling_mode(ena_dev, true);
2401
bb2eb26a
NB		 2402 ena_config_host_info(ena_dev);
2403
1738cd3e
NB		 2404 /* Get Device Attributes*/
2405 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2406 if (rc) {
2407 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2408 goto err_admin_init;
2409 }
2410
2411 /* Try to turn all the available aenq groups */
2412 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2413 BIT(ENA_ADMIN_FATAL_ERROR) |
2414 BIT(ENA_ADMIN_WARNING) |
2415 BIT(ENA_ADMIN_NOTIFICATION) |
2416 BIT(ENA_ADMIN_KEEP_ALIVE);
2417
2418 aenq_groups &= get_feat_ctx->aenq.supported_groups;
2419
2420 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2421 if (rc) {
2422 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2423 goto err_admin_init;
2424 }
2425
2426 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2427
1738cd3e
NB		 2428 return 0;
2429
2430err_admin_init:
bb2eb26a 2431 ena_com_delete_host_info(ena_dev);
1738cd3e
NB		 2432 ena_com_admin_destroy(ena_dev);
2433err_mmio_read_less:
2434 ena_com_mmio_reg_read_request_destroy(ena_dev);
2435
2436 return rc;
2437}
2438
2439static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2440 int io_vectors)
2441{
2442 struct ena_com_dev *ena_dev = adapter->ena_dev;
2443 struct device *dev = &adapter->pdev->dev;
2444 int rc;
2445
2446 rc = ena_enable_msix(adapter, io_vectors);
2447 if (rc) {
2448 dev_err(dev, "Can not reserve msix vectors\n");
2449 return rc;
2450 }
2451
2452 ena_setup_mgmnt_intr(adapter);
2453
2454 rc = ena_request_mgmnt_irq(adapter);
2455 if (rc) {
2456 dev_err(dev, "Can not setup management interrupts\n");
2457 goto err_disable_msix;
2458 }
2459
2460 ena_com_set_admin_polling_mode(ena_dev, false);
2461
2462 ena_com_admin_aenq_enable(ena_dev);
2463
2464 return 0;
2465
2466err_disable_msix:
e328a031 2467 pci_free_irq_vectors(adapter->pdev);
1738cd3e
NB		 2468 return rc;
2469}
2470
2471static void ena_fw_reset_device(struct work_struct *work)
2472{
2473 struct ena_com_dev_get_features_ctx get_feat_ctx;
2474 struct ena_adapter *adapter =
2475 container_of(work, struct ena_adapter, reset_task);
2476 struct net_device *netdev = adapter->netdev;
2477 struct ena_com_dev *ena_dev = adapter->ena_dev;
2478 struct pci_dev *pdev = adapter->pdev;
2479 bool dev_up, wd_state;
2480 int rc;
2481
d5796182
NB		 2482 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2483 dev_err(&pdev->dev,
2484 "device reset schedule while reset bit is off\n");
2485 return;
2486 }
2487
2488 netif_carrier_off(netdev);
2489
1738cd3e
NB		 2490 del_timer_sync(&adapter->timer_service);
2491
2492 rtnl_lock();
2493
2494 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2495 ena_com_set_admin_running_state(ena_dev, false);
2496
2497 /* After calling ena_close the tx queues and the napi
2498 * are disabled so no one can interfere or touch the
2499 * data structures
2500 */
2501 ena_close(netdev);
2502
1738cd3e
NB		 2503 ena_free_mgmnt_irq(adapter);
2504
e328a031 2505 pci_free_irq_vectors(adapter->pdev);
1738cd3e
NB		 2506
2507 ena_com_abort_admin_commands(ena_dev);
2508
2509 ena_com_wait_for_abort_completion(ena_dev);
2510
2511 ena_com_admin_destroy(ena_dev);
2512
2513 ena_com_mmio_reg_read_request_destroy(ena_dev);
2514
d5796182
NB		 2515 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2516
1738cd3e
NB		 2517 /* Finish with the destroy part. Start the init part */
2518
2519 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2520 if (rc) {
2521 dev_err(&pdev->dev, "Can not initialize device\n");
2522 goto err;
2523 }
2524 adapter->wd_state = wd_state;
2525
2526 rc = ena_device_validate_params(adapter, &get_feat_ctx);
2527 if (rc) {
2528 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2529 goto err_device_destroy;
2530 }
2531
2532 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2533 adapter->num_queues);
2534 if (rc) {
2535 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2536 goto err_device_destroy;
2537 }
2538 /* If the interface was up before the reset bring it up */
2539 if (dev_up) {
2540 rc = ena_up(adapter);
2541 if (rc) {
2542 dev_err(&pdev->dev, "Failed to create I/O queues\n");
2543 goto err_disable_msix;
2544 }
2545 }
2546
2547 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2548
2549 rtnl_unlock();
2550
2551 dev_err(&pdev->dev, "Device reset completed successfully\n");
2552
2553 return;
2554err_disable_msix:
2555 ena_free_mgmnt_irq(adapter);
e328a031 2556 pci_free_irq_vectors(adapter->pdev);
1738cd3e
NB		 2557err_device_destroy:
2558 ena_com_admin_destroy(ena_dev);
2559err:
2560 rtnl_unlock();
2561
dee93ee4
NB		 2562 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2563
1738cd3e
NB		 2564 dev_err(&pdev->dev,
2565 "Reset attempt failed. Can not reset the device\n");
2566}
2567
2568static void check_for_missing_tx_completions(struct ena_adapter *adapter)
2569{
2570 struct ena_tx_buffer *tx_buf;
2571 unsigned long last_jiffies;
2572 struct ena_ring *tx_ring;
2573 int i, j, budget;
2574 u32 missed_tx;
2575
2576 /* Make sure the driver doesn't turn the device in other process */
2577 smp_rmb();
2578
2579 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2580 return;
2581
d5796182
NB		 2582 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2583 return;
2584
1738cd3e
NB		 2585 budget = ENA_MONITORED_TX_QUEUES;
2586
2587 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2588 tx_ring = &adapter->tx_ring[i];
2589
2590 for (j = 0; j < tx_ring->ring_size; j++) {
2591 tx_buf = &tx_ring->tx_buffer_info[j];
2592 last_jiffies = tx_buf->last_jiffies;
2593 if (unlikely(last_jiffies && time_is_before_jiffies(last_jiffies + TX_TIMEOUT))) {
2594 netif_notice(adapter, tx_err, adapter->netdev,
2595 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2596 tx_ring->qid, j);
2597
2598 u64_stats_update_begin(&tx_ring->syncp);
2599 missed_tx = tx_ring->tx_stats.missing_tx_comp++;
2600 u64_stats_update_end(&tx_ring->syncp);
2601
2602 /* Clear last jiffies so the lost buffer won't
2603 * be counted twice.
2604 */
2605 tx_buf->last_jiffies = 0;
2606
2607 if (unlikely(missed_tx > MAX_NUM_OF_TIMEOUTED_PACKETS)) {
2608 netif_err(adapter, tx_err, adapter->netdev,
2609 "The number of lost tx completion is above the threshold (%d > %d). Reset the device\n",
2610 missed_tx, MAX_NUM_OF_TIMEOUTED_PACKETS);
2611 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2612 }
2613 }
2614 }
2615
2616 budget--;
2617 if (!budget)
2618 break;
2619 }
2620
2621 adapter->last_monitored_tx_qid = i % adapter->num_queues;
2622}
2623
2624/* Check for keep alive expiration */
2625static void check_for_missing_keep_alive(struct ena_adapter *adapter)
2626{
2627 unsigned long keep_alive_expired;
2628
2629 if (!adapter->wd_state)
2630 return;
2631
2632 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies
2633 + ENA_DEVICE_KALIVE_TIMEOUT);
2634 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
2635 netif_err(adapter, drv, adapter->netdev,
2636 "Keep alive watchdog timeout.\n");
2637 u64_stats_update_begin(&adapter->syncp);
2638 adapter->dev_stats.wd_expired++;
2639 u64_stats_update_end(&adapter->syncp);
2640 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2641 }
2642}
2643
2644static void check_for_admin_com_state(struct ena_adapter *adapter)
2645{
2646 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
2647 netif_err(adapter, drv, adapter->netdev,
2648 "ENA admin queue is not in running state!\n");
2649 u64_stats_update_begin(&adapter->syncp);
2650 adapter->dev_stats.admin_q_pause++;
2651 u64_stats_update_end(&adapter->syncp);
2652 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2653 }
2654}
2655
2656static void ena_update_host_info(struct ena_admin_host_info *host_info,
2657 struct net_device *netdev)
2658{
2659 host_info->supported_network_features[0] =
2660 netdev->features & GENMASK_ULL(31, 0);
2661 host_info->supported_network_features[1] =
2662 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
2663}
2664
2665static void ena_timer_service(unsigned long data)
2666{
2667 struct ena_adapter *adapter = (struct ena_adapter *)data;
2668 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
2669 struct ena_admin_host_info *host_info =
2670 adapter->ena_dev->host_attr.host_info;
2671
2672 check_for_missing_keep_alive(adapter);
2673
2674 check_for_admin_com_state(adapter);
2675
2676 check_for_missing_tx_completions(adapter);
2677
2678 if (debug_area)
2679 ena_dump_stats_to_buf(adapter, debug_area);
2680
2681 if (host_info)
2682 ena_update_host_info(host_info, adapter->netdev);
2683
d5796182 2684 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
1738cd3e
NB		 2685 netif_err(adapter, drv, adapter->netdev,
2686 "Trigger reset is on\n");
2687 ena_dump_stats_to_dmesg(adapter);
2688 queue_work(ena_wq, &adapter->reset_task);
2689 return;
2690 }
2691
2692 /* Reset the timer */
2693 mod_timer(&adapter->timer_service, jiffies + HZ);
2694}
2695
2696static int ena_calc_io_queue_num(struct pci_dev *pdev,
2697 struct ena_com_dev *ena_dev,
2698 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2699{
2700 int io_sq_num, io_queue_num;
2701
2702 /* In case of LLQ use the llq number in the get feature cmd */
2703 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2704 io_sq_num = get_feat_ctx->max_queues.max_llq_num;
2705
2706 if (io_sq_num == 0) {
2707 dev_err(&pdev->dev,
2708 "Trying to use LLQ but llq_num is 0. Fall back into regular queues\n");
2709
2710 ena_dev->tx_mem_queue_type =
2711 ENA_ADMIN_PLACEMENT_POLICY_HOST;
2712 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2713 }
2714 } else {
2715 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2716 }
2717
c9b0b2cf 2718 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
1738cd3e
NB		 2719 io_queue_num = min_t(int, io_queue_num, io_sq_num);
2720 io_queue_num = min_t(int, io_queue_num,
2721 get_feat_ctx->max_queues.max_cq_num);
2722 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
2723 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
2724 if (unlikely(!io_queue_num)) {
2725 dev_err(&pdev->dev, "The device doesn't have io queues\n");
2726 return -EFAULT;
2727 }
2728
2729 return io_queue_num;
2730}
2731
184b49c8
RR		 2732static void ena_set_push_mode(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
2733 struct ena_com_dev_get_features_ctx *get_feat_ctx)
1738cd3e
NB		 2734{
2735 bool has_mem_bar;
2736
2737 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
2738
2739 /* Enable push mode if device supports LLQ */
2740 if (has_mem_bar && (get_feat_ctx->max_queues.max_llq_num > 0))
2741 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV;
2742 else
2743 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1738cd3e
NB		 2744}
2745
2746static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
2747 struct net_device *netdev)
2748{
2749 netdev_features_t dev_features = 0;
2750
2751 /* Set offload features */
2752 if (feat->offload.tx &
2753 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
2754 dev_features |= NETIF_F_IP_CSUM;
2755
2756 if (feat->offload.tx &
2757 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
2758 dev_features |= NETIF_F_IPV6_CSUM;
2759
2760 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
2761 dev_features |= NETIF_F_TSO;
2762
2763 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
2764 dev_features |= NETIF_F_TSO6;
2765
2766 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
2767 dev_features |= NETIF_F_TSO_ECN;
2768
2769 if (feat->offload.rx_supported &
2770 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
2771 dev_features |= NETIF_F_RXCSUM;
2772
2773 if (feat->offload.rx_supported &
2774 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
2775 dev_features |= NETIF_F_RXCSUM;
2776
2777 netdev->features =
2778 dev_features |
2779 NETIF_F_SG |
1738cd3e
NB		 2780 NETIF_F_RXHASH |
2781 NETIF_F_HIGHDMA;
2782
2783 netdev->hw_features |= netdev->features;
2784 netdev->vlan_features |= netdev->features;
2785}
2786
2787static void ena_set_conf_feat_params(struct ena_adapter *adapter,
2788 struct ena_com_dev_get_features_ctx *feat)
2789{
2790 struct net_device *netdev = adapter->netdev;
2791
2792 /* Copy mac address */
2793 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
2794 eth_hw_addr_random(netdev);
2795 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
2796 } else {
2797 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
2798 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
2799 }
2800
2801 /* Set offload features */
2802 ena_set_dev_offloads(feat, netdev);
2803
2804 adapter->max_mtu = feat->dev_attr.max_mtu;
d894be57
JW		 2805 netdev->max_mtu = adapter->max_mtu;
2806 netdev->min_mtu = ENA_MIN_MTU;
1738cd3e
NB		 2807}
2808
2809static int ena_rss_init_default(struct ena_adapter *adapter)
2810{
2811 struct ena_com_dev *ena_dev = adapter->ena_dev;
2812 struct device *dev = &adapter->pdev->dev;
2813 int rc, i;
2814 u32 val;
2815
2816 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
2817 if (unlikely(rc)) {
2818 dev_err(dev, "Cannot init indirect table\n");
2819 goto err_rss_init;
2820 }
2821
2822 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
2823 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
2824 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
2825 ENA_IO_RXQ_IDX(val));
2826 if (unlikely(rc && (rc != -EPERM))) {
2827 dev_err(dev, "Cannot fill indirect table\n");
2828 goto err_fill_indir;
2829 }
2830 }
2831
2832 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
2833 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
2834 if (unlikely(rc && (rc != -EPERM))) {
2835 dev_err(dev, "Cannot fill hash function\n");
2836 goto err_fill_indir;
2837 }
2838
2839 rc = ena_com_set_default_hash_ctrl(ena_dev);
2840 if (unlikely(rc && (rc != -EPERM))) {
2841 dev_err(dev, "Cannot fill hash control\n");
2842 goto err_fill_indir;
2843 }
2844
2845 return 0;
2846
2847err_fill_indir:
2848 ena_com_rss_destroy(ena_dev);
2849err_rss_init:
2850
2851 return rc;
2852}
2853
2854static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
2855{
2856 int release_bars;
2857
b0f66a00
NB		 2858 if (ena_dev->mem_bar)
2859 devm_iounmap(&pdev->dev, ena_dev->mem_bar);
2860
2861 devm_iounmap(&pdev->dev, ena_dev->reg_bar);
2862
1738cd3e
NB		 2863 release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2864 pci_release_selected_regions(pdev, release_bars);
2865}
2866
2867static int ena_calc_queue_size(struct pci_dev *pdev,
2868 struct ena_com_dev *ena_dev,
2869 u16 *max_tx_sgl_size,
2870 u16 *max_rx_sgl_size,
2871 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2872{
2873 u32 queue_size = ENA_DEFAULT_RING_SIZE;
2874
2875 queue_size = min_t(u32, queue_size,
2876 get_feat_ctx->max_queues.max_cq_depth);
2877 queue_size = min_t(u32, queue_size,
2878 get_feat_ctx->max_queues.max_sq_depth);
2879
2880 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2881 queue_size = min_t(u32, queue_size,
2882 get_feat_ctx->max_queues.max_llq_depth);
2883
2884 queue_size = rounddown_pow_of_two(queue_size);
2885
2886 if (unlikely(!queue_size)) {
2887 dev_err(&pdev->dev, "Invalid queue size\n");
2888 return -EFAULT;
2889 }
2890
2891 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2892 get_feat_ctx->max_queues.max_packet_tx_descs);
2893 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2894 get_feat_ctx->max_queues.max_packet_rx_descs);
2895
2896 return queue_size;
2897}
2898
2899/* ena_probe - Device Initialization Routine
2900 * @pdev: PCI device information struct
2901 * @ent: entry in ena_pci_tbl
2902 *
2903 * Returns 0 on success, negative on failure
2904 *
2905 * ena_probe initializes an adapter identified by a pci_dev structure.
2906 * The OS initialization, configuring of the adapter private structure,
2907 * and a hardware reset occur.
2908 */
2909static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2910{
2911 struct ena_com_dev_get_features_ctx get_feat_ctx;
2912 static int version_printed;
2913 struct net_device *netdev;
2914 struct ena_adapter *adapter;
2915 struct ena_com_dev *ena_dev = NULL;
2916 static int adapters_found;
2917 int io_queue_num, bars, rc;
2918 int queue_size;
2919 u16 tx_sgl_size = 0;
2920 u16 rx_sgl_size = 0;
2921 bool wd_state;
2922
2923 dev_dbg(&pdev->dev, "%s\n", __func__);
2924
2925 if (version_printed++ == 0)
2926 dev_info(&pdev->dev, "%s", version);
2927
2928 rc = pci_enable_device_mem(pdev);
2929 if (rc) {
2930 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
2931 return rc;
2932 }
2933
2934 pci_set_master(pdev);
2935
2936 ena_dev = vzalloc(sizeof(*ena_dev));
2937 if (!ena_dev) {
2938 rc = -ENOMEM;
2939 goto err_disable_device;
2940 }
2941
2942 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2943 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
2944 if (rc) {
2945 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
2946 rc);
2947 goto err_free_ena_dev;
2948 }
2949
b0f66a00
NB		 2950 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
2951 pci_resource_start(pdev, ENA_REG_BAR),
2952 pci_resource_len(pdev, ENA_REG_BAR));
1738cd3e
NB		 2953 if (!ena_dev->reg_bar) {
2954 dev_err(&pdev->dev, "failed to remap regs bar\n");
2955 rc = -EFAULT;
2956 goto err_free_region;
2957 }
2958
2959 ena_dev->dmadev = &pdev->dev;
2960
2961 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
2962 if (rc) {
2963 dev_err(&pdev->dev, "ena device init failed\n");
2964 if (rc == -ETIME)
2965 rc = -EPROBE_DEFER;
2966 goto err_free_region;
2967 }
2968
184b49c8 2969 ena_set_push_mode(pdev, ena_dev, &get_feat_ctx);
1738cd3e
NB		 2970
2971 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
b0f66a00
NB		 2972 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
2973 pci_resource_start(pdev, ENA_MEM_BAR),
2974 pci_resource_len(pdev, ENA_MEM_BAR));
1738cd3e
NB		 2975 if (!ena_dev->mem_bar) {
2976 rc = -EFAULT;
2977 goto err_device_destroy;
2978 }
2979 }
2980
2981 /* initial Tx interrupt delay, Assumes 1 usec granularity.
2982 * Updated during device initialization with the real granularity
2983 */
2984 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
2985 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
2986 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
2987 &rx_sgl_size, &get_feat_ctx);
2988 if ((queue_size <= 0) || (io_queue_num <= 0)) {
2989 rc = -EFAULT;
2990 goto err_device_destroy;
2991 }
2992
2993 dev_info(&pdev->dev, "creating %d io queues. queue size: %d\n",
2994 io_queue_num, queue_size);
2995
2996 /* dev zeroed in init_etherdev */
2997 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
2998 if (!netdev) {
2999 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
3000 rc = -ENOMEM;
3001 goto err_device_destroy;
3002 }
3003
3004 SET_NETDEV_DEV(netdev, &pdev->dev);
3005
3006 adapter = netdev_priv(netdev);
3007 pci_set_drvdata(pdev, adapter);
3008
3009 adapter->ena_dev = ena_dev;
3010 adapter->netdev = netdev;
3011 adapter->pdev = pdev;
3012
3013 ena_set_conf_feat_params(adapter, &get_feat_ctx);
3014
3015 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3016
3017 adapter->tx_ring_size = queue_size;
3018 adapter->rx_ring_size = queue_size;
3019
3020 adapter->max_tx_sgl_size = tx_sgl_size;
3021 adapter->max_rx_sgl_size = rx_sgl_size;
3022
3023 adapter->num_queues = io_queue_num;
3024 adapter->last_monitored_tx_qid = 0;
3025
3026 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3027 adapter->wd_state = wd_state;
3028
3029 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3030
3031 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3032 if (rc) {
3033 dev_err(&pdev->dev,
3034 "Failed to query interrupt moderation feature\n");
3035 goto err_netdev_destroy;
3036 }
3037 ena_init_io_rings(adapter);
3038
3039 netdev->netdev_ops = &ena_netdev_ops;
3040 netdev->watchdog_timeo = TX_TIMEOUT;
3041 ena_set_ethtool_ops(netdev);
3042
3043 netdev->priv_flags |= IFF_UNICAST_FLT;
3044
3045 u64_stats_init(&adapter->syncp);
3046
3047 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3048 if (rc) {
3049 dev_err(&pdev->dev,
3050 "Failed to enable and set the admin interrupts\n");
3051 goto err_worker_destroy;
3052 }
3053 rc = ena_rss_init_default(adapter);
3054 if (rc && (rc != -EPERM)) {
3055 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3056 goto err_free_msix;
3057 }
3058
3059 ena_config_debug_area(adapter);
3060
3061 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3062
3063 netif_carrier_off(netdev);
3064
3065 rc = register_netdev(netdev);
3066 if (rc) {
3067 dev_err(&pdev->dev, "Cannot register net device\n");
3068 goto err_rss;
3069 }
3070
3071 INIT_WORK(&adapter->suspend_io_task, ena_device_io_suspend);
3072 INIT_WORK(&adapter->resume_io_task, ena_device_io_resume);
3073 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3074
3075 adapter->last_keep_alive_jiffies = jiffies;
3076
f850b4a7
WY		 3077 setup_timer(&adapter->timer_service, ena_timer_service,
3078 (unsigned long)adapter);
3079 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
1738cd3e
NB		 3080
3081 dev_info(&pdev->dev, "%s found at mem %lx, mac addr %pM Queues %d\n",
3082 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3083 netdev->dev_addr, io_queue_num);
3084
3085 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3086
3087 adapters_found++;
3088
3089 return 0;
3090
3091err_rss:
3092 ena_com_delete_debug_area(ena_dev);
3093 ena_com_rss_destroy(ena_dev);
3094err_free_msix:
3095 ena_com_dev_reset(ena_dev);
3096 ena_free_mgmnt_irq(adapter);
e328a031 3097 pci_free_irq_vectors(adapter->pdev);
1738cd3e
NB		 3098err_worker_destroy:
3099 ena_com_destroy_interrupt_moderation(ena_dev);
3100 del_timer(&adapter->timer_service);
3101 cancel_work_sync(&adapter->suspend_io_task);
3102 cancel_work_sync(&adapter->resume_io_task);
3103err_netdev_destroy:
3104 free_netdev(netdev);
3105err_device_destroy:
3106 ena_com_delete_host_info(ena_dev);
3107 ena_com_admin_destroy(ena_dev);
3108err_free_region:
3109 ena_release_bars(ena_dev, pdev);
3110err_free_ena_dev:
1738cd3e
NB		 3111 vfree(ena_dev);
3112err_disable_device:
3113 pci_disable_device(pdev);
3114 return rc;
3115}
3116
3117/*****************************************************************************/
3118static int ena_sriov_configure(struct pci_dev *dev, int numvfs)
3119{
3120 int rc;
3121
3122 if (numvfs > 0) {
3123 rc = pci_enable_sriov(dev, numvfs);
3124 if (rc != 0) {
3125 dev_err(&dev->dev,
3126 "pci_enable_sriov failed to enable: %d vfs with the error: %d\n",
3127 numvfs, rc);
3128 return rc;
3129 }
3130
3131 return numvfs;
3132 }
3133
3134 if (numvfs == 0) {
3135 pci_disable_sriov(dev);
3136 return 0;
3137 }
3138
3139 return -EINVAL;
3140}
3141
3142/*****************************************************************************/
3143/*****************************************************************************/
3144
3145/* ena_remove - Device Removal Routine
3146 * @pdev: PCI device information struct
3147 *
3148 * ena_remove is called by the PCI subsystem to alert the driver
3149 * that it should release a PCI device.
3150 */
3151static void ena_remove(struct pci_dev *pdev)
3152{
3153 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3154 struct ena_com_dev *ena_dev;
3155 struct net_device *netdev;
3156
1738cd3e
NB		 3157 ena_dev = adapter->ena_dev;
3158 netdev = adapter->netdev;
3159
3160#ifdef CONFIG_RFS_ACCEL
3161 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3162 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3163 netdev->rx_cpu_rmap = NULL;
3164 }
3165#endif /* CONFIG_RFS_ACCEL */
3166
3167 unregister_netdev(netdev);
3168 del_timer_sync(&adapter->timer_service);
3169
3170 cancel_work_sync(&adapter->reset_task);
3171
3172 cancel_work_sync(&adapter->suspend_io_task);
3173
3174 cancel_work_sync(&adapter->resume_io_task);
3175
dee93ee4
NB		 3176 /* Reset the device only if the device is running. */
3177 if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3178 ena_com_dev_reset(ena_dev);
1738cd3e
NB		 3179
3180 ena_free_mgmnt_irq(adapter);
3181
e328a031 3182 pci_free_irq_vectors(adapter->pdev);
1738cd3e
NB		 3183
3184 free_netdev(netdev);
3185
3186 ena_com_mmio_reg_read_request_destroy(ena_dev);
3187
3188 ena_com_abort_admin_commands(ena_dev);
3189
3190 ena_com_wait_for_abort_completion(ena_dev);
3191
3192 ena_com_admin_destroy(ena_dev);
3193
3194 ena_com_rss_destroy(ena_dev);
3195
3196 ena_com_delete_debug_area(ena_dev);
3197
3198 ena_com_delete_host_info(ena_dev);
3199
3200 ena_release_bars(ena_dev, pdev);
3201
1738cd3e
NB		 3202 pci_disable_device(pdev);
3203
3204 ena_com_destroy_interrupt_moderation(ena_dev);
3205
3206 vfree(ena_dev);
3207}
3208
3209static struct pci_driver ena_pci_driver = {
3210 .name = DRV_MODULE_NAME,
3211 .id_table = ena_pci_tbl,
3212 .probe = ena_probe,
3213 .remove = ena_remove,
3214 .sriov_configure = ena_sriov_configure,
3215};
3216
3217static int __init ena_init(void)
3218{
3219 pr_info("%s", version);
3220
3221 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3222 if (!ena_wq) {
3223 pr_err("Failed to create workqueue\n");
3224 return -ENOMEM;
3225 }
3226
3227 return pci_register_driver(&ena_pci_driver);
3228}
3229
3230static void __exit ena_cleanup(void)
3231{
3232 pci_unregister_driver(&ena_pci_driver);
3233
3234 if (ena_wq) {
3235 destroy_workqueue(ena_wq);
3236 ena_wq = NULL;
3237 }
3238}
3239
3240/******************************************************************************
3241 ******************************** AENQ Handlers *******************************
3242 *****************************************************************************/
3243/* ena_update_on_link_change:
3244 * Notify the network interface about the change in link status
3245 */
3246static void ena_update_on_link_change(void *adapter_data,
3247 struct ena_admin_aenq_entry *aenq_e)
3248{
3249 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3250 struct ena_admin_aenq_link_change_desc *aenq_desc =
3251 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3252 int status = aenq_desc->flags &
3253 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3254
3255 if (status) {
3256 netdev_dbg(adapter->netdev, "%s\n", __func__);
3257 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3258 netif_carrier_on(adapter->netdev);
3259 } else {
3260 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3261 netif_carrier_off(adapter->netdev);
3262 }
3263}
3264
3265static void ena_keep_alive_wd(void *adapter_data,
3266 struct ena_admin_aenq_entry *aenq_e)
3267{
3268 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3269
3270 adapter->last_keep_alive_jiffies = jiffies;
3271}
3272
3273static void ena_notification(void *adapter_data,
3274 struct ena_admin_aenq_entry *aenq_e)
3275{
3276 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3277
3278 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3279 "Invalid group(%x) expected %x\n",
3280 aenq_e->aenq_common_desc.group,
3281 ENA_ADMIN_NOTIFICATION);
3282
3283 switch (aenq_e->aenq_common_desc.syndrom) {
3284 case ENA_ADMIN_SUSPEND:
3285 /* Suspend just the IO queues.
3286 * We deliberately don't suspend admin so the timer and
3287 * the keep_alive events should remain.
3288 */
3289 queue_work(ena_wq, &adapter->suspend_io_task);
3290 break;
3291 case ENA_ADMIN_RESUME:
3292 queue_work(ena_wq, &adapter->resume_io_task);
3293 break;
3294 default:
3295 netif_err(adapter, drv, adapter->netdev,
3296 "Invalid aenq notification link state %d\n",
3297 aenq_e->aenq_common_desc.syndrom);
3298 }
3299}
3300
3301/* This handler will called for unknown event group or unimplemented handlers*/
3302static void unimplemented_aenq_handler(void *data,
3303 struct ena_admin_aenq_entry *aenq_e)
3304{
3305 struct ena_adapter *adapter = (struct ena_adapter *)data;
3306
3307 netif_err(adapter, drv, adapter->netdev,
3308 "Unknown event was received or event with unimplemented handler\n");
3309}
3310
3311static struct ena_aenq_handlers aenq_handlers = {
3312 .handlers = {
3313 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3314 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3315 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3316 },
3317 .unimplemented_handler = unimplemented_aenq_handler
3318};
3319
3320module_init(ena_init);
3321module_exit(ena_cleanup);
ubuntu-zesty-kernel mirror