[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / cxlflash / common.h

/*
 * CXL Flash Device Driver
 *
 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
 *             Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
 *
 * Copyright (C) 2015 IBM Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _CXLFLASH_COMMON_H
#define _CXLFLASH_COMMON_H

#include <linux/list.h>
#include <linux/rwsem.h>
#include <linux/types.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>

extern const struct file_operations cxlflash_cxl_fops;

#define MAX_CONTEXT  CXLFLASH_MAX_CONTEXT       /* num contexts per afu */

#define CXLFLASH_BLOCK_SIZE	4096	/* 4K blocks */
#define CXLFLASH_MAX_XFER_SIZE	16777216	/* 16MB transfer */
#define CXLFLASH_MAX_SECTORS	(CXLFLASH_MAX_XFER_SIZE/512)	/* SCSI wants
								   max_sectors
								   in units of
								   512 byte
								   sectors
								*/

#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))

/* AFU command retry limit */
#define MC_RETRY_CNT         5	/* sufficient for SCSI check and
				   certain AFU errors */

/* Command management definitions */
#define CXLFLASH_NUM_CMDS	(2 * CXLFLASH_MAX_CMDS)	/* Must be a pow2 for
							   alignment and more
							   efficient array
							   index derivation
							 */

#define CXLFLASH_MAX_CMDS               256
#define CXLFLASH_MAX_CMDS_PER_LUN       CXLFLASH_MAX_CMDS

/* RRQ for master issued cmds */
#define NUM_RRQ_ENTRY                   CXLFLASH_MAX_CMDS

/* SQ for master issued cmds */
#define NUM_SQ_ENTRY			CXLFLASH_MAX_CMDS


static inline void check_sizes(void)
{
	BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
}

/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
#define CMD_BUFSIZE     SIZE_4K

enum cxlflash_lr_state {
	LINK_RESET_INVALID,
	LINK_RESET_REQUIRED,
	LINK_RESET_COMPLETE
};

enum cxlflash_init_state {
	INIT_STATE_NONE,
	INIT_STATE_PCI,
	INIT_STATE_AFU,
	INIT_STATE_SCSI
};

enum cxlflash_state {
	STATE_NORMAL,	/* Normal running state, everything good */
	STATE_RESET,	/* Reset state, trying to reset/recover */
	STATE_FAILTERM	/* Failed/terminating state, error out users/threads */
};

/*
 * Each context has its own set of resource handles that is visible
 * only from that context.
 */

struct cxlflash_cfg {
	struct afu *afu;
	struct cxl_context *mcctx;

	struct pci_dev *dev;
	struct pci_device_id *dev_id;
	struct Scsi_Host *host;

	ulong cxlflash_regs_pci;

	struct work_struct work_q;
	enum cxlflash_init_state init_state;
	enum cxlflash_lr_state lr_state;
	int lr_port;
	atomic_t scan_host_needed;

	struct cxl_afu *cxl_afu;

	atomic_t recovery_threads;
	struct mutex ctx_recovery_mutex;
	struct mutex ctx_tbl_list_mutex;
	struct rw_semaphore ioctl_rwsem;
	struct ctx_info *ctx_tbl[MAX_CONTEXT];
	struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
	struct file_operations cxl_fops;

	/* Parameters that are LUN table related */
	int last_lun_index[CXLFLASH_NUM_FC_PORTS];
	int promote_lun_index;
	struct list_head lluns; /* list of llun_info structs */

	wait_queue_head_t tmf_waitq;
	spinlock_t tmf_slock;
	bool tmf_active;
	wait_queue_head_t reset_waitq;
	enum cxlflash_state state;
};

struct afu_cmd {
	struct sisl_ioarcb rcb;	/* IOARCB (cache line aligned) */
	struct sisl_ioasa sa;	/* IOASA must follow IOARCB */
	struct afu *parent;
	struct scsi_cmnd *scp;
	struct completion cevent;

	u8 cmd_tmf:1;

	/* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
	 * However for performance reasons the IOARCB/IOASA should be
	 * cache line aligned.
	 */
} __aligned(cache_line_size());

static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc)
{
	return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
}

static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc)
{
	struct afu_cmd *afuc = sc_to_afuc(sc);

	memset(afuc, 0, sizeof(*afuc));
	return afuc;
}

struct afu {
	/* Stuff requiring alignment go first. */
	struct sisl_ioarcb sq[NUM_SQ_ENTRY];		/* 16K SQ */
	u64 rrq_entry[NUM_RRQ_ENTRY];			/* 2K RRQ */

	/* Beware of alignment till here. Preferably introduce new
	 * fields after this point
	 */

	int (*send_cmd)(struct afu *, struct afu_cmd *);
	void (*context_reset)(struct afu_cmd *);

	/* AFU HW */
	struct cxl_ioctl_start_work work;
	struct cxlflash_afu_map __iomem *afu_map;	/* entire MMIO map */
	struct sisl_host_map __iomem *host_map;		/* MC host map */
	struct sisl_ctrl_map __iomem *ctrl_map;		/* MC control map */

	ctx_hndl_t ctx_hndl;	/* master's context handle */

	atomic_t hsq_credits;
	spinlock_t hsq_slock;
	struct sisl_ioarcb *hsq_start;
	struct sisl_ioarcb *hsq_end;
	struct sisl_ioarcb *hsq_curr;
	u64 *hrrq_start;
	u64 *hrrq_end;
	u64 *hrrq_curr;
	bool toggle;
	atomic_t cmds_active;	/* Number of currently active AFU commands */
	s64 room;
	spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
	u64 hb;
	u32 internal_lun;	/* User-desired LUN mode for this AFU */

	char version[16];
	u64 interface_version;

	struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */

};

static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
{
	u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;

	return afu_cap & cmd_mode;
}

static inline bool afu_is_sq_cmd_mode(struct afu *afu)
{
	return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
}

static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
{
	return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
}

static inline u64 lun_to_lunid(u64 lun)
{
	__be64 lun_id;

	int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
	return be64_to_cpu(lun_id);
}

int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
void cxlflash_list_init(void);
void cxlflash_term_global_luns(void);
void cxlflash_free_errpage(void);
int cxlflash_ioctl(struct scsi_device *, int, void __user *);
void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *);
int cxlflash_mark_contexts_error(struct cxlflash_cfg *);
void cxlflash_term_local_luns(struct cxlflash_cfg *);
void cxlflash_restore_luntable(struct cxlflash_cfg *);

#endif /* ifndef _CXLFLASH_COMMON_H */
Commit	Line	Data
c21e0bbf MO	1	/*
	2	* CXL Flash Device Driver
	3	*
	4	* Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
	5	* Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
	6	*
	7	* Copyright (C) 2015 IBM Corporation
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	#ifndef _CXLFLASH_COMMON_H
	16	#define _CXLFLASH_COMMON_H
	17
	18	#include <linux/list.h>
0a27ae51	19	#include <linux/rwsem.h>
c21e0bbf MO	20	#include <linux/types.h>
c21e0bbf MO	21	#include <scsi/scsi.h>
5fbb96c8	22	#include <scsi/scsi_cmnd.h>
c21e0bbf MO	23	#include <scsi/scsi_device.h>
c21e0bbf MO	24
17ead26f	25	extern const struct file_operations cxlflash_cxl_fops;
c21e0bbf MO	26
	27	#define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
	28
	29	#define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */
	30	#define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */
	31	#define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants
	32	max_sectors
	33	in units of
	34	512 byte
	35	sectors
	36	*/
	37
c21e0bbf MO	38	#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
	39
	40	/* AFU command retry limit */
	41	#define MC_RETRY_CNT 5 /* sufficient for SCSI check and
	42	certain AFU errors */
	43
	44	/* Command management definitions */
	45	#define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for
	46	alignment and more
	47	efficient array
	48	index derivation
	49	*/
	50
83430833	51	#define CXLFLASH_MAX_CMDS 256
c21e0bbf MO	52	#define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS
c21e0bbf MO	53
83430833 MK	54	/* RRQ for master issued cmds */
	55	#define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS
	56
bae0ac69 MO	57	/* SQ for master issued cmds */
	58	#define NUM_SQ_ENTRY CXLFLASH_MAX_CMDS
	59
c21e0bbf MO	60
	61	static inline void check_sizes(void)
	62	{
	63	BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
	64	}
	65
	66	/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
	67	#define CMD_BUFSIZE SIZE_4K
	68
c21e0bbf MO	69	enum cxlflash_lr_state {
	70	LINK_RESET_INVALID,
	71	LINK_RESET_REQUIRED,
	72	LINK_RESET_COMPLETE
	73	};
	74
	75	enum cxlflash_init_state {
	76	INIT_STATE_NONE,
	77	INIT_STATE_PCI,
	78	INIT_STATE_AFU,
	79	INIT_STATE_SCSI
	80	};
	81
5cdac81a MO	82	enum cxlflash_state {
5cdac81a MO	83	STATE_NORMAL, /* Normal running state, everything good */
439e85c1	84	STATE_RESET, /* Reset state, trying to reset/recover */
5cdac81a MO	85	STATE_FAILTERM /* Failed/terminating state, error out users/threads */
	86	};
	87
c21e0bbf MO	88	/*
	89	* Each context has its own set of resource handles that is visible
	90	* only from that context.
	91	*/
	92
	93	struct cxlflash_cfg {
	94	struct afu *afu;
	95	struct cxl_context *mcctx;
	96
	97	struct pci_dev *dev;
	98	struct pci_device_id *dev_id;
	99	struct Scsi_Host *host;
	100
	101	ulong cxlflash_regs_pci;
	102
c21e0bbf MO	103	struct work_struct work_q;
	104	enum cxlflash_init_state init_state;
	105	enum cxlflash_lr_state lr_state;
	106	int lr_port;
ef51074a	107	atomic_t scan_host_needed;
c21e0bbf MO	108
c21e0bbf MO	109	struct cxl_afu *cxl_afu;
c21e0bbf	110
65be2c79 MO	111	atomic_t recovery_threads;
	112	struct mutex ctx_recovery_mutex;
	113	struct mutex ctx_tbl_list_mutex;
0a27ae51	114	struct rw_semaphore ioctl_rwsem;
65be2c79 MO	115	struct ctx_info *ctx_tbl[MAX_CONTEXT];
	116	struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
	117	struct file_operations cxl_fops;
	118
2cb79266 MO	119	/* Parameters that are LUN table related */
	120	int last_lun_index[CXLFLASH_NUM_FC_PORTS];
	121	int promote_lun_index;
65be2c79 MO	122	struct list_head lluns; /* list of llun_info structs */
65be2c79 MO	123
c21e0bbf	124	wait_queue_head_t tmf_waitq;
018d1dc9	125	spinlock_t tmf_slock;
c21e0bbf	126	bool tmf_active;
439e85c1	127	wait_queue_head_t reset_waitq;
5cdac81a	128	enum cxlflash_state state;
c21e0bbf MO	129	};
	130
	131	struct afu_cmd {
	132	struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
	133	struct sisl_ioasa sa; /* IOASA must follow IOARCB */
c21e0bbf	134	struct afu *parent;
fe7f9698	135	struct scsi_cmnd *scp;
9ba848ac	136	struct completion cevent;
c21e0bbf MO	137
	138	u8 cmd_tmf:1;
	139
	140	/* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
	141	* However for performance reasons the IOARCB/IOASA should be
	142	* cache line aligned.
	143	*/
	144	} __aligned(cache_line_size());
	145
5fbb96c8 MO	146	static inline struct afu_cmd sc_to_afuc(struct scsi_cmnd sc)
	147	{
	148	return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
	149	}
	150
	151	static inline struct afu_cmd sc_to_afucz(struct scsi_cmnd sc)
	152	{
	153	struct afu_cmd *afuc = sc_to_afuc(sc);
	154
	155	memset(afuc, 0, sizeof(*afuc));
	156	return afuc;
	157	}
	158
c21e0bbf MO	159	struct afu {
c21e0bbf MO	160	/* Stuff requiring alignment go first. */
bae0ac69 MO	161	struct sisl_ioarcb sq[NUM_SQ_ENTRY]; /* 16K SQ */
bae0ac69 MO	162	u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */
c21e0bbf MO	163
	164	/* Beware of alignment till here. Preferably introduce new
	165	* fields after this point
	166	*/
	167
48b4be36 MO	168	int (send_cmd)(struct afu , struct afu_cmd *);
	169	void (context_reset)(struct afu_cmd );
	170
c21e0bbf MO	171	/* AFU HW */
c21e0bbf MO	172	struct cxl_ioctl_start_work work;
1786f4a0 MO	173	struct cxlflash_afu_map __iomem afu_map; / entire MMIO map */
	174	struct sisl_host_map __iomem host_map; / MC host map */
	175	struct sisl_ctrl_map __iomem ctrl_map; / MC control map */
c21e0bbf MO	176
c21e0bbf MO	177	ctx_hndl_t ctx_hndl; /* master's context handle */
bae0ac69 MO	178
	179	atomic_t hsq_credits;
	180	spinlock_t hsq_slock;
	181	struct sisl_ioarcb *hsq_start;
	182	struct sisl_ioarcb *hsq_end;
	183	struct sisl_ioarcb *hsq_curr;
c21e0bbf MO	184	u64 *hrrq_start;
	185	u64 *hrrq_end;
	186	u64 *hrrq_curr;
	187	bool toggle;
de01283b	188	atomic_t cmds_active; /* Number of currently active AFU commands */
11f7b184 UK	189	s64 room;
11f7b184 UK	190	spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
c21e0bbf	191	u64 hb;
c21e0bbf MO	192	u32 internal_lun; /* User-desired LUN mode for this AFU */
c21e0bbf MO	193
e5ce067b	194	char version[16];
c21e0bbf MO	195	u64 interface_version;
	196
	197	struct cxlflash_cfg parent; / Pointer back to parent cxlflash_cfg */
	198
	199	};
	200
bae0ac69 MO	201	static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
	202	{
	203	u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;
	204
	205	return afu_cap & cmd_mode;
	206	}
	207
	208	static inline bool afu_is_sq_cmd_mode(struct afu *afu)
	209	{
	210	return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
	211	}
	212
	213	static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
	214	{
	215	return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
	216	}
	217
c21e0bbf MO	218	static inline u64 lun_to_lunid(u64 lun)
c21e0bbf MO	219	{
1786f4a0	220	__be64 lun_id;
c21e0bbf MO	221
c21e0bbf MO	222	int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
1786f4a0	223	return be64_to_cpu(lun_id);
c21e0bbf MO	224	}
c21e0bbf MO	225
c21e0bbf	226	int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
65be2c79 MO	227	void cxlflash_list_init(void);
	228	void cxlflash_term_global_luns(void);
	229	void cxlflash_free_errpage(void);
	230	int cxlflash_ioctl(struct scsi_device , int, void __user );
	231	void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *);
	232	int cxlflash_mark_contexts_error(struct cxlflash_cfg *);
	233	void cxlflash_term_local_luns(struct cxlflash_cfg *);
2cb79266	234	void cxlflash_restore_luntable(struct cxlflash_cfg *);
65be2c79	235
c21e0bbf	236	#endif /* ifndef _CXLFLASH_COMMON_H */