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scsi: cxlflash: Implement IRQ polling for RRQ processing
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / cxlflash / main.c
CommitLineData
c21e0bbf
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1/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
65be2c79 26#include <uapi/scsi/cxlflash_ioctl.h>
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27
28#include "main.h"
29#include "sislite.h"
30#include "common.h"
31
32MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35MODULE_LICENSE("GPL");
36
c21e0bbf
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37/**
38 * process_cmd_err() - command error handler
39 * @cmd: AFU command that experienced the error.
40 * @scp: SCSI command associated with the AFU command in error.
41 *
42 * Translates error bits from AFU command to SCSI command results.
43 */
44static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45{
88d33628
MO
46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
c21e0bbf
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49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
8396012f 51 u32 resid;
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52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
8396012f
MO
60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
88d33628
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62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
c21e0bbf
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64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
88d33628
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67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
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69 scp->result = (DID_ERROR << 16);
70 }
71
88d33628
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72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
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76
77 if (ioasa->rc.scsi_rc) {
78 /* We have a SCSI status */
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87 /*
88 * We encountered an error. Set scp->result based on nature
89 * of error.
90 */
91 if (ioasa->rc.fc_rc) {
92 /* We have an FC status */
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98 /* This indicates an FCP resid underrun */
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
101 * then we will handle this error else where.
102 * If not then we must handle it here.
8396012f 103 * This is probably an AFU bug.
c21e0bbf
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104 */
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109 /* Resid mismatch between adapter and device */
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124 /* We have an AFU error */
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
8396012f 127 scp->result = (DID_NO_CONNECT << 16);
c21e0bbf
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128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132 /* Retry */
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141 /* Retry */
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148}
149
150/**
151 * cmd_complete() - command completion handler
152 * @cmd: AFU command that has completed.
153 *
154 * Prepares and submits command that has either completed or timed out to
155 * the SCSI stack. Checks AFU command back into command pool for non-internal
fe7f9698 156 * (cmd->scp populated) commands.
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157 */
158static void cmd_complete(struct afu_cmd *cmd)
159{
160 struct scsi_cmnd *scp;
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161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
88d33628 164 struct device *dev = &cfg->dev->dev;
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165 bool cmd_is_tmf;
166
fe7f9698
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167 if (cmd->scp) {
168 scp = cmd->scp;
8396012f 169 if (unlikely(cmd->sa.ioasc))
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170 process_cmd_err(cmd, scp);
171 else
172 scp->result = (DID_OK << 16);
173
c21e0bbf 174 cmd_is_tmf = cmd->cmd_tmf;
c21e0bbf 175
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176 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
177 __func__, scp, scp->result, cmd->sa.ioasc);
c21e0bbf 178
c21e0bbf
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179 scsi_dma_unmap(scp);
180 scp->scsi_done(scp);
181
182 if (cmd_is_tmf) {
018d1dc9 183 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
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184 cfg->tmf_active = false;
185 wake_up_all_locked(&cfg->tmf_waitq);
018d1dc9 186 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
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187 }
188 } else
189 complete(&cmd->cevent);
190}
191
15305514 192/**
74579cfb 193 * context_reset() - reset command owner context via specified register
15305514 194 * @cmd: AFU command that timed out.
74579cfb 195 * @reset_reg: MMIO register to perform reset.
15305514 196 */
74579cfb 197static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg)
15305514
MO
198{
199 int nretry = 0;
200 u64 rrin = 0x1;
15305514 201 struct afu *afu = cmd->parent;
3d2f617d
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202 struct cxlflash_cfg *cfg = afu->parent;
203 struct device *dev = &cfg->dev->dev;
15305514 204
88d33628 205 dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd);
15305514 206
74579cfb 207 writeq_be(rrin, reset_reg);
15305514 208 do {
74579cfb 209 rrin = readq_be(reset_reg);
15305514
MO
210 if (rrin != 0x1)
211 break;
212 /* Double delay each time */
ea765431 213 udelay(1 << nretry);
15305514 214 } while (nretry++ < MC_ROOM_RETRY_CNT);
3d2f617d 215
88d33628 216 dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n",
3d2f617d 217 __func__, rrin, nretry);
15305514
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218}
219
74579cfb
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220/**
221 * context_reset_ioarrin() - reset command owner context via IOARRIN register
222 * @cmd: AFU command that timed out.
223 */
224static void context_reset_ioarrin(struct afu_cmd *cmd)
225{
226 struct afu *afu = cmd->parent;
227
228 context_reset(cmd, &afu->host_map->ioarrin);
229}
230
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231/**
232 * context_reset_sq() - reset command owner context w/ SQ Context Reset register
233 * @cmd: AFU command that timed out.
234 */
235static void context_reset_sq(struct afu_cmd *cmd)
236{
237 struct afu *afu = cmd->parent;
238
239 context_reset(cmd, &afu->host_map->sq_ctx_reset);
240}
241
15305514 242/**
48b4be36 243 * send_cmd_ioarrin() - sends an AFU command via IOARRIN register
15305514
MO
244 * @afu: AFU associated with the host.
245 * @cmd: AFU command to send.
246 *
247 * Return:
1284fb0c 248 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
15305514 249 */
48b4be36 250static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
15305514
MO
251{
252 struct cxlflash_cfg *cfg = afu->parent;
253 struct device *dev = &cfg->dev->dev;
15305514 254 int rc = 0;
11f7b184
UK
255 s64 room;
256 ulong lock_flags;
15305514
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257
258 /*
11f7b184
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259 * To avoid the performance penalty of MMIO, spread the update of
260 * 'room' over multiple commands.
15305514 261 */
11f7b184
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262 spin_lock_irqsave(&afu->rrin_slock, lock_flags);
263 if (--afu->room < 0) {
264 room = readq_be(&afu->host_map->cmd_room);
265 if (room <= 0) {
266 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
267 "0x%02X, room=0x%016llX\n",
268 __func__, cmd->rcb.cdb[0], room);
269 afu->room = 0;
270 rc = SCSI_MLQUEUE_HOST_BUSY;
271 goto out;
15305514 272 }
11f7b184 273 afu->room = room - 1;
15305514
MO
274 }
275
15305514
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276 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
277out:
11f7b184 278 spin_unlock_irqrestore(&afu->rrin_slock, lock_flags);
88d33628
MO
279 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
280 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
15305514 281 return rc;
15305514
MO
282}
283
bae0ac69
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284/**
285 * send_cmd_sq() - sends an AFU command via SQ ring
286 * @afu: AFU associated with the host.
287 * @cmd: AFU command to send.
288 *
289 * Return:
290 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
291 */
292static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
293{
294 struct cxlflash_cfg *cfg = afu->parent;
295 struct device *dev = &cfg->dev->dev;
296 int rc = 0;
297 int newval;
298 ulong lock_flags;
299
300 newval = atomic_dec_if_positive(&afu->hsq_credits);
301 if (newval <= 0) {
302 rc = SCSI_MLQUEUE_HOST_BUSY;
303 goto out;
304 }
305
306 cmd->rcb.ioasa = &cmd->sa;
307
308 spin_lock_irqsave(&afu->hsq_slock, lock_flags);
309
310 *afu->hsq_curr = cmd->rcb;
311 if (afu->hsq_curr < afu->hsq_end)
312 afu->hsq_curr++;
313 else
314 afu->hsq_curr = afu->hsq_start;
315 writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail);
316
317 spin_unlock_irqrestore(&afu->hsq_slock, lock_flags);
318out:
88d33628
MO
319 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
320 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
321 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr,
bae0ac69
MO
322 readq_be(&afu->host_map->sq_head),
323 readq_be(&afu->host_map->sq_tail));
324 return rc;
325}
326
15305514
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327/**
328 * wait_resp() - polls for a response or timeout to a sent AFU command
329 * @afu: AFU associated with the host.
330 * @cmd: AFU command that was sent.
9ba848ac
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331 *
332 * Return:
333 * 0 on success, -1 on timeout/error
15305514 334 */
9ba848ac 335static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
15305514 336{
88d33628
MO
337 struct cxlflash_cfg *cfg = afu->parent;
338 struct device *dev = &cfg->dev->dev;
9ba848ac 339 int rc = 0;
15305514
MO
340 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
341
342 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
9ba848ac 343 if (!timeout) {
48b4be36 344 afu->context_reset(cmd);
9ba848ac
MO
345 rc = -1;
346 }
15305514 347
9ba848ac 348 if (unlikely(cmd->sa.ioasc != 0)) {
88d33628
MO
349 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
350 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
9ba848ac
MO
351 rc = -1;
352 }
353
354 return rc;
15305514
MO
355}
356
c21e0bbf
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357/**
358 * send_tmf() - sends a Task Management Function (TMF)
359 * @afu: AFU to checkout from.
360 * @scp: SCSI command from stack.
361 * @tmfcmd: TMF command to send.
362 *
363 * Return:
1284fb0c 364 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
MO
365 */
366static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
367{
c21e0bbf 368 u32 port_sel = scp->device->channel + 1;
88d33628 369 struct cxlflash_cfg *cfg = shost_priv(scp->device->host);
d4ace351 370 struct afu_cmd *cmd = sc_to_afucz(scp);
4392ba49 371 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
372 ulong lock_flags;
373 int rc = 0;
018d1dc9 374 ulong to;
c21e0bbf 375
018d1dc9
MO
376 /* When Task Management Function is active do not send another */
377 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 378 if (cfg->tmf_active)
018d1dc9
MO
379 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
380 !cfg->tmf_active,
381 cfg->tmf_slock);
c21e0bbf 382 cfg->tmf_active = true;
018d1dc9 383 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 384
fe7f9698 385 cmd->scp = scp;
d4ace351
MO
386 cmd->parent = afu;
387 cmd->cmd_tmf = true;
388
c21e0bbf 389 cmd->rcb.ctx_id = afu->ctx_hndl;
5fbb96c8 390 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
c21e0bbf
MO
391 cmd->rcb.port_sel = port_sel;
392 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 393 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
d4ace351
MO
394 SISL_REQ_FLAGS_SUP_UNDERRUN |
395 SISL_REQ_FLAGS_TMF_CMD);
c21e0bbf
MO
396 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
397
48b4be36 398 rc = afu->send_cmd(afu, cmd);
c21e0bbf 399 if (unlikely(rc)) {
018d1dc9 400 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 401 cfg->tmf_active = false;
018d1dc9 402 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
403 goto out;
404 }
405
018d1dc9
MO
406 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
407 to = msecs_to_jiffies(5000);
408 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
409 !cfg->tmf_active,
410 cfg->tmf_slock,
411 to);
412 if (!to) {
413 cfg->tmf_active = false;
88d33628 414 dev_err(dev, "%s: TMF timed out\n", __func__);
018d1dc9
MO
415 rc = -1;
416 }
417 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
418out:
419 return rc;
420}
421
422/**
423 * cxlflash_driver_info() - information handler for this host driver
424 * @host: SCSI host associated with device.
425 *
426 * Return: A string describing the device.
427 */
428static const char *cxlflash_driver_info(struct Scsi_Host *host)
429{
430 return CXLFLASH_ADAPTER_NAME;
431}
432
433/**
434 * cxlflash_queuecommand() - sends a mid-layer request
435 * @host: SCSI host associated with device.
436 * @scp: SCSI command to send.
437 *
1284fb0c 438 * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
MO
439 */
440static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
441{
88d33628 442 struct cxlflash_cfg *cfg = shost_priv(host);
c21e0bbf 443 struct afu *afu = cfg->afu;
4392ba49 444 struct device *dev = &cfg->dev->dev;
5fbb96c8 445 struct afu_cmd *cmd = sc_to_afucz(scp);
9d89326c 446 struct scatterlist *sg = scsi_sglist(scp);
c21e0bbf 447 u32 port_sel = scp->device->channel + 1;
9d89326c 448 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
c21e0bbf 449 ulong lock_flags;
9d89326c 450 int nseg = 0;
c21e0bbf
MO
451 int rc = 0;
452
4392ba49 453 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
88d33628 454 "cdb=(%08x-%08x-%08x-%08x)\n",
4392ba49
MO
455 __func__, scp, host->host_no, scp->device->channel,
456 scp->device->id, scp->device->lun,
457 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
458 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
459 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
460 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
c21e0bbf 461
018d1dc9
MO
462 /*
463 * If a Task Management Function is active, wait for it to complete
c21e0bbf
MO
464 * before continuing with regular commands.
465 */
018d1dc9 466 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 467 if (cfg->tmf_active) {
018d1dc9 468 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
469 rc = SCSI_MLQUEUE_HOST_BUSY;
470 goto out;
471 }
018d1dc9 472 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 473
5cdac81a 474 switch (cfg->state) {
439e85c1 475 case STATE_RESET:
88d33628 476 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
5cdac81a
MO
477 rc = SCSI_MLQUEUE_HOST_BUSY;
478 goto out;
479 case STATE_FAILTERM:
88d33628 480 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
5cdac81a
MO
481 scp->result = (DID_NO_CONNECT << 16);
482 scp->scsi_done(scp);
483 rc = 0;
484 goto out;
485 default:
486 break;
487 }
488
9d89326c
MO
489 if (likely(sg)) {
490 nseg = scsi_dma_map(scp);
491 if (unlikely(nseg < 0)) {
88d33628 492 dev_err(dev, "%s: Fail DMA map\n", __func__);
9d89326c
MO
493 rc = SCSI_MLQUEUE_HOST_BUSY;
494 goto out;
495 }
c21e0bbf 496
9d89326c
MO
497 cmd->rcb.data_len = sg_dma_len(sg);
498 cmd->rcb.data_ea = sg_dma_address(sg);
499 }
c21e0bbf 500
fe7f9698 501 cmd->scp = scp;
5fbb96c8 502 cmd->parent = afu;
c21e0bbf 503
9d89326c
MO
504 cmd->rcb.ctx_id = afu->ctx_hndl;
505 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
506 cmd->rcb.port_sel = port_sel;
507 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 508
9d89326c
MO
509 if (scp->sc_data_direction == DMA_TO_DEVICE)
510 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
c21e0bbf 511
9d89326c 512 cmd->rcb.req_flags = req_flags;
c21e0bbf
MO
513 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
514
48b4be36 515 rc = afu->send_cmd(afu, cmd);
5fbb96c8 516 if (unlikely(rc))
c21e0bbf 517 scsi_dma_unmap(scp);
c21e0bbf
MO
518out:
519 return rc;
520}
521
522/**
15305514 523 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
1284fb0c 524 * @cfg: Internal structure associated with the host.
c21e0bbf 525 */
15305514 526static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
c21e0bbf 527{
15305514 528 struct pci_dev *pdev = cfg->dev;
c21e0bbf 529
15305514
MO
530 if (pci_channel_offline(pdev))
531 wait_event_timeout(cfg->reset_waitq,
532 !pci_channel_offline(pdev),
533 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
c21e0bbf
MO
534}
535
536/**
15305514 537 * free_mem() - free memory associated with the AFU
1284fb0c 538 * @cfg: Internal structure associated with the host.
c21e0bbf 539 */
15305514 540static void free_mem(struct cxlflash_cfg *cfg)
c21e0bbf 541{
15305514 542 struct afu *afu = cfg->afu;
c21e0bbf 543
15305514 544 if (cfg->afu) {
15305514
MO
545 free_pages((ulong)afu, get_order(sizeof(struct afu)));
546 cfg->afu = NULL;
5cdac81a 547 }
c21e0bbf
MO
548}
549
550/**
15305514 551 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
1284fb0c 552 * @cfg: Internal structure associated with the host.
c21e0bbf 553 *
15305514 554 * Safe to call with AFU in a partially allocated/initialized state.
ee91e332 555 *
d940f9ae 556 * Cancels scheduled worker threads, waits for any active internal AFU
2588f222 557 * commands to timeout, disables IRQ polling and then unmaps the MMIO space.
c21e0bbf 558 */
15305514 559static void stop_afu(struct cxlflash_cfg *cfg)
c21e0bbf 560{
15305514 561 struct afu *afu = cfg->afu;
c21e0bbf 562
d940f9ae
UK
563 cancel_work_sync(&cfg->work_q);
564
15305514 565 if (likely(afu)) {
de01283b
MO
566 while (atomic_read(&afu->cmds_active))
567 ssleep(1);
2588f222
MO
568 if (afu_is_irqpoll_enabled(afu))
569 irq_poll_disable(&afu->irqpoll);
c21e0bbf 570 if (likely(afu->afu_map)) {
1786f4a0 571 cxl_psa_unmap((void __iomem *)afu->afu_map);
c21e0bbf
MO
572 afu->afu_map = NULL;
573 }
574 }
575}
576
577/**
9526f360 578 * term_intr() - disables all AFU interrupts
1284fb0c 579 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
580 * @level: Depth of allocation, where to begin waterfall tear down.
581 *
582 * Safe to call with AFU/MC in partially allocated/initialized state.
583 */
9526f360 584static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level)
c21e0bbf 585{
c21e0bbf 586 struct afu *afu = cfg->afu;
4392ba49 587 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
588
589 if (!afu || !cfg->mcctx) {
9526f360 590 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
c21e0bbf
MO
591 return;
592 }
593
594 switch (level) {
c21e0bbf
MO
595 case UNMAP_THREE:
596 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
597 case UNMAP_TWO:
598 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
599 case UNMAP_ONE:
600 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
601 case FREE_IRQ:
602 cxl_free_afu_irqs(cfg->mcctx);
9526f360
MK
603 /* fall through */
604 case UNDO_NOOP:
605 /* No action required */
606 break;
607 }
608}
609
610/**
611 * term_mc() - terminates the master context
612 * @cfg: Internal structure associated with the host.
613 * @level: Depth of allocation, where to begin waterfall tear down.
614 *
615 * Safe to call with AFU/MC in partially allocated/initialized state.
616 */
617static void term_mc(struct cxlflash_cfg *cfg)
618{
619 int rc = 0;
620 struct afu *afu = cfg->afu;
621 struct device *dev = &cfg->dev->dev;
622
623 if (!afu || !cfg->mcctx) {
624 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
625 return;
c21e0bbf 626 }
9526f360
MK
627
628 rc = cxl_stop_context(cfg->mcctx);
629 WARN_ON(rc);
630 cfg->mcctx = NULL;
c21e0bbf
MO
631}
632
633/**
634 * term_afu() - terminates the AFU
1284fb0c 635 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
636 *
637 * Safe to call with AFU/MC in partially allocated/initialized state.
638 */
639static void term_afu(struct cxlflash_cfg *cfg)
640{
88d33628
MO
641 struct device *dev = &cfg->dev->dev;
642
9526f360
MK
643 /*
644 * Tear down is carefully orchestrated to ensure
645 * no interrupts can come in when the problem state
646 * area is unmapped.
647 *
648 * 1) Disable all AFU interrupts
649 * 2) Unmap the problem state area
650 * 3) Stop the master context
651 */
652 term_intr(cfg, UNMAP_THREE);
c21e0bbf
MO
653 if (cfg->afu)
654 stop_afu(cfg);
655
9526f360 656 term_mc(cfg);
6ded8b3c 657
88d33628 658 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
659}
660
704c4b0d
UK
661/**
662 * notify_shutdown() - notifies device of pending shutdown
663 * @cfg: Internal structure associated with the host.
664 * @wait: Whether to wait for shutdown processing to complete.
665 *
666 * This function will notify the AFU that the adapter is being shutdown
667 * and will wait for shutdown processing to complete if wait is true.
668 * This notification should flush pending I/Os to the device and halt
669 * further I/Os until the next AFU reset is issued and device restarted.
670 */
671static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
672{
673 struct afu *afu = cfg->afu;
674 struct device *dev = &cfg->dev->dev;
1bd2b282 675 struct sisl_global_map __iomem *global;
704c4b0d
UK
676 struct dev_dependent_vals *ddv;
677 u64 reg, status;
678 int i, retry_cnt = 0;
679
680 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
681 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
682 return;
683
1bd2b282 684 if (!afu || !afu->afu_map) {
88d33628 685 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
1bd2b282
UK
686 return;
687 }
688
689 global = &afu->afu_map->global;
690
704c4b0d
UK
691 /* Notify AFU */
692 for (i = 0; i < NUM_FC_PORTS; i++) {
693 reg = readq_be(&global->fc_regs[i][FC_CONFIG2 / 8]);
694 reg |= SISL_FC_SHUTDOWN_NORMAL;
695 writeq_be(reg, &global->fc_regs[i][FC_CONFIG2 / 8]);
696 }
697
698 if (!wait)
699 return;
700
701 /* Wait up to 1.5 seconds for shutdown processing to complete */
702 for (i = 0; i < NUM_FC_PORTS; i++) {
703 retry_cnt = 0;
704 while (true) {
705 status = readq_be(&global->fc_regs[i][FC_STATUS / 8]);
706 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
707 break;
708 if (++retry_cnt >= MC_RETRY_CNT) {
709 dev_dbg(dev, "%s: port %d shutdown processing "
710 "not yet completed\n", __func__, i);
711 break;
712 }
713 msleep(100 * retry_cnt);
714 }
715 }
716}
717
c21e0bbf
MO
718/**
719 * cxlflash_remove() - PCI entry point to tear down host
720 * @pdev: PCI device associated with the host.
721 *
722 * Safe to use as a cleanup in partially allocated/initialized state.
723 */
724static void cxlflash_remove(struct pci_dev *pdev)
725{
726 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
88d33628 727 struct device *dev = &pdev->dev;
c21e0bbf
MO
728 ulong lock_flags;
729
babf985d 730 if (!pci_is_enabled(pdev)) {
88d33628 731 dev_dbg(dev, "%s: Device is disabled\n", __func__);
babf985d
UK
732 return;
733 }
734
c21e0bbf
MO
735 /* If a Task Management Function is active, wait for it to complete
736 * before continuing with remove.
737 */
018d1dc9 738 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 739 if (cfg->tmf_active)
018d1dc9
MO
740 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
741 !cfg->tmf_active,
742 cfg->tmf_slock);
743 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 744
704c4b0d
UK
745 /* Notify AFU and wait for shutdown processing to complete */
746 notify_shutdown(cfg, true);
747
5cdac81a 748 cfg->state = STATE_FAILTERM;
65be2c79 749 cxlflash_stop_term_user_contexts(cfg);
5cdac81a 750
c21e0bbf
MO
751 switch (cfg->init_state) {
752 case INIT_STATE_SCSI:
65be2c79 753 cxlflash_term_local_luns(cfg);
c21e0bbf 754 scsi_remove_host(cfg->host);
f15fbf8d 755 /* fall through */
c21e0bbf 756 case INIT_STATE_AFU:
b45cdbaf 757 term_afu(cfg);
c21e0bbf 758 case INIT_STATE_PCI:
c21e0bbf
MO
759 pci_disable_device(pdev);
760 case INIT_STATE_NONE:
c21e0bbf 761 free_mem(cfg);
8b5b1e87 762 scsi_host_put(cfg->host);
c21e0bbf
MO
763 break;
764 }
765
88d33628 766 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
767}
768
769/**
770 * alloc_mem() - allocates the AFU and its command pool
1284fb0c 771 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
772 *
773 * A partially allocated state remains on failure.
774 *
775 * Return:
776 * 0 on success
777 * -ENOMEM on failure to allocate memory
778 */
779static int alloc_mem(struct cxlflash_cfg *cfg)
780{
781 int rc = 0;
4392ba49 782 struct device *dev = &cfg->dev->dev;
c21e0bbf 783
bae0ac69 784 /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */
c21e0bbf
MO
785 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
786 get_order(sizeof(struct afu)));
787 if (unlikely(!cfg->afu)) {
4392ba49
MO
788 dev_err(dev, "%s: cannot get %d free pages\n",
789 __func__, get_order(sizeof(struct afu)));
c21e0bbf
MO
790 rc = -ENOMEM;
791 goto out;
792 }
793 cfg->afu->parent = cfg;
794 cfg->afu->afu_map = NULL;
c21e0bbf
MO
795out:
796 return rc;
797}
798
799/**
800 * init_pci() - initializes the host as a PCI device
1284fb0c 801 * @cfg: Internal structure associated with the host.
c21e0bbf 802 *
1284fb0c 803 * Return: 0 on success, -errno on failure
c21e0bbf
MO
804 */
805static int init_pci(struct cxlflash_cfg *cfg)
806{
807 struct pci_dev *pdev = cfg->dev;
88d33628 808 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
809 int rc = 0;
810
c21e0bbf
MO
811 rc = pci_enable_device(pdev);
812 if (rc || pci_channel_offline(pdev)) {
813 if (pci_channel_offline(pdev)) {
814 cxlflash_wait_for_pci_err_recovery(cfg);
815 rc = pci_enable_device(pdev);
816 }
817
818 if (rc) {
88d33628 819 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
c21e0bbf 820 cxlflash_wait_for_pci_err_recovery(cfg);
961487e4 821 goto out;
c21e0bbf
MO
822 }
823 }
824
c21e0bbf 825out:
88d33628 826 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 827 return rc;
c21e0bbf
MO
828}
829
830/**
831 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
1284fb0c 832 * @cfg: Internal structure associated with the host.
c21e0bbf 833 *
1284fb0c 834 * Return: 0 on success, -errno on failure
c21e0bbf
MO
835 */
836static int init_scsi(struct cxlflash_cfg *cfg)
837{
838 struct pci_dev *pdev = cfg->dev;
88d33628 839 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
840 int rc = 0;
841
842 rc = scsi_add_host(cfg->host, &pdev->dev);
843 if (rc) {
88d33628 844 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
c21e0bbf
MO
845 goto out;
846 }
847
848 scsi_scan_host(cfg->host);
849
850out:
88d33628 851 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
852 return rc;
853}
854
855/**
856 * set_port_online() - transitions the specified host FC port to online state
857 * @fc_regs: Top of MMIO region defined for specified port.
858 *
859 * The provided MMIO region must be mapped prior to call. Online state means
860 * that the FC link layer has synced, completed the handshaking process, and
861 * is ready for login to start.
862 */
1786f4a0 863static void set_port_online(__be64 __iomem *fc_regs)
c21e0bbf
MO
864{
865 u64 cmdcfg;
866
867 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
868 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
869 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
870 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
871}
872
873/**
874 * set_port_offline() - transitions the specified host FC port to offline state
875 * @fc_regs: Top of MMIO region defined for specified port.
876 *
877 * The provided MMIO region must be mapped prior to call.
878 */
1786f4a0 879static void set_port_offline(__be64 __iomem *fc_regs)
c21e0bbf
MO
880{
881 u64 cmdcfg;
882
883 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
884 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
885 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
886 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
887}
888
889/**
890 * wait_port_online() - waits for the specified host FC port come online
891 * @fc_regs: Top of MMIO region defined for specified port.
892 * @delay_us: Number of microseconds to delay between reading port status.
893 * @nretry: Number of cycles to retry reading port status.
894 *
895 * The provided MMIO region must be mapped prior to call. This will timeout
896 * when the cable is not plugged in.
897 *
898 * Return:
899 * TRUE (1) when the specified port is online
900 * FALSE (0) when the specified port fails to come online after timeout
c21e0bbf 901 */
88d33628 902static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
903{
904 u64 status;
905
88d33628 906 WARN_ON(delay_us < 1000);
c21e0bbf
MO
907
908 do {
909 msleep(delay_us / 1000);
910 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
911 if (status == U64_MAX)
912 nretry /= 2;
c21e0bbf
MO
913 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
914 nretry--);
915
916 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
917}
918
919/**
920 * wait_port_offline() - waits for the specified host FC port go offline
921 * @fc_regs: Top of MMIO region defined for specified port.
922 * @delay_us: Number of microseconds to delay between reading port status.
923 * @nretry: Number of cycles to retry reading port status.
924 *
925 * The provided MMIO region must be mapped prior to call.
926 *
927 * Return:
928 * TRUE (1) when the specified port is offline
929 * FALSE (0) when the specified port fails to go offline after timeout
c21e0bbf 930 */
88d33628 931static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
932{
933 u64 status;
934
88d33628 935 WARN_ON(delay_us < 1000);
c21e0bbf
MO
936
937 do {
938 msleep(delay_us / 1000);
939 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
940 if (status == U64_MAX)
941 nretry /= 2;
c21e0bbf
MO
942 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
943 nretry--);
944
945 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
946}
947
948/**
949 * afu_set_wwpn() - configures the WWPN for the specified host FC port
950 * @afu: AFU associated with the host that owns the specified FC port.
951 * @port: Port number being configured.
952 * @fc_regs: Top of MMIO region defined for specified port.
953 * @wwpn: The world-wide-port-number previously discovered for port.
954 *
955 * The provided MMIO region must be mapped prior to call. As part of the
956 * sequence to configure the WWPN, the port is toggled offline and then back
957 * online. This toggling action can cause this routine to delay up to a few
958 * seconds. When configured to use the internal LUN feature of the AFU, a
959 * failure to come online is overridden.
c21e0bbf 960 */
f8013261
MO
961static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
962 u64 wwpn)
c21e0bbf 963{
88d33628
MO
964 struct cxlflash_cfg *cfg = afu->parent;
965 struct device *dev = &cfg->dev->dev;
966
c21e0bbf 967 set_port_offline(fc_regs);
c21e0bbf
MO
968 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
969 FC_PORT_STATUS_RETRY_CNT)) {
88d33628
MO
970 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
971 __func__, port);
c21e0bbf
MO
972 }
973
f8013261 974 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
964497b3 975
c21e0bbf 976 set_port_online(fc_regs);
c21e0bbf
MO
977 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
978 FC_PORT_STATUS_RETRY_CNT)) {
88d33628
MO
979 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
980 __func__, port);
c21e0bbf 981 }
c21e0bbf
MO
982}
983
984/**
985 * afu_link_reset() - resets the specified host FC port
986 * @afu: AFU associated with the host that owns the specified FC port.
987 * @port: Port number being configured.
988 * @fc_regs: Top of MMIO region defined for specified port.
989 *
990 * The provided MMIO region must be mapped prior to call. The sequence to
991 * reset the port involves toggling it offline and then back online. This
992 * action can cause this routine to delay up to a few seconds. An effort
993 * is made to maintain link with the device by switching to host to use
994 * the alternate port exclusively while the reset takes place.
995 * failure to come online is overridden.
996 */
1786f4a0 997static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
c21e0bbf 998{
88d33628
MO
999 struct cxlflash_cfg *cfg = afu->parent;
1000 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1001 u64 port_sel;
1002
1003 /* first switch the AFU to the other links, if any */
1004 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
4da74db0 1005 port_sel &= ~(1ULL << port);
c21e0bbf
MO
1006 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1007 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1008
1009 set_port_offline(fc_regs);
1010 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1011 FC_PORT_STATUS_RETRY_CNT))
88d33628
MO
1012 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1013 __func__, port);
c21e0bbf
MO
1014
1015 set_port_online(fc_regs);
1016 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1017 FC_PORT_STATUS_RETRY_CNT))
88d33628
MO
1018 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1019 __func__, port);
c21e0bbf
MO
1020
1021 /* switch back to include this port */
4da74db0 1022 port_sel |= (1ULL << port);
c21e0bbf
MO
1023 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1024 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1025
88d33628 1026 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
c21e0bbf
MO
1027}
1028
1029/*
1030 * Asynchronous interrupt information table
1031 */
1032static const struct asyc_intr_info ainfo[] = {
1033 {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
1034 {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
1035 {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
e6e6df3f 1036 {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET},
c21e0bbf 1037 {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
ef51074a 1038 {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST},
c21e0bbf 1039 {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
bbbfae96 1040 {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
c21e0bbf
MO
1041 {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
1042 {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
1043 {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
a9be294e 1044 {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET},
c21e0bbf 1045 {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
ef51074a 1046 {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST},
c21e0bbf 1047 {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
bbbfae96 1048 {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
c21e0bbf
MO
1049 {0x0, "", 0, 0} /* terminator */
1050};
1051
1052/**
1053 * find_ainfo() - locates and returns asynchronous interrupt information
1054 * @status: Status code set by AFU on error.
1055 *
1056 * Return: The located information or NULL when the status code is invalid.
1057 */
1058static const struct asyc_intr_info *find_ainfo(u64 status)
1059{
1060 const struct asyc_intr_info *info;
1061
1062 for (info = &ainfo[0]; info->status; info++)
1063 if (info->status == status)
1064 return info;
1065
1066 return NULL;
1067}
1068
1069/**
1070 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1071 * @afu: AFU associated with the host.
1072 */
1073static void afu_err_intr_init(struct afu *afu)
1074{
1075 int i;
1076 u64 reg;
1077
1078 /* global async interrupts: AFU clears afu_ctrl on context exit
1079 * if async interrupts were sent to that context. This prevents
1080 * the AFU form sending further async interrupts when
1081 * there is
1082 * nobody to receive them.
1083 */
1084
1085 /* mask all */
1086 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1087 /* set LISN# to send and point to master context */
1088 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1089
1090 if (afu->internal_lun)
1091 reg |= 1; /* Bit 63 indicates local lun */
1092 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1093 /* clear all */
1094 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1095 /* unmask bits that are of interest */
1096 /* note: afu can send an interrupt after this step */
1097 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1098 /* clear again in case a bit came on after previous clear but before */
1099 /* unmask */
1100 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1101
1102 /* Clear/Set internal lun bits */
1103 reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1104 reg &= SISL_FC_INTERNAL_MASK;
1105 if (afu->internal_lun)
1106 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1107 writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1108
1109 /* now clear FC errors */
1110 for (i = 0; i < NUM_FC_PORTS; i++) {
1111 writeq_be(0xFFFFFFFFU,
1112 &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]);
1113 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]);
1114 }
1115
1116 /* sync interrupts for master's IOARRIN write */
1117 /* note that unlike asyncs, there can be no pending sync interrupts */
1118 /* at this time (this is a fresh context and master has not written */
1119 /* IOARRIN yet), so there is nothing to clear. */
1120
1121 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1122 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1123 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1124}
1125
1126/**
1127 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1128 * @irq: Interrupt number.
1129 * @data: Private data provided at interrupt registration, the AFU.
1130 *
1131 * Return: Always return IRQ_HANDLED.
1132 */
1133static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1134{
1135 struct afu *afu = (struct afu *)data;
88d33628
MO
1136 struct cxlflash_cfg *cfg = afu->parent;
1137 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1138 u64 reg;
1139 u64 reg_unmasked;
1140
1141 reg = readq_be(&afu->host_map->intr_status);
1142 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1143
1144 if (reg_unmasked == 0UL) {
88d33628
MO
1145 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1146 __func__, reg);
c21e0bbf
MO
1147 goto cxlflash_sync_err_irq_exit;
1148 }
1149
88d33628
MO
1150 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1151 __func__, reg);
c21e0bbf
MO
1152
1153 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1154
1155cxlflash_sync_err_irq_exit:
c21e0bbf
MO
1156 return IRQ_HANDLED;
1157}
1158
1159/**
9ba1a1fb
MO
1160 * process_hrrq() - process the read-response queue
1161 * @afu: AFU associated with the host.
7bb512aa 1162 * @doneq: Queue of commands harvested from the RRQ.
2588f222 1163 * @budget: Threshold of RRQ entries to process.
7bb512aa
MO
1164 *
1165 * This routine must be called holding the disabled RRQ spin lock.
c21e0bbf 1166 *
9ba1a1fb 1167 * Return: The number of entries processed.
c21e0bbf 1168 */
2588f222 1169static int process_hrrq(struct afu *afu, struct list_head *doneq, int budget)
c21e0bbf 1170{
c21e0bbf 1171 struct afu_cmd *cmd;
bae0ac69
MO
1172 struct sisl_ioasa *ioasa;
1173 struct sisl_ioarcb *ioarcb;
c21e0bbf 1174 bool toggle = afu->toggle;
9ba1a1fb 1175 int num_hrrq = 0;
c21e0bbf
MO
1176 u64 entry,
1177 *hrrq_start = afu->hrrq_start,
1178 *hrrq_end = afu->hrrq_end,
1179 *hrrq_curr = afu->hrrq_curr;
1180
2588f222 1181 /* Process ready RRQ entries up to the specified budget (if any) */
c21e0bbf
MO
1182 while (true) {
1183 entry = *hrrq_curr;
1184
1185 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1186 break;
1187
bae0ac69
MO
1188 entry &= ~SISL_RESP_HANDLE_T_BIT;
1189
1190 if (afu_is_sq_cmd_mode(afu)) {
1191 ioasa = (struct sisl_ioasa *)entry;
1192 cmd = container_of(ioasa, struct afu_cmd, sa);
1193 } else {
1194 ioarcb = (struct sisl_ioarcb *)entry;
1195 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1196 }
1197
7bb512aa 1198 list_add_tail(&cmd->queue, doneq);
c21e0bbf
MO
1199
1200 /* Advance to next entry or wrap and flip the toggle bit */
1201 if (hrrq_curr < hrrq_end)
1202 hrrq_curr++;
1203 else {
1204 hrrq_curr = hrrq_start;
1205 toggle ^= SISL_RESP_HANDLE_T_BIT;
1206 }
bae0ac69
MO
1207
1208 atomic_inc(&afu->hsq_credits);
9ba1a1fb 1209 num_hrrq++;
2588f222
MO
1210
1211 if (budget > 0 && num_hrrq >= budget)
1212 break;
c21e0bbf
MO
1213 }
1214
1215 afu->hrrq_curr = hrrq_curr;
1216 afu->toggle = toggle;
1217
9ba1a1fb
MO
1218 return num_hrrq;
1219}
1220
7bb512aa
MO
1221/**
1222 * process_cmd_doneq() - process a queue of harvested RRQ commands
1223 * @doneq: Queue of completed commands.
1224 *
1225 * Note that upon return the queue can no longer be trusted.
1226 */
1227static void process_cmd_doneq(struct list_head *doneq)
1228{
1229 struct afu_cmd *cmd, *tmp;
1230
1231 WARN_ON(list_empty(doneq));
1232
1233 list_for_each_entry_safe(cmd, tmp, doneq, queue)
1234 cmd_complete(cmd);
1235}
1236
2588f222
MO
1237/**
1238 * cxlflash_irqpoll() - process a queue of harvested RRQ commands
1239 * @irqpoll: IRQ poll structure associated with queue to poll.
1240 * @budget: Threshold of RRQ entries to process per poll.
1241 *
1242 * Return: The number of entries processed.
1243 */
1244static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget)
1245{
1246 struct afu *afu = container_of(irqpoll, struct afu, irqpoll);
1247 unsigned long hrrq_flags;
1248 LIST_HEAD(doneq);
1249 int num_entries = 0;
1250
1251 spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags);
1252
1253 num_entries = process_hrrq(afu, &doneq, budget);
1254 if (num_entries < budget)
1255 irq_poll_complete(irqpoll);
1256
1257 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1258
1259 process_cmd_doneq(&doneq);
1260 return num_entries;
1261}
1262
9ba1a1fb
MO
1263/**
1264 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1265 * @irq: Interrupt number.
1266 * @data: Private data provided at interrupt registration, the AFU.
1267 *
7bb512aa 1268 * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found.
9ba1a1fb
MO
1269 */
1270static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1271{
1272 struct afu *afu = (struct afu *)data;
7bb512aa
MO
1273 unsigned long hrrq_flags;
1274 LIST_HEAD(doneq);
1275 int num_entries = 0;
9ba1a1fb 1276
7bb512aa 1277 spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags);
2588f222
MO
1278
1279 if (afu_is_irqpoll_enabled(afu)) {
1280 irq_poll_sched(&afu->irqpoll);
1281 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1282 return IRQ_HANDLED;
1283 }
1284
1285 num_entries = process_hrrq(afu, &doneq, -1);
7bb512aa
MO
1286 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1287
1288 if (num_entries == 0)
1289 return IRQ_NONE;
1290
1291 process_cmd_doneq(&doneq);
c21e0bbf
MO
1292 return IRQ_HANDLED;
1293}
1294
1295/**
1296 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1297 * @irq: Interrupt number.
1298 * @data: Private data provided at interrupt registration, the AFU.
1299 *
1300 * Return: Always return IRQ_HANDLED.
1301 */
1302static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1303{
1304 struct afu *afu = (struct afu *)data;
4392ba49
MO
1305 struct cxlflash_cfg *cfg = afu->parent;
1306 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1307 u64 reg_unmasked;
1308 const struct asyc_intr_info *info;
1786f4a0 1309 struct sisl_global_map __iomem *global = &afu->afu_map->global;
c21e0bbf
MO
1310 u64 reg;
1311 u8 port;
1312 int i;
1313
c21e0bbf
MO
1314 reg = readq_be(&global->regs.aintr_status);
1315 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1316
1317 if (reg_unmasked == 0) {
88d33628 1318 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
4392ba49 1319 __func__, reg);
c21e0bbf
MO
1320 goto out;
1321 }
1322
f15fbf8d 1323 /* FYI, it is 'okay' to clear AFU status before FC_ERROR */
c21e0bbf
MO
1324 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1325
f15fbf8d 1326 /* Check each bit that is on */
c21e0bbf
MO
1327 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1328 info = find_ainfo(1ULL << i);
16798d34 1329 if (((reg_unmasked & 0x1) == 0) || !info)
c21e0bbf
MO
1330 continue;
1331
1332 port = info->port;
1333
88d33628 1334 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
4392ba49 1335 __func__, port, info->desc,
c21e0bbf
MO
1336 readq_be(&global->fc_regs[port][FC_STATUS / 8]));
1337
1338 /*
f15fbf8d 1339 * Do link reset first, some OTHER errors will set FC_ERROR
c21e0bbf
MO
1340 * again if cleared before or w/o a reset
1341 */
1342 if (info->action & LINK_RESET) {
4392ba49
MO
1343 dev_err(dev, "%s: FC Port %d: resetting link\n",
1344 __func__, port);
c21e0bbf
MO
1345 cfg->lr_state = LINK_RESET_REQUIRED;
1346 cfg->lr_port = port;
1347 schedule_work(&cfg->work_q);
1348 }
1349
1350 if (info->action & CLR_FC_ERROR) {
1351 reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]);
1352
1353 /*
f15fbf8d 1354 * Since all errors are unmasked, FC_ERROR and FC_ERRCAP
c21e0bbf
MO
1355 * should be the same and tracing one is sufficient.
1356 */
1357
88d33628 1358 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
4392ba49 1359 __func__, port, reg);
c21e0bbf
MO
1360
1361 writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]);
1362 writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]);
1363 }
ef51074a
MO
1364
1365 if (info->action & SCAN_HOST) {
1366 atomic_inc(&cfg->scan_host_needed);
1367 schedule_work(&cfg->work_q);
1368 }
c21e0bbf
MO
1369 }
1370
1371out:
c21e0bbf
MO
1372 return IRQ_HANDLED;
1373}
1374
1375/**
1376 * start_context() - starts the master context
1284fb0c 1377 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1378 *
1379 * Return: A success or failure value from CXL services.
1380 */
1381static int start_context(struct cxlflash_cfg *cfg)
1382{
88d33628 1383 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1384 int rc = 0;
1385
1386 rc = cxl_start_context(cfg->mcctx,
1387 cfg->afu->work.work_element_descriptor,
1388 NULL);
1389
88d33628 1390 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1391 return rc;
1392}
1393
1394/**
1395 * read_vpd() - obtains the WWPNs from VPD
1284fb0c 1396 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1397 * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs
1398 *
1284fb0c 1399 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1400 */
1401static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1402{
88d33628
MO
1403 struct device *dev = &cfg->dev->dev;
1404 struct pci_dev *pdev = cfg->dev;
c21e0bbf
MO
1405 int rc = 0;
1406 int ro_start, ro_size, i, j, k;
1407 ssize_t vpd_size;
1408 char vpd_data[CXLFLASH_VPD_LEN];
1409 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1410 char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" };
1411
1412 /* Get the VPD data from the device */
88d33628 1413 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
c21e0bbf 1414 if (unlikely(vpd_size <= 0)) {
88d33628
MO
1415 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1416 __func__, vpd_size);
c21e0bbf
MO
1417 rc = -ENODEV;
1418 goto out;
1419 }
1420
1421 /* Get the read only section offset */
1422 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1423 PCI_VPD_LRDT_RO_DATA);
1424 if (unlikely(ro_start < 0)) {
88d33628 1425 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
c21e0bbf
MO
1426 rc = -ENODEV;
1427 goto out;
1428 }
1429
1430 /* Get the read only section size, cap when extends beyond read VPD */
1431 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1432 j = ro_size;
1433 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1434 if (unlikely((i + j) > vpd_size)) {
88d33628
MO
1435 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1436 __func__, (i + j), vpd_size);
c21e0bbf
MO
1437 ro_size = vpd_size - i;
1438 }
1439
1440 /*
1441 * Find the offset of the WWPN tag within the read only
1442 * VPD data and validate the found field (partials are
1443 * no good to us). Convert the ASCII data to an integer
1444 * value. Note that we must copy to a temporary buffer
1445 * because the conversion service requires that the ASCII
1446 * string be terminated.
1447 */
1448 for (k = 0; k < NUM_FC_PORTS; k++) {
1449 j = ro_size;
1450 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1451
1452 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1453 if (unlikely(i < 0)) {
88d33628
MO
1454 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1455 __func__, k);
c21e0bbf
MO
1456 rc = -ENODEV;
1457 goto out;
1458 }
1459
1460 j = pci_vpd_info_field_size(&vpd_data[i]);
1461 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1462 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
88d33628
MO
1463 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1464 __func__, k);
c21e0bbf
MO
1465 rc = -ENODEV;
1466 goto out;
1467 }
1468
1469 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1470 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1471 if (unlikely(rc)) {
88d33628
MO
1472 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1473 __func__, k);
c21e0bbf
MO
1474 rc = -ENODEV;
1475 goto out;
1476 }
1477 }
1478
1479out:
88d33628 1480 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1481 return rc;
1482}
1483
1484/**
15305514 1485 * init_pcr() - initialize the provisioning and control registers
1284fb0c 1486 * @cfg: Internal structure associated with the host.
c21e0bbf 1487 *
15305514
MO
1488 * Also sets up fast access to the mapped registers and initializes AFU
1489 * command fields that never change.
c21e0bbf 1490 */
15305514 1491static void init_pcr(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1492{
1493 struct afu *afu = cfg->afu;
1786f4a0 1494 struct sisl_ctrl_map __iomem *ctrl_map;
c21e0bbf
MO
1495 int i;
1496
1497 for (i = 0; i < MAX_CONTEXT; i++) {
1498 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
f15fbf8d
MO
1499 /* Disrupt any clients that could be running */
1500 /* e.g. clients that survived a master restart */
c21e0bbf
MO
1501 writeq_be(0, &ctrl_map->rht_start);
1502 writeq_be(0, &ctrl_map->rht_cnt_id);
1503 writeq_be(0, &ctrl_map->ctx_cap);
1504 }
1505
f15fbf8d 1506 /* Copy frequently used fields into afu */
c21e0bbf 1507 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
c21e0bbf
MO
1508 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1509 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1510
1511 /* Program the Endian Control for the master context */
1512 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
c21e0bbf
MO
1513}
1514
1515/**
1516 * init_global() - initialize AFU global registers
1284fb0c 1517 * @cfg: Internal structure associated with the host.
c21e0bbf 1518 */
15305514 1519static int init_global(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1520{
1521 struct afu *afu = cfg->afu;
4392ba49 1522 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1523 u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */
1524 int i = 0, num_ports = 0;
1525 int rc = 0;
1526 u64 reg;
1527
1528 rc = read_vpd(cfg, &wwpn[0]);
1529 if (rc) {
4392ba49 1530 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
c21e0bbf
MO
1531 goto out;
1532 }
1533
88d33628
MO
1534 dev_dbg(dev, "%s: wwpn0=%016llx wwpn1=%016llx\n",
1535 __func__, wwpn[0], wwpn[1]);
c21e0bbf 1536
bae0ac69 1537 /* Set up RRQ and SQ in AFU for master issued cmds */
c21e0bbf
MO
1538 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1539 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1540
bae0ac69
MO
1541 if (afu_is_sq_cmd_mode(afu)) {
1542 writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start);
1543 writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end);
1544 }
1545
c21e0bbf
MO
1546 /* AFU configuration */
1547 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1548 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1549 /* enable all auto retry options and control endianness */
1550 /* leave others at default: */
1551 /* CTX_CAP write protected, mbox_r does not clear on read and */
1552 /* checker on if dual afu */
1553 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1554
f15fbf8d 1555 /* Global port select: select either port */
c21e0bbf 1556 if (afu->internal_lun) {
f15fbf8d 1557 /* Only use port 0 */
c21e0bbf
MO
1558 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1559 num_ports = NUM_FC_PORTS - 1;
1560 } else {
1561 writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel);
1562 num_ports = NUM_FC_PORTS;
1563 }
1564
1565 for (i = 0; i < num_ports; i++) {
f15fbf8d 1566 /* Unmask all errors (but they are still masked at AFU) */
c21e0bbf 1567 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]);
f15fbf8d 1568 /* Clear CRC error cnt & set a threshold */
c21e0bbf
MO
1569 (void)readq_be(&afu->afu_map->global.
1570 fc_regs[i][FC_CNT_CRCERR / 8]);
1571 writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i]
1572 [FC_CRC_THRESH / 8]);
1573
f15fbf8d 1574 /* Set WWPNs. If already programmed, wwpn[i] is 0 */
f8013261
MO
1575 if (wwpn[i] != 0)
1576 afu_set_wwpn(afu, i,
1577 &afu->afu_map->global.fc_regs[i][0],
1578 wwpn[i]);
c21e0bbf
MO
1579 /* Programming WWPN back to back causes additional
1580 * offline/online transitions and a PLOGI
1581 */
1582 msleep(100);
c21e0bbf
MO
1583 }
1584
f15fbf8d
MO
1585 /* Set up master's own CTX_CAP to allow real mode, host translation */
1586 /* tables, afu cmds and read/write GSCSI cmds. */
c21e0bbf
MO
1587 /* First, unlock ctx_cap write by reading mbox */
1588 (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */
1589 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1590 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1591 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1592 &afu->ctrl_map->ctx_cap);
f15fbf8d 1593 /* Initialize heartbeat */
c21e0bbf 1594 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
c21e0bbf
MO
1595out:
1596 return rc;
1597}
1598
1599/**
1600 * start_afu() - initializes and starts the AFU
1284fb0c 1601 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1602 */
1603static int start_afu(struct cxlflash_cfg *cfg)
1604{
1605 struct afu *afu = cfg->afu;
88d33628 1606 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1607 int rc = 0;
1608
c21e0bbf
MO
1609 init_pcr(cfg);
1610
7bb512aa 1611 /* Initialize RRQ */
af10483e 1612 memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry));
c21e0bbf
MO
1613 afu->hrrq_start = &afu->rrq_entry[0];
1614 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1615 afu->hrrq_curr = afu->hrrq_start;
1616 afu->toggle = 1;
7bb512aa 1617 spin_lock_init(&afu->hrrq_slock);
c21e0bbf 1618
bae0ac69
MO
1619 /* Initialize SQ */
1620 if (afu_is_sq_cmd_mode(afu)) {
1621 memset(&afu->sq, 0, sizeof(afu->sq));
1622 afu->hsq_start = &afu->sq[0];
1623 afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1];
1624 afu->hsq_curr = afu->hsq_start;
1625
1626 spin_lock_init(&afu->hsq_slock);
1627 atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1);
1628 }
1629
2588f222
MO
1630 /* Initialize IRQ poll */
1631 if (afu_is_irqpoll_enabled(afu))
1632 irq_poll_init(&afu->irqpoll, afu->irqpoll_weight,
1633 cxlflash_irqpoll);
1634
c21e0bbf
MO
1635 rc = init_global(cfg);
1636
88d33628 1637 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1638 return rc;
1639}
1640
1641/**
9526f360 1642 * init_intr() - setup interrupt handlers for the master context
1284fb0c 1643 * @cfg: Internal structure associated with the host.
c21e0bbf 1644 *
1284fb0c 1645 * Return: 0 on success, -errno on failure
c21e0bbf 1646 */
9526f360
MK
1647static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1648 struct cxl_context *ctx)
c21e0bbf 1649{
c21e0bbf 1650 struct afu *afu = cfg->afu;
9526f360 1651 struct device *dev = &cfg->dev->dev;
c21e0bbf 1652 int rc = 0;
9526f360 1653 enum undo_level level = UNDO_NOOP;
c21e0bbf
MO
1654
1655 rc = cxl_allocate_afu_irqs(ctx, 3);
1656 if (unlikely(rc)) {
88d33628 1657 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
c21e0bbf 1658 __func__, rc);
9526f360 1659 level = UNDO_NOOP;
c21e0bbf
MO
1660 goto out;
1661 }
1662
1663 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1664 "SISL_MSI_SYNC_ERROR");
1665 if (unlikely(rc <= 0)) {
88d33628 1666 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1667 level = FREE_IRQ;
1668 goto out;
1669 }
1670
1671 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1672 "SISL_MSI_RRQ_UPDATED");
1673 if (unlikely(rc <= 0)) {
88d33628 1674 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
c21e0bbf
MO
1675 level = UNMAP_ONE;
1676 goto out;
1677 }
1678
1679 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1680 "SISL_MSI_ASYNC_ERROR");
1681 if (unlikely(rc <= 0)) {
88d33628 1682 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1683 level = UNMAP_TWO;
1684 goto out;
1685 }
9526f360
MK
1686out:
1687 return level;
1688}
c21e0bbf 1689
9526f360
MK
1690/**
1691 * init_mc() - create and register as the master context
1692 * @cfg: Internal structure associated with the host.
1693 *
1694 * Return: 0 on success, -errno on failure
1695 */
1696static int init_mc(struct cxlflash_cfg *cfg)
1697{
1698 struct cxl_context *ctx;
1699 struct device *dev = &cfg->dev->dev;
1700 int rc = 0;
1701 enum undo_level level;
1702
1703 ctx = cxl_get_context(cfg->dev);
1704 if (unlikely(!ctx)) {
1705 rc = -ENOMEM;
1706 goto ret;
1707 }
1708 cfg->mcctx = ctx;
1709
1710 /* Set it up as a master with the CXL */
1711 cxl_set_master(ctx);
1712
1713 /* During initialization reset the AFU to start from a clean slate */
1714 rc = cxl_afu_reset(cfg->mcctx);
1715 if (unlikely(rc)) {
88d33628 1716 dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc);
9526f360
MK
1717 goto ret;
1718 }
1719
1720 level = init_intr(cfg, ctx);
1721 if (unlikely(level)) {
88d33628 1722 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
9526f360
MK
1723 goto out;
1724 }
c21e0bbf
MO
1725
1726 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1727 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1728 * element (pe) that is embedded in the context (ctx)
1729 */
1730 rc = start_context(cfg);
1731 if (unlikely(rc)) {
1732 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1733 level = UNMAP_THREE;
1734 goto out;
1735 }
1736ret:
88d33628 1737 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1738 return rc;
1739out:
9526f360 1740 term_intr(cfg, level);
c21e0bbf
MO
1741 goto ret;
1742}
1743
1744/**
1745 * init_afu() - setup as master context and start AFU
1284fb0c 1746 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1747 *
1748 * This routine is a higher level of control for configuring the
1749 * AFU on probe and reset paths.
1750 *
1284fb0c 1751 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1752 */
1753static int init_afu(struct cxlflash_cfg *cfg)
1754{
1755 u64 reg;
1756 int rc = 0;
1757 struct afu *afu = cfg->afu;
1758 struct device *dev = &cfg->dev->dev;
1759
5cdac81a
MO
1760 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1761
c21e0bbf
MO
1762 rc = init_mc(cfg);
1763 if (rc) {
88d33628 1764 dev_err(dev, "%s: init_mc failed rc=%d\n",
c21e0bbf 1765 __func__, rc);
ee3491ba 1766 goto out;
c21e0bbf
MO
1767 }
1768
f15fbf8d 1769 /* Map the entire MMIO space of the AFU */
c21e0bbf
MO
1770 afu->afu_map = cxl_psa_map(cfg->mcctx);
1771 if (!afu->afu_map) {
88d33628 1772 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
ee3491ba 1773 rc = -ENOMEM;
c21e0bbf
MO
1774 goto err1;
1775 }
1776
e5ce067b
MO
1777 /* No byte reverse on reading afu_version or string will be backwards */
1778 reg = readq(&afu->afu_map->global.regs.afu_version);
1779 memcpy(afu->version, &reg, sizeof(reg));
c21e0bbf
MO
1780 afu->interface_version =
1781 readq_be(&afu->afu_map->global.regs.interface_version);
e5ce067b 1782 if ((afu->interface_version + 1) == 0) {
88d33628
MO
1783 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1784 "interface version %016llx\n", afu->version,
e5ce067b
MO
1785 afu->interface_version);
1786 rc = -EINVAL;
d940f9ae 1787 goto err1;
ee3491ba
MO
1788 }
1789
bae0ac69
MO
1790 if (afu_is_sq_cmd_mode(afu)) {
1791 afu->send_cmd = send_cmd_sq;
1792 afu->context_reset = context_reset_sq;
1793 } else {
1794 afu->send_cmd = send_cmd_ioarrin;
1795 afu->context_reset = context_reset_ioarrin;
1796 }
48b4be36 1797
88d33628
MO
1798 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
1799 afu->version, afu->interface_version);
c21e0bbf
MO
1800
1801 rc = start_afu(cfg);
1802 if (rc) {
88d33628 1803 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
d940f9ae 1804 goto err1;
c21e0bbf
MO
1805 }
1806
1807 afu_err_intr_init(cfg->afu);
11f7b184
UK
1808 spin_lock_init(&afu->rrin_slock);
1809 afu->room = readq_be(&afu->host_map->cmd_room);
c21e0bbf 1810
2cb79266
MO
1811 /* Restore the LUN mappings */
1812 cxlflash_restore_luntable(cfg);
ee3491ba 1813out:
88d33628 1814 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 1815 return rc;
ee3491ba 1816
ee3491ba 1817err1:
9526f360
MK
1818 term_intr(cfg, UNMAP_THREE);
1819 term_mc(cfg);
ee3491ba 1820 goto out;
c21e0bbf
MO
1821}
1822
c21e0bbf
MO
1823/**
1824 * cxlflash_afu_sync() - builds and sends an AFU sync command
1825 * @afu: AFU associated with the host.
1826 * @ctx_hndl_u: Identifies context requesting sync.
1827 * @res_hndl_u: Identifies resource requesting sync.
1828 * @mode: Type of sync to issue (lightweight, heavyweight, global).
1829 *
1830 * The AFU can only take 1 sync command at a time. This routine enforces this
f15fbf8d 1831 * limitation by using a mutex to provide exclusive access to the AFU during
c21e0bbf
MO
1832 * the sync. This design point requires calling threads to not be on interrupt
1833 * context due to the possibility of sleeping during concurrent sync operations.
1834 *
5cdac81a
MO
1835 * AFU sync operations are only necessary and allowed when the device is
1836 * operating normally. When not operating normally, sync requests can occur as
1837 * part of cleaning up resources associated with an adapter prior to removal.
1838 * In this scenario, these requests are simply ignored (safe due to the AFU
1839 * going away).
1840 *
c21e0bbf
MO
1841 * Return:
1842 * 0 on success
1843 * -1 on failure
1844 */
1845int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
1846 res_hndl_t res_hndl_u, u8 mode)
1847{
5cdac81a 1848 struct cxlflash_cfg *cfg = afu->parent;
4392ba49 1849 struct device *dev = &cfg->dev->dev;
c21e0bbf 1850 struct afu_cmd *cmd = NULL;
350bb478 1851 char *buf = NULL;
c21e0bbf 1852 int rc = 0;
c21e0bbf
MO
1853 static DEFINE_MUTEX(sync_active);
1854
5cdac81a 1855 if (cfg->state != STATE_NORMAL) {
88d33628
MO
1856 dev_dbg(dev, "%s: Sync not required state=%u\n",
1857 __func__, cfg->state);
5cdac81a
MO
1858 return 0;
1859 }
1860
c21e0bbf 1861 mutex_lock(&sync_active);
de01283b 1862 atomic_inc(&afu->cmds_active);
350bb478
MO
1863 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
1864 if (unlikely(!buf)) {
1865 dev_err(dev, "%s: no memory for command\n", __func__);
c21e0bbf
MO
1866 rc = -1;
1867 goto out;
1868 }
1869
350bb478
MO
1870 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
1871 init_completion(&cmd->cevent);
350bb478 1872 cmd->parent = afu;
c21e0bbf 1873
88d33628 1874 dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
c21e0bbf
MO
1875
1876 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
350bb478
MO
1877 cmd->rcb.ctx_id = afu->ctx_hndl;
1878 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
c21e0bbf
MO
1879 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
1880
1881 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
1882 cmd->rcb.cdb[1] = mode;
1883
1884 /* The cdb is aligned, no unaligned accessors required */
1786f4a0
MO
1885 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
1886 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
c21e0bbf 1887
48b4be36 1888 rc = afu->send_cmd(afu, cmd);
c21e0bbf
MO
1889 if (unlikely(rc))
1890 goto out;
1891
9ba848ac
MO
1892 rc = wait_resp(afu, cmd);
1893 if (unlikely(rc))
c21e0bbf
MO
1894 rc = -1;
1895out:
de01283b 1896 atomic_dec(&afu->cmds_active);
c21e0bbf 1897 mutex_unlock(&sync_active);
350bb478 1898 kfree(buf);
88d33628 1899 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1900 return rc;
1901}
1902
1903/**
15305514
MO
1904 * afu_reset() - resets the AFU
1905 * @cfg: Internal structure associated with the host.
c21e0bbf 1906 *
1284fb0c 1907 * Return: 0 on success, -errno on failure
c21e0bbf 1908 */
15305514 1909static int afu_reset(struct cxlflash_cfg *cfg)
c21e0bbf 1910{
88d33628 1911 struct device *dev = &cfg->dev->dev;
c21e0bbf 1912 int rc = 0;
88d33628 1913
c21e0bbf
MO
1914 /* Stop the context before the reset. Since the context is
1915 * no longer available restart it after the reset is complete
1916 */
c21e0bbf
MO
1917 term_afu(cfg);
1918
1919 rc = init_afu(cfg);
1920
88d33628 1921 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1922 return rc;
1923}
1924
f411396d
MK
1925/**
1926 * drain_ioctls() - wait until all currently executing ioctls have completed
1927 * @cfg: Internal structure associated with the host.
1928 *
1929 * Obtain write access to read/write semaphore that wraps ioctl
1930 * handling to 'drain' ioctls currently executing.
1931 */
1932static void drain_ioctls(struct cxlflash_cfg *cfg)
1933{
1934 down_write(&cfg->ioctl_rwsem);
1935 up_write(&cfg->ioctl_rwsem);
1936}
1937
15305514
MO
1938/**
1939 * cxlflash_eh_device_reset_handler() - reset a single LUN
1940 * @scp: SCSI command to send.
1941 *
1942 * Return:
1943 * SUCCESS as defined in scsi/scsi.h
1944 * FAILED as defined in scsi/scsi.h
1945 */
1946static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
1947{
1948 int rc = SUCCESS;
1949 struct Scsi_Host *host = scp->device->host;
88d33628
MO
1950 struct cxlflash_cfg *cfg = shost_priv(host);
1951 struct device *dev = &cfg->dev->dev;
15305514
MO
1952 struct afu *afu = cfg->afu;
1953 int rcr = 0;
1954
88d33628
MO
1955 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
1956 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
1957 scp->device->channel, scp->device->id, scp->device->lun,
1958 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
1959 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
1960 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
1961 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514 1962
ed486daa 1963retry:
15305514
MO
1964 switch (cfg->state) {
1965 case STATE_NORMAL:
1966 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
1967 if (unlikely(rcr))
1968 rc = FAILED;
1969 break;
1970 case STATE_RESET:
1971 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
ed486daa 1972 goto retry;
15305514
MO
1973 default:
1974 rc = FAILED;
1975 break;
1976 }
1977
88d33628 1978 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
1979 return rc;
1980}
1981
1982/**
1983 * cxlflash_eh_host_reset_handler() - reset the host adapter
1984 * @scp: SCSI command from stack identifying host.
1985 *
1d3324c3
MO
1986 * Following a reset, the state is evaluated again in case an EEH occurred
1987 * during the reset. In such a scenario, the host reset will either yield
1988 * until the EEH recovery is complete or return success or failure based
1989 * upon the current device state.
1990 *
15305514
MO
1991 * Return:
1992 * SUCCESS as defined in scsi/scsi.h
1993 * FAILED as defined in scsi/scsi.h
1994 */
1995static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
1996{
1997 int rc = SUCCESS;
1998 int rcr = 0;
1999 struct Scsi_Host *host = scp->device->host;
88d33628
MO
2000 struct cxlflash_cfg *cfg = shost_priv(host);
2001 struct device *dev = &cfg->dev->dev;
15305514 2002
88d33628
MO
2003 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2004 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2005 scp->device->channel, scp->device->id, scp->device->lun,
2006 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2007 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2008 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2009 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514
MO
2010
2011 switch (cfg->state) {
2012 case STATE_NORMAL:
2013 cfg->state = STATE_RESET;
f411396d 2014 drain_ioctls(cfg);
15305514
MO
2015 cxlflash_mark_contexts_error(cfg);
2016 rcr = afu_reset(cfg);
2017 if (rcr) {
2018 rc = FAILED;
2019 cfg->state = STATE_FAILTERM;
2020 } else
2021 cfg->state = STATE_NORMAL;
2022 wake_up_all(&cfg->reset_waitq);
1d3324c3
MO
2023 ssleep(1);
2024 /* fall through */
15305514
MO
2025 case STATE_RESET:
2026 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2027 if (cfg->state == STATE_NORMAL)
2028 break;
2029 /* fall through */
2030 default:
2031 rc = FAILED;
2032 break;
2033 }
2034
88d33628 2035 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
2036 return rc;
2037}
2038
2039/**
2040 * cxlflash_change_queue_depth() - change the queue depth for the device
2041 * @sdev: SCSI device destined for queue depth change.
2042 * @qdepth: Requested queue depth value to set.
2043 *
2044 * The requested queue depth is capped to the maximum supported value.
2045 *
2046 * Return: The actual queue depth set.
2047 */
2048static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
2049{
2050
2051 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
2052 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
2053
2054 scsi_change_queue_depth(sdev, qdepth);
2055 return sdev->queue_depth;
2056}
2057
2058/**
2059 * cxlflash_show_port_status() - queries and presents the current port status
e0f01a21
MO
2060 * @port: Desired port for status reporting.
2061 * @afu: AFU owning the specified port.
15305514
MO
2062 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2063 *
2064 * Return: The size of the ASCII string returned in @buf.
2065 */
e0f01a21 2066static ssize_t cxlflash_show_port_status(u32 port, struct afu *afu, char *buf)
15305514 2067{
15305514 2068 char *disp_status;
15305514 2069 u64 status;
e0f01a21 2070 __be64 __iomem *fc_regs;
15305514 2071
e0f01a21 2072 if (port >= NUM_FC_PORTS)
15305514
MO
2073 return 0;
2074
2075 fc_regs = &afu->afu_map->global.fc_regs[port][0];
e0f01a21
MO
2076 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
2077 status &= FC_MTIP_STATUS_MASK;
15305514
MO
2078
2079 if (status == FC_MTIP_STATUS_ONLINE)
2080 disp_status = "online";
2081 else if (status == FC_MTIP_STATUS_OFFLINE)
2082 disp_status = "offline";
2083 else
2084 disp_status = "unknown";
2085
e0f01a21
MO
2086 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2087}
2088
2089/**
2090 * port0_show() - queries and presents the current status of port 0
2091 * @dev: Generic device associated with the host owning the port.
2092 * @attr: Device attribute representing the port.
2093 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2094 *
2095 * Return: The size of the ASCII string returned in @buf.
2096 */
2097static ssize_t port0_show(struct device *dev,
2098 struct device_attribute *attr,
2099 char *buf)
2100{
88d33628 2101 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2102 struct afu *afu = cfg->afu;
2103
2104 return cxlflash_show_port_status(0, afu, buf);
15305514
MO
2105}
2106
2107/**
e0f01a21
MO
2108 * port1_show() - queries and presents the current status of port 1
2109 * @dev: Generic device associated with the host owning the port.
2110 * @attr: Device attribute representing the port.
2111 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2112 *
2113 * Return: The size of the ASCII string returned in @buf.
2114 */
2115static ssize_t port1_show(struct device *dev,
2116 struct device_attribute *attr,
2117 char *buf)
2118{
88d33628 2119 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2120 struct afu *afu = cfg->afu;
2121
2122 return cxlflash_show_port_status(1, afu, buf);
2123}
2124
2125/**
2126 * lun_mode_show() - presents the current LUN mode of the host
15305514 2127 * @dev: Generic device associated with the host.
e0f01a21 2128 * @attr: Device attribute representing the LUN mode.
15305514
MO
2129 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
2130 *
2131 * Return: The size of the ASCII string returned in @buf.
2132 */
e0f01a21
MO
2133static ssize_t lun_mode_show(struct device *dev,
2134 struct device_attribute *attr, char *buf)
15305514 2135{
88d33628 2136 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
15305514
MO
2137 struct afu *afu = cfg->afu;
2138
e0f01a21 2139 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
15305514
MO
2140}
2141
2142/**
e0f01a21 2143 * lun_mode_store() - sets the LUN mode of the host
15305514 2144 * @dev: Generic device associated with the host.
e0f01a21 2145 * @attr: Device attribute representing the LUN mode.
15305514
MO
2146 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
2147 * @count: Length of data resizing in @buf.
2148 *
2149 * The CXL Flash AFU supports a dummy LUN mode where the external
2150 * links and storage are not required. Space on the FPGA is used
2151 * to create 1 or 2 small LUNs which are presented to the system
2152 * as if they were a normal storage device. This feature is useful
2153 * during development and also provides manufacturing with a way
2154 * to test the AFU without an actual device.
2155 *
2156 * 0 = external LUN[s] (default)
2157 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
2158 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
2159 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
2160 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
2161 *
2162 * Return: The size of the ASCII string returned in @buf.
2163 */
e0f01a21
MO
2164static ssize_t lun_mode_store(struct device *dev,
2165 struct device_attribute *attr,
2166 const char *buf, size_t count)
15305514
MO
2167{
2168 struct Scsi_Host *shost = class_to_shost(dev);
88d33628 2169 struct cxlflash_cfg *cfg = shost_priv(shost);
15305514
MO
2170 struct afu *afu = cfg->afu;
2171 int rc;
2172 u32 lun_mode;
2173
2174 rc = kstrtouint(buf, 10, &lun_mode);
2175 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2176 afu->internal_lun = lun_mode;
603ecce9
MK
2177
2178 /*
2179 * When configured for internal LUN, there is only one channel,
2180 * channel number 0, else there will be 2 (default).
2181 */
2182 if (afu->internal_lun)
2183 shost->max_channel = 0;
2184 else
2185 shost->max_channel = NUM_FC_PORTS - 1;
2186
15305514
MO
2187 afu_reset(cfg);
2188 scsi_scan_host(cfg->host);
2189 }
2190
2191 return count;
2192}
2193
2194/**
e0f01a21 2195 * ioctl_version_show() - presents the current ioctl version of the host
15305514
MO
2196 * @dev: Generic device associated with the host.
2197 * @attr: Device attribute representing the ioctl version.
2198 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
2199 *
2200 * Return: The size of the ASCII string returned in @buf.
2201 */
e0f01a21
MO
2202static ssize_t ioctl_version_show(struct device *dev,
2203 struct device_attribute *attr, char *buf)
15305514
MO
2204{
2205 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2206}
2207
2208/**
e0f01a21
MO
2209 * cxlflash_show_port_lun_table() - queries and presents the port LUN table
2210 * @port: Desired port for status reporting.
2211 * @afu: AFU owning the specified port.
2212 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2213 *
2214 * Return: The size of the ASCII string returned in @buf.
2215 */
2216static ssize_t cxlflash_show_port_lun_table(u32 port,
2217 struct afu *afu,
2218 char *buf)
2219{
2220 int i;
2221 ssize_t bytes = 0;
2222 __be64 __iomem *fc_port;
2223
2224 if (port >= NUM_FC_PORTS)
2225 return 0;
2226
2227 fc_port = &afu->afu_map->global.fc_port[port][0];
2228
2229 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2230 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
88d33628 2231 "%03d: %016llx\n", i, readq_be(&fc_port[i]));
e0f01a21
MO
2232 return bytes;
2233}
2234
2235/**
2236 * port0_lun_table_show() - presents the current LUN table of port 0
2237 * @dev: Generic device associated with the host owning the port.
2238 * @attr: Device attribute representing the port.
2239 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2240 *
2241 * Return: The size of the ASCII string returned in @buf.
2242 */
2243static ssize_t port0_lun_table_show(struct device *dev,
2244 struct device_attribute *attr,
2245 char *buf)
2246{
88d33628 2247 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2248 struct afu *afu = cfg->afu;
2249
2250 return cxlflash_show_port_lun_table(0, afu, buf);
2251}
2252
2253/**
2254 * port1_lun_table_show() - presents the current LUN table of port 1
2255 * @dev: Generic device associated with the host owning the port.
2256 * @attr: Device attribute representing the port.
2257 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2258 *
2259 * Return: The size of the ASCII string returned in @buf.
2260 */
2261static ssize_t port1_lun_table_show(struct device *dev,
2262 struct device_attribute *attr,
2263 char *buf)
2264{
88d33628 2265 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2266 struct afu *afu = cfg->afu;
2267
2268 return cxlflash_show_port_lun_table(1, afu, buf);
2269}
2270
2588f222
MO
2271/**
2272 * irqpoll_weight_show() - presents the current IRQ poll weight for the host
2273 * @dev: Generic device associated with the host.
2274 * @attr: Device attribute representing the IRQ poll weight.
2275 * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll
2276 * weight in ASCII.
2277 *
2278 * An IRQ poll weight of 0 indicates polling is disabled.
2279 *
2280 * Return: The size of the ASCII string returned in @buf.
2281 */
2282static ssize_t irqpoll_weight_show(struct device *dev,
2283 struct device_attribute *attr, char *buf)
2284{
2285 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2286 struct afu *afu = cfg->afu;
2287
2288 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight);
2289}
2290
2291/**
2292 * irqpoll_weight_store() - sets the current IRQ poll weight for the host
2293 * @dev: Generic device associated with the host.
2294 * @attr: Device attribute representing the IRQ poll weight.
2295 * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll
2296 * weight in ASCII.
2297 * @count: Length of data resizing in @buf.
2298 *
2299 * An IRQ poll weight of 0 indicates polling is disabled.
2300 *
2301 * Return: The size of the ASCII string returned in @buf.
2302 */
2303static ssize_t irqpoll_weight_store(struct device *dev,
2304 struct device_attribute *attr,
2305 const char *buf, size_t count)
2306{
2307 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2308 struct device *cfgdev = &cfg->dev->dev;
2309 struct afu *afu = cfg->afu;
2310 u32 weight;
2311 int rc;
2312
2313 rc = kstrtouint(buf, 10, &weight);
2314 if (rc)
2315 return -EINVAL;
2316
2317 if (weight > 256) {
2318 dev_info(cfgdev,
2319 "Invalid IRQ poll weight. It must be 256 or less.\n");
2320 return -EINVAL;
2321 }
2322
2323 if (weight == afu->irqpoll_weight) {
2324 dev_info(cfgdev,
2325 "Current IRQ poll weight has the same weight.\n");
2326 return -EINVAL;
2327 }
2328
2329 if (afu_is_irqpoll_enabled(afu))
2330 irq_poll_disable(&afu->irqpoll);
2331
2332 afu->irqpoll_weight = weight;
2333
2334 if (weight > 0)
2335 irq_poll_init(&afu->irqpoll, weight, cxlflash_irqpoll);
2336
2337 return count;
2338}
2339
e0f01a21
MO
2340/**
2341 * mode_show() - presents the current mode of the device
15305514
MO
2342 * @dev: Generic device associated with the device.
2343 * @attr: Device attribute representing the device mode.
2344 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
2345 *
2346 * Return: The size of the ASCII string returned in @buf.
2347 */
e0f01a21
MO
2348static ssize_t mode_show(struct device *dev,
2349 struct device_attribute *attr, char *buf)
15305514
MO
2350{
2351 struct scsi_device *sdev = to_scsi_device(dev);
2352
e0f01a21
MO
2353 return scnprintf(buf, PAGE_SIZE, "%s\n",
2354 sdev->hostdata ? "superpipe" : "legacy");
15305514
MO
2355}
2356
2357/*
2358 * Host attributes
2359 */
e0f01a21
MO
2360static DEVICE_ATTR_RO(port0);
2361static DEVICE_ATTR_RO(port1);
2362static DEVICE_ATTR_RW(lun_mode);
2363static DEVICE_ATTR_RO(ioctl_version);
2364static DEVICE_ATTR_RO(port0_lun_table);
2365static DEVICE_ATTR_RO(port1_lun_table);
2588f222 2366static DEVICE_ATTR_RW(irqpoll_weight);
15305514
MO
2367
2368static struct device_attribute *cxlflash_host_attrs[] = {
2369 &dev_attr_port0,
2370 &dev_attr_port1,
2371 &dev_attr_lun_mode,
2372 &dev_attr_ioctl_version,
e0f01a21
MO
2373 &dev_attr_port0_lun_table,
2374 &dev_attr_port1_lun_table,
2588f222 2375 &dev_attr_irqpoll_weight,
15305514
MO
2376 NULL
2377};
2378
2379/*
2380 * Device attributes
2381 */
e0f01a21 2382static DEVICE_ATTR_RO(mode);
15305514
MO
2383
2384static struct device_attribute *cxlflash_dev_attrs[] = {
2385 &dev_attr_mode,
2386 NULL
2387};
2388
2389/*
2390 * Host template
2391 */
2392static struct scsi_host_template driver_template = {
2393 .module = THIS_MODULE,
2394 .name = CXLFLASH_ADAPTER_NAME,
2395 .info = cxlflash_driver_info,
2396 .ioctl = cxlflash_ioctl,
2397 .proc_name = CXLFLASH_NAME,
2398 .queuecommand = cxlflash_queuecommand,
2399 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2400 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2401 .change_queue_depth = cxlflash_change_queue_depth,
83430833 2402 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
15305514 2403 .can_queue = CXLFLASH_MAX_CMDS,
5fbb96c8 2404 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
15305514 2405 .this_id = -1,
68ab2d76 2406 .sg_tablesize = 1, /* No scatter gather support */
15305514
MO
2407 .max_sectors = CXLFLASH_MAX_SECTORS,
2408 .use_clustering = ENABLE_CLUSTERING,
2409 .shost_attrs = cxlflash_host_attrs,
2410 .sdev_attrs = cxlflash_dev_attrs,
2411};
2412
2413/*
2414 * Device dependent values
2415 */
96e1b660
UK
2416static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2417 0ULL };
2418static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
704c4b0d 2419 CXLFLASH_NOTIFY_SHUTDOWN };
42f90a6b
MO
2420static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2421 CXLFLASH_NOTIFY_SHUTDOWN };
15305514
MO
2422
2423/*
2424 * PCI device binding table
2425 */
2426static struct pci_device_id cxlflash_pci_table[] = {
2427 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2428 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
a2746fb1
MK
2429 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2430 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
42f90a6b
MO
2431 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2432 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
15305514
MO
2433 {}
2434};
2435
2436MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2437
c21e0bbf
MO
2438/**
2439 * cxlflash_worker_thread() - work thread handler for the AFU
2440 * @work: Work structure contained within cxlflash associated with host.
2441 *
2442 * Handles the following events:
2443 * - Link reset which cannot be performed on interrupt context due to
2444 * blocking up to a few seconds
ef51074a 2445 * - Rescan the host
c21e0bbf
MO
2446 */
2447static void cxlflash_worker_thread(struct work_struct *work)
2448{
5cdac81a
MO
2449 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2450 work_q);
c21e0bbf 2451 struct afu *afu = cfg->afu;
4392ba49 2452 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
2453 int port;
2454 ulong lock_flags;
2455
5cdac81a
MO
2456 /* Avoid MMIO if the device has failed */
2457
2458 if (cfg->state != STATE_NORMAL)
2459 return;
2460
c21e0bbf
MO
2461 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2462
2463 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2464 port = cfg->lr_port;
2465 if (port < 0)
4392ba49
MO
2466 dev_err(dev, "%s: invalid port index %d\n",
2467 __func__, port);
c21e0bbf
MO
2468 else {
2469 spin_unlock_irqrestore(cfg->host->host_lock,
2470 lock_flags);
2471
2472 /* The reset can block... */
2473 afu_link_reset(afu, port,
f15fbf8d 2474 &afu->afu_map->global.fc_regs[port][0]);
c21e0bbf
MO
2475 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2476 }
2477
2478 cfg->lr_state = LINK_RESET_COMPLETE;
2479 }
2480
c21e0bbf 2481 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
ef51074a
MO
2482
2483 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
2484 scsi_scan_host(cfg->host);
c21e0bbf
MO
2485}
2486
2487/**
2488 * cxlflash_probe() - PCI entry point to add host
2489 * @pdev: PCI device associated with the host.
2490 * @dev_id: PCI device id associated with device.
2491 *
1284fb0c 2492 * Return: 0 on success, -errno on failure
c21e0bbf
MO
2493 */
2494static int cxlflash_probe(struct pci_dev *pdev,
2495 const struct pci_device_id *dev_id)
2496{
2497 struct Scsi_Host *host;
2498 struct cxlflash_cfg *cfg = NULL;
88d33628 2499 struct device *dev = &pdev->dev;
c21e0bbf
MO
2500 struct dev_dependent_vals *ddv;
2501 int rc = 0;
2502
2503 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2504 __func__, pdev->irq);
2505
2506 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2507 driver_template.max_sectors = ddv->max_sectors;
2508
2509 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2510 if (!host) {
88d33628 2511 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
c21e0bbf
MO
2512 rc = -ENOMEM;
2513 goto out;
2514 }
2515
2516 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2517 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2518 host->max_channel = NUM_FC_PORTS - 1;
2519 host->unique_id = host->host_no;
2520 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2521
88d33628 2522 cfg = shost_priv(host);
c21e0bbf
MO
2523 cfg->host = host;
2524 rc = alloc_mem(cfg);
2525 if (rc) {
88d33628 2526 dev_err(dev, "%s: alloc_mem failed\n", __func__);
c21e0bbf 2527 rc = -ENOMEM;
8b5b1e87 2528 scsi_host_put(cfg->host);
c21e0bbf
MO
2529 goto out;
2530 }
2531
2532 cfg->init_state = INIT_STATE_NONE;
2533 cfg->dev = pdev;
17ead26f 2534 cfg->cxl_fops = cxlflash_cxl_fops;
2cb79266
MO
2535
2536 /*
2537 * The promoted LUNs move to the top of the LUN table. The rest stay
2538 * on the bottom half. The bottom half grows from the end
2539 * (index = 255), whereas the top half grows from the beginning
2540 * (index = 0).
2541 */
2542 cfg->promote_lun_index = 0;
2543 cfg->last_lun_index[0] = CXLFLASH_NUM_VLUNS/2 - 1;
2544 cfg->last_lun_index[1] = CXLFLASH_NUM_VLUNS/2 - 1;
2545
c21e0bbf 2546 cfg->dev_id = (struct pci_device_id *)dev_id;
c21e0bbf
MO
2547
2548 init_waitqueue_head(&cfg->tmf_waitq);
439e85c1 2549 init_waitqueue_head(&cfg->reset_waitq);
c21e0bbf
MO
2550
2551 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2552 cfg->lr_state = LINK_RESET_INVALID;
2553 cfg->lr_port = -1;
0d73122c 2554 spin_lock_init(&cfg->tmf_slock);
65be2c79
MO
2555 mutex_init(&cfg->ctx_tbl_list_mutex);
2556 mutex_init(&cfg->ctx_recovery_mutex);
0a27ae51 2557 init_rwsem(&cfg->ioctl_rwsem);
65be2c79
MO
2558 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
2559 INIT_LIST_HEAD(&cfg->lluns);
c21e0bbf
MO
2560
2561 pci_set_drvdata(pdev, cfg);
2562
c21e0bbf
MO
2563 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2564
2565 rc = init_pci(cfg);
2566 if (rc) {
88d33628 2567 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2568 goto out_remove;
2569 }
2570 cfg->init_state = INIT_STATE_PCI;
2571
2572 rc = init_afu(cfg);
2573 if (rc) {
88d33628 2574 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2575 goto out_remove;
2576 }
2577 cfg->init_state = INIT_STATE_AFU;
2578
c21e0bbf
MO
2579 rc = init_scsi(cfg);
2580 if (rc) {
88d33628 2581 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2582 goto out_remove;
2583 }
2584 cfg->init_state = INIT_STATE_SCSI;
2585
2586out:
88d33628 2587 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
2588 return rc;
2589
2590out_remove:
2591 cxlflash_remove(pdev);
2592 goto out;
2593}
2594
5cdac81a
MO
2595/**
2596 * cxlflash_pci_error_detected() - called when a PCI error is detected
2597 * @pdev: PCI device struct.
2598 * @state: PCI channel state.
2599 *
1d3324c3
MO
2600 * When an EEH occurs during an active reset, wait until the reset is
2601 * complete and then take action based upon the device state.
2602 *
5cdac81a
MO
2603 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
2604 */
2605static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2606 pci_channel_state_t state)
2607{
65be2c79 2608 int rc = 0;
5cdac81a
MO
2609 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2610 struct device *dev = &cfg->dev->dev;
2611
2612 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2613
2614 switch (state) {
2615 case pci_channel_io_frozen:
1d3324c3
MO
2616 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2617 if (cfg->state == STATE_FAILTERM)
2618 return PCI_ERS_RESULT_DISCONNECT;
2619
439e85c1 2620 cfg->state = STATE_RESET;
5cdac81a 2621 scsi_block_requests(cfg->host);
0a27ae51 2622 drain_ioctls(cfg);
65be2c79
MO
2623 rc = cxlflash_mark_contexts_error(cfg);
2624 if (unlikely(rc))
88d33628 2625 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
65be2c79 2626 __func__, rc);
9526f360 2627 term_afu(cfg);
5cdac81a
MO
2628 return PCI_ERS_RESULT_NEED_RESET;
2629 case pci_channel_io_perm_failure:
2630 cfg->state = STATE_FAILTERM;
439e85c1 2631 wake_up_all(&cfg->reset_waitq);
5cdac81a
MO
2632 scsi_unblock_requests(cfg->host);
2633 return PCI_ERS_RESULT_DISCONNECT;
2634 default:
2635 break;
2636 }
2637 return PCI_ERS_RESULT_NEED_RESET;
2638}
2639
2640/**
2641 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
2642 * @pdev: PCI device struct.
2643 *
2644 * This routine is called by the pci error recovery code after the PCI
2645 * slot has been reset, just before we should resume normal operations.
2646 *
2647 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
2648 */
2649static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2650{
2651 int rc = 0;
2652 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2653 struct device *dev = &cfg->dev->dev;
2654
2655 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2656
2657 rc = init_afu(cfg);
2658 if (unlikely(rc)) {
88d33628 2659 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
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2660 return PCI_ERS_RESULT_DISCONNECT;
2661 }
2662
2663 return PCI_ERS_RESULT_RECOVERED;
2664}
2665
2666/**
2667 * cxlflash_pci_resume() - called when normal operation can resume
2668 * @pdev: PCI device struct
2669 */
2670static void cxlflash_pci_resume(struct pci_dev *pdev)
2671{
2672 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2673 struct device *dev = &cfg->dev->dev;
2674
2675 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2676
2677 cfg->state = STATE_NORMAL;
439e85c1 2678 wake_up_all(&cfg->reset_waitq);
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2679 scsi_unblock_requests(cfg->host);
2680}
2681
2682static const struct pci_error_handlers cxlflash_err_handler = {
2683 .error_detected = cxlflash_pci_error_detected,
2684 .slot_reset = cxlflash_pci_slot_reset,
2685 .resume = cxlflash_pci_resume,
2686};
2687
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2688/*
2689 * PCI device structure
2690 */
2691static struct pci_driver cxlflash_driver = {
2692 .name = CXLFLASH_NAME,
2693 .id_table = cxlflash_pci_table,
2694 .probe = cxlflash_probe,
2695 .remove = cxlflash_remove,
babf985d 2696 .shutdown = cxlflash_remove,
5cdac81a 2697 .err_handler = &cxlflash_err_handler,
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2698};
2699
2700/**
2701 * init_cxlflash() - module entry point
2702 *
1284fb0c 2703 * Return: 0 on success, -errno on failure
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2704 */
2705static int __init init_cxlflash(void)
2706{
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2707 cxlflash_list_init();
2708
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2709 return pci_register_driver(&cxlflash_driver);
2710}
2711
2712/**
2713 * exit_cxlflash() - module exit point
2714 */
2715static void __exit exit_cxlflash(void)
2716{
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2717 cxlflash_term_global_luns();
2718 cxlflash_free_errpage();
2719
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2720 pci_unregister_driver(&cxlflash_driver);
2721}
2722
2723module_init(init_cxlflash);
2724module_exit(exit_cxlflash);