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321d628a FG |
1 | From 59557ab0237e7474402d4240c55f119a86dadc7d Mon Sep 17 00:00:00 2001 |
2 | From: Gayatri Kammela <gayatri.kammela@intel.com> | |
3 | Date: Mon, 30 Oct 2017 18:20:29 -0700 | |
633c5ed1 | 4 | Subject: [PATCH 082/242] x86/cpufeatures: Enable new SSE/AVX/AVX512 CPU |
321d628a FG |
5 | features |
6 | MIME-Version: 1.0 | |
7 | Content-Type: text/plain; charset=UTF-8 | |
8 | Content-Transfer-Encoding: 8bit | |
9 | ||
10 | CVE-2017-5754 | |
11 | ||
12 | Add a few new SSE/AVX/AVX512 instruction groups/features for enumeration | |
13 | in /proc/cpuinfo: AVX512_VBMI2, GFNI, VAES, VPCLMULQDQ, AVX512_VNNI, | |
14 | AVX512_BITALG. | |
15 | ||
16 | CPUID.(EAX=7,ECX=0):ECX[bit 6] AVX512_VBMI2 | |
17 | CPUID.(EAX=7,ECX=0):ECX[bit 8] GFNI | |
18 | CPUID.(EAX=7,ECX=0):ECX[bit 9] VAES | |
19 | CPUID.(EAX=7,ECX=0):ECX[bit 10] VPCLMULQDQ | |
20 | CPUID.(EAX=7,ECX=0):ECX[bit 11] AVX512_VNNI | |
21 | CPUID.(EAX=7,ECX=0):ECX[bit 12] AVX512_BITALG | |
22 | ||
23 | Detailed information of CPUID bits for these features can be found | |
24 | in the Intel Architecture Instruction Set Extensions and Future Features | |
25 | Programming Interface document (refer to Table 1-1. and Table 1-2.). | |
26 | A copy of this document is available at | |
27 | https://bugzilla.kernel.org/show_bug.cgi?id=197239 | |
28 | ||
29 | Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> | |
30 | Acked-by: Thomas Gleixner <tglx@linutronix.de> | |
31 | Cc: Andi Kleen <andi.kleen@intel.com> | |
32 | Cc: Fenghua Yu <fenghua.yu@intel.com> | |
33 | Cc: Linus Torvalds <torvalds@linux-foundation.org> | |
34 | Cc: Peter Zijlstra <peterz@infradead.org> | |
35 | Cc: Ravi Shankar <ravi.v.shankar@intel.com> | |
36 | Cc: Ricardo Neri <ricardo.neri@intel.com> | |
37 | Cc: Yang Zhong <yang.zhong@intel.com> | |
38 | Cc: bp@alien8.de | |
39 | Link: http://lkml.kernel.org/r/1509412829-23380-1-git-send-email-gayatri.kammela@intel.com | |
40 | Signed-off-by: Ingo Molnar <mingo@kernel.org> | |
41 | (cherry picked from commit c128dbfa0f879f8ce7b79054037889b0b2240728) | |
42 | Signed-off-by: Andy Whitcroft <apw@canonical.com> | |
43 | Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com> | |
44 | (cherry picked from commit b29eb29c5aca4708d66fa977db40c779366636a2) | |
45 | Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com> | |
46 | --- | |
47 | arch/x86/include/asm/cpufeatures.h | 6 ++++++ | |
48 | arch/x86/kernel/cpu/cpuid-deps.c | 6 ++++++ | |
49 | 2 files changed, 12 insertions(+) | |
50 | ||
51 | diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h | |
52 | index f4e145c4b06f..c465bd6613ed 100644 | |
53 | --- a/arch/x86/include/asm/cpufeatures.h | |
54 | +++ b/arch/x86/include/asm/cpufeatures.h | |
55 | @@ -297,6 +297,12 @@ | |
56 | #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ | |
57 | #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */ | |
58 | #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ | |
59 | +#define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */ | |
60 | +#define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */ | |
61 | +#define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */ | |
62 | +#define X86_FEATURE_VPCLMULQDQ (16*32+ 10) /* Carry-Less Multiplication Double Quadword */ | |
63 | +#define X86_FEATURE_AVX512_VNNI (16*32+ 11) /* Vector Neural Network Instructions */ | |
64 | +#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB */ | |
65 | #define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */ | |
66 | #define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */ | |
67 | #define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */ | |
68 | diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c | |
69 | index c1d49842a411..c21f22d836ad 100644 | |
70 | --- a/arch/x86/kernel/cpu/cpuid-deps.c | |
71 | +++ b/arch/x86/kernel/cpu/cpuid-deps.c | |
72 | @@ -50,6 +50,12 @@ const static struct cpuid_dep cpuid_deps[] = { | |
73 | { X86_FEATURE_AVX512BW, X86_FEATURE_AVX512F }, | |
74 | { X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F }, | |
75 | { X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F }, | |
76 | + { X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL }, | |
77 | + { X86_FEATURE_GFNI, X86_FEATURE_AVX512VL }, | |
78 | + { X86_FEATURE_VAES, X86_FEATURE_AVX512VL }, | |
79 | + { X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL }, | |
80 | + { X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL }, | |
81 | + { X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL }, | |
82 | { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, | |
83 | { X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F }, | |
84 | { X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F }, | |
85 | -- | |
86 | 2.14.2 | |
87 |