projects / pve-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 321d628a FG |
1 | From 5280fab9bb19e94b1ea5046dc1360f121ec64c0f Mon Sep 17 00:00:00 2001 |
| 2 | From: Rudolf Marek <r.marek@assembler.cz> | |
| 3 | Date: Tue, 28 Nov 2017 22:01:06 +0100 | |
| e4cdf2a5 | 4 | Subject: [PATCH 122/241] x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on |
| 321d628a FG |
5 | AMD |
| 6 | MIME-Version: 1.0 | |
| 7 | Content-Type: text/plain; charset=UTF-8 | |
| 8 | Content-Transfer-Encoding: 8bit | |
| 9 | ||
| 10 | CVE-2017-5754 | |
| 11 | ||
| 12 | [ Note, this is a Git cherry-pick of the following commit: | |
| 13 | ||
| 14 | 2b67799bdf25 ("x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on AMD") | |
| 15 | ||
| 16 | ... for easier x86 PTI code testing and back-porting. ] | |
| 17 | ||
| 18 | The latest AMD AMD64 Architecture Programmer's Manual | |
| 19 | adds a CPUID feature XSaveErPtr (CPUID_Fn80000008_EBX[2]). | |
| 20 | ||
| 21 | If this feature is set, the FXSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES | |
| 22 | / FXRSTOR, XRSTOR, XRSTORS always save/restore error pointers, | |
| 23 | thus making the X86_BUG_FXSAVE_LEAK workaround obsolete on such CPUs. | |
| 24 | ||
| 25 | Signed-Off-By: Rudolf Marek <r.marek@assembler.cz> | |
| 26 | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> | |
| 27 | Reviewed-by: Borislav Petkov <bp@suse.de> | |
| 28 | Tested-by: Borislav Petkov <bp@suse.de> | |
| 29 | Cc: Andy Lutomirski <luto@amacapital.net> | |
| 30 | Link: https://lkml.kernel.org/r/bdcebe90-62c5-1f05-083c-eba7f08b2540@assembler.cz | |
| 31 | Signed-off-by: Ingo Molnar <mingo@kernel.org> | |
| 32 | (cherry picked from commit f2dbad36c55e5d3a91dccbde6e8cae345fe5632f) | |
| 33 | Signed-off-by: Andy Whitcroft <apw@canonical.com> | |
| 34 | Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com> | |
| 35 | (cherry picked from commit 281b622113c66ba2de9b7725e1d232ea3c282114) | |
| 36 | Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com> | |
| 37 | --- | |
| 38 | arch/x86/include/asm/cpufeatures.h | 1 + | |
| 39 | arch/x86/kernel/cpu/amd.c | 7 +++++-- | |
| 40 | 2 files changed, 6 insertions(+), 2 deletions(-) | |
| 41 | ||
| 42 | diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h | |
| 43 | index 0ea630bb3e74..d57a174ec97c 100644 | |
| 44 | --- a/arch/x86/include/asm/cpufeatures.h | |
| 45 | +++ b/arch/x86/include/asm/cpufeatures.h | |
| 46 | @@ -265,6 +265,7 @@ | |
| 47 | /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ | |
| 48 | #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ | |
| 49 | #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ | |
| 50 | +#define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ | |
| 51 | ||
| 52 | /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ | |
| 53 | #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ | |
| 54 | diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c | |
| 55 | index 3b9e220621f8..2a5328cc03a6 100644 | |
| 56 | --- a/arch/x86/kernel/cpu/amd.c | |
| 57 | +++ b/arch/x86/kernel/cpu/amd.c | |
| 58 | @@ -760,8 +760,11 @@ static void init_amd(struct cpuinfo_x86 *c) | |
| 59 | case 0x15: init_amd_bd(c); break; | |
| 60 | } | |
| 61 | ||
| 62 | - /* Enable workaround for FXSAVE leak */ | |
| 63 | - if (c->x86 >= 6) | |
| 64 | + /* | |
| 65 | + * Enable workaround for FXSAVE leak on CPUs | |
| 66 | + * without a XSaveErPtr feature | |
| 67 | + */ | |
| 68 | + if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR))) | |
| 69 | set_cpu_bug(c, X86_BUG_FXSAVE_LEAK); | |
| 70 | ||
| 71 | cpu_detect_cache_sizes(c); | |
| 72 | -- | |
| 73 | 2.14.2 | |
| 74 |