]> git.proxmox.com Git - pve-kernel.git/blobdiff - patches/kernel/0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch
update to Ubuntu-5.4.0-43.47
[pve-kernel.git] / patches / kernel / 0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch
index 0f7ffdadfa136f74401c656415d65f6a654f1222..7e1f066b95d1be2e0889e858723b0c299f5bb750 100644 (file)
@@ -55,10 +55,10 @@ Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
  2 files changed, 111 insertions(+)
 
 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
-index 12305bfe9ac3..9b41dd8b5503 100644
+index 9c05c1fd8ed2..3fe28e536a56 100644
 --- a/Documentation/admin-guide/kernel-parameters.txt
 +++ b/Documentation/admin-guide/kernel-parameters.txt
-@@ -3395,6 +3395,15 @@
+@@ -3434,6 +3434,15 @@
                                Also, it enforces the PCI Local Bus spec
                                rule that those bits should be 0 in system reset
                                events (useful for kexec/kdump cases).
@@ -75,10 +75,10 @@ index 12305bfe9ac3..9b41dd8b5503 100644
                                Safety option to keep boot IRQs enabled. This
                                should never be necessary.
 diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
-index 93ce2912a00b..94b06fe4ab4c 100644
+index eaa0036878a9..f0e4c36c4e8d 100644
 --- a/drivers/pci/quirks.c
 +++ b/drivers/pci/quirks.c
-@@ -193,6 +193,106 @@ static int __init pci_apply_final_quirks(void)
+@@ -192,6 +192,106 @@ static int __init pci_apply_final_quirks(void)
  }
  fs_initcall_sync(pci_apply_final_quirks);
  
@@ -185,7 +185,7 @@ index 93ce2912a00b..94b06fe4ab4c 100644
  /*
   * Decoding should be disabled for a PCI device during BAR sizing to avoid
   * conflict. But doing so may cause problems on host bridge and perhaps other
-@@ -4573,6 +4673,8 @@ static const struct pci_dev_acs_enabled {
+@@ -4811,6 +4911,8 @@ static const struct pci_dev_acs_enabled {
        { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
        /* APM X-Gene */
        { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },