smbios: Make multiple -smbios type= accumulate sanely
Currently, -smbios type=T,NAME=VAL,... adds one field (T,NAME) with
value VAL to fw_cfg for each unique NAME. If NAME occurs multiple
times, the last one's VAL is used (before the QemuOpts conversion, the
first one was used).
Multiple -smbios can add multiple fields with the same (T, NAME).
SeaBIOS reads all of them from fw_cfg, but uses only the first field
(T, NAME). The others are ignored.
"First one wins, subsequent ones get ignored silently" isn't nice. We
commonly let the last option win. Useful, because it lets you
-readconfig first, then selectively override with command line
options.
Clean up -smbios to work the common way. Accumulate the settings,
with later ones overwriting earlier ones. Put the result into fw_cfg
(no more useless duplicates).
Bonus cleanup: qemu_uuid_parse() no longer sets SMBIOS system uuid by
side effect.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
smbios: Improve diagnostics for conflicting entries
We allow either tables or fields for the same type. Makes sense,
because SeaBIOS uses fields only when no tables are present.
We do this by searching the SMBIOS blob for a previously added table
or field. Error messages look like this:
qemu-system-x86_64: -smbios type=1,serial=42: SMBIOS type 1 table already defined, cannot add field
User needs to know that "table" is defined by -smbios file=..., and
"field" by -smbios type=...
Instead of searching the blob, record additions of interest, and check
that. Simpler, and makes better error messages possible:
qemu-system-x86_64: -smbios file=smbios_type_1.bin: Can't mix file= and type= for same type
qemu-system-x86_64: -smbios type=1,serial=42,serial=99: This is the conflicting setting
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
So that it can be set in config file for -readconfig.
This tightens parsing of -smbios, and makes it more consistent with
other options: unknown parameters are rejected, numbers with trailing
junk are rejected, when a parameter is given multiple times, last
rather than first wins, ...
MST: drop one chunk to fix build errors
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This check is useless, as bigger addresses will be ignored when
added to 'io' MemoryRegion, which has a size of 64K.
However, some architectures don't use the 'io' MemoryRegion, like
the alpha and versatile platforms. They create a PCI I/O region
bigger than 64K, so let them handle PCI I/O BARs in the higher range.
MST: reinstated work-around for BAR sizing.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Anthony Liguori [Wed, 11 Sep 2013 19:46:52 +0000 (14:46 -0500)]
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130910' into staging
ARM queue:
* aarch64 preparation patchset (excluding the defconfigs, so this
doesn't actually enable the new targets yet)
* minor bugfixes and cleanups
* disable "-cpu any" in system emulation mode
* fix ARMv7M stack alignment on reset
# gpg: Signature made Tue 10 Sep 2013 01:46:11 PM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found
# By Alexander Graf (13) and others
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20130910: (28 commits)
configure: Add handling code for AArch64 targets
linux-user: Add AArch64 support
linux-user: Allow targets to specify a minimum uname release
linux-user: Add AArch64 termbits.h definitions
linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64
linux-user: Make sure NWFPE code is 32 bit ARM only
linux-user: Add signal handling for AArch64
linux-user: Fix up AArch64 syscall handlers
linux-user: Add syscall number definitions for AArch64
linux-user: Add cpu loop for AArch64
linux-user: Don't treat AArch64 cpu names specially
target-arm: Add AArch64 gdbstub support
target-arm: Add AArch64 translation stub
target-arm: Prepare translation for AArch64 code
target-arm: Disable 32 bit CPUs in 64 bit linux-user builds
target-arm: Add new AArch64CPUInfo base class and subclasses
target-arm: Pass DisasContext* to gen_set_pc_im()
target-arm: Fix target_ulong/uint32_t confusions
target-arm: Export cpu_env
target-arm: Extract the disas struct to a header file
...
Message-id: 1378839142-7726-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Anthony Liguori [Wed, 11 Sep 2013 19:46:26 +0000 (14:46 -0500)]
Merge remote-tracking branch 'spice/spice.v73' into staging
# By Gerd Hoffmann (2) and Christophe Fergeau (1)
# Via Gerd Hoffmann
* spice/spice.v73:
qxl: fix local renderer
qxl: trace io port name
spice-core: Use g_strdup_printf instead of snprintf
Message-id: 1378807572-27902-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Anthony Liguori [Wed, 11 Sep 2013 19:46:21 +0000 (14:46 -0500)]
Merge remote-tracking branch 'kraxel/usb.89' into staging
# By Gerd Hoffmann (2) and Miroslav Rezanina (2)
# Via Gerd Hoffmann
* kraxel/usb.89:
ehci: save device pointer in EHCIState
Remove dev-bluetooth.c dependency from vl.c
Preparation for usb-bt-dongle conditional build
usb: sanity check setup_index+setup_len in post_load
Message-id: 1378806073-25197-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Anthony Liguori [Wed, 11 Sep 2013 19:46:08 +0000 (14:46 -0500)]
Merge remote-tracking branch 'mdroth/qga-pull-2013-9-9' into staging
# By Tomoki Sekiyama (10) and Paul Burton (1)
# Via Michael Roth
* mdroth/qga-pull-2013-9-9:
QMP/qemu-ga-client: Make timeout longer for guest-fsfreeze-freeze command
qemu-ga: Install Windows VSS provider on `qemu-ga -s install'
qemu-ga: Call Windows VSS requester in fsfreeze command handler
qemu-ga: Add Windows VSS provider and requester as DLL
error: Add error_set_win32 and error_setg_win32
qemu-ga: Add configure options to specify path to Windows/VSS SDK
Add a script to extract VSS SDK headers on POSIX system
checkpatch.pl: Check .cpp files
Add c++ keywords to QAPI helper script
configure: Support configuring C++ compiler
mips_malta: support up to 2GiB RAM
Message-id: 1378755701-2051-1-git-send-email-mdroth@linux.vnet.ibm.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Anthony Liguori [Wed, 11 Sep 2013 19:45:37 +0000 (14:45 -0500)]
Merge remote-tracking branch 'stefanha/block' into staging
# By Paolo Bonzini (21) and others
# Via Stefan Hajnoczi
* stefanha/block: (42 commits)
qemu-iotests: Fixed test case 026
qemu-iotests: Whitespace cleanup
dataplane: Fix startup race.
block: look for zero blocks in bs->file
block: add default get_block_status implementation for protocols
raw-posix: report unwritten extents as zero
raw-posix: return get_block_status data and flags
docs, qapi: document qemu-img map
qemu-img: add a "map" subcommand
block: return BDRV_BLOCK_ZERO past end of backing file
block: use bdrv_has_zero_init to return BDRV_BLOCK_ZERO
block: return get_block_status data and flags for formats
block: define get_block_status return value
block: introduce bdrv_get_block_status API
block: make bdrv_has_zero_init return false for copy-on-write-images
qemu-img: always probe the input image for allocated sectors
block: expect errors from bdrv_co_is_allocated
block: remove bdrv_is_allocated_above/bdrv_co_is_allocated_above distinction
block: do not use ->total_sectors in bdrv_co_is_allocated
block: make bdrv_co_is_allocated static
...
Message-id: 1378481953-23099-1-git-send-email-stefanha@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Anthony Liguori [Wed, 11 Sep 2013 19:45:18 +0000 (14:45 -0500)]
Merge remote-tracking branch 'stefanha/net' into staging
# By Brad Smith (2) and others
# Via Stefan Hajnoczi
* stefanha/net:
ne2000: mark I/O as LITTLE_ENDIAN
vmxnet3: Eliminate __packed redefined warning
e1000: add interrupt mitigation support
net: Rename send_queue to incoming_queue
tap: Use numbered tap/tun devices on all *BSD OS's
Message-id: 1378481624-20964-1-git-send-email-stefanha@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Alexander Graf [Tue, 3 Sep 2013 19:12:22 +0000 (20:12 +0100)]
configure: Add handling code for AArch64 targets
Add the necessary code to configure to handle AArch64 as a target
CPU (we already have some code for supporting it as host). Note
that this doesn't enable the AArch64 targets yet.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-23-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-12-git-send-email-john.rigby@linaro.org
[PMM:
* don't need to set TARGET_ABI_DIR to aarch64 as that is the default
* don't build nwfpe -- this is 32 bit legacy only
* rewrite commit message
* add aarch64 to the list of "fdt required" targets
] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:21 +0000 (20:12 +0100)]
linux-user: Add AArch64 support
This patch adds support for AArch64 in all the small corners of
linux-user (primarily in image loading and startup code).
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-22-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org
[PMM:
* removed some unnecessary #defines from syscall.h
* catch attempts to use a 32 bit only cpu with aarch64-linux-user
* termios stuff moved into its own patch
* we specify our minimum uname version here now
] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 3 Sep 2013 19:12:20 +0000 (20:12 +0100)]
linux-user: Allow targets to specify a minimum uname release
For newer target architectures, glibc can be picky about the kernel
version: for example, it will not run on an aarch64 system unless
the kernel reports itself as at least 3.8.0. Accommodate this by
enhancing the existing support for faking the kernel version so
that each target can optionally specify a minimum version: if
the user doesn't force a specific fake version then we will override
with the minimum required version only if the real host kernel
version is insufficient.
Use this facility to let aarch64 report a minimum of 3.8.0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-21-git-send-email-peter.maydell@linaro.org
Alexander Graf [Tue, 3 Sep 2013 19:12:19 +0000 (20:12 +0100)]
linux-user: Add AArch64 termbits.h definitions
Add the AArch64 termbits.h with all the target's termios related
constants and structures.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-20-git-send-email-peter.maydell@linaro.org
[PMM: split out from another patch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:18 +0000 (20:12 +0100)]
linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-19-git-send-email-peter.maydell@linaro.org
[PMM: pulled out from another patch; don't use is_a64() here;
moved to linux-user from target-arm] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 3 Sep 2013 19:12:17 +0000 (20:12 +0100)]
linux-user: Make sure NWFPE code is 32 bit ARM only
On ARM, linux-user emulation includes NWFPE support for emulating the
ancient FPA floating point coprocessor. This has long since been
superseded by VFP and is only required for legacy binaries. The
AArch64 linux-user target doesn't compile in NWFPE support, so make
sure the relevant code is protected by suitable ifdefs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-18-git-send-email-peter.maydell@linaro.org
Andreas Schwab [Tue, 3 Sep 2013 19:12:16 +0000 (20:12 +0100)]
linux-user: Add signal handling for AArch64
This patch adds signal handling for AArch64. The code is based on the
respective source in the Linux kernel.
Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-17-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-10-git-send-email-john.rigby@linaro.org
[PMM: fixed style nits: tabs, long lines;
pulled target_signal.h in from a later patch; it fits better here] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:15 +0000 (20:12 +0100)]
linux-user: Fix up AArch64 syscall handlers
Some syscall handlers have special code for ARM enabled that we don't
need on AArch64. Exclude AArch64 in those cases. In other places we
can share struct definitions with other targets or have to provide our
own.
With this patch applied, most syscall definitions in linux-user should
be sound for AArch64.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-16-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-9-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:14 +0000 (20:12 +0100)]
linux-user: Add syscall number definitions for AArch64
The AArch64 syscall definitions are all publicly available in the Linux
kernel. Let's add them to our linux-user emulation target, so that we
can easily handle AArch64 syscalls.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-15-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-8-git-send-email-john.rigby@linaro.org
[PMM: changes relating to cpu_loop() removed as they are superseded
by an earlier patch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 3 Sep 2013 19:12:13 +0000 (20:12 +0100)]
linux-user: Add cpu loop for AArch64
Add the main linux-user cpu loop for AArch64. Since AArch64
has a different system call interface, doesn't need to worry
about FPA emulation and may in the future keep the prefetch/data
abort information in different system registers, it's simplest
just to use a completely separate loop from the 32 bit ARM
target, rather than peppering it with ifdefs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-14-git-send-email-peter.maydell@linaro.org
Alexander Graf [Tue, 3 Sep 2013 19:12:12 +0000 (20:12 +0100)]
linux-user: Don't treat AArch64 cpu names specially
32-bit ARM has a lot of different names for different types of CPUs it supports.
On AArch64, we don't have this, so we really don't want to execute the 32-bit
logic. Stub it out for AArch64 linux-user guests.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-13-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-7-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:11 +0000 (20:12 +0100)]
target-arm: Add AArch64 gdbstub support
We want to be able to debug AArch64 guests. So let's add the respective gdb
stub functions and xml descriptions that allow us to do so.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-12-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-6-git-send-email-john.rigby@linaro.org
[PMM: dropped unused fp regs XML for now; moved 64 bit only functions
to new gdbstub64.c; these are hooked up in AArch64CPU, not via
ifdefs in ARMCPU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:10 +0000 (20:12 +0100)]
target-arm: Add AArch64 translation stub
We should translate AArch64 mode separately from AArch32 mode. In AArch64 mode,
registers look vastly different, instruction encoding is completely different,
basically the system turns into a different machine.
So let's do a simple if() in translate.c to decide whether we can handle the
current code in the legacy AArch32 code or in the new AArch64 code.
So far, the translation always complains about unallocated instructions. There
is no emulator functionality in this patch!
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-11-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-5-git-send-email-john.rigby@linaro.org
[PMM:
* provide no-op versions of a64 functions ifndef TARGET_AARCH64;
this lets us avoid #ifdefs in translate.c
* insert the missing call to disas_a64_insn()
* stash the insn in the DisasContext rather than reloading it in
real_unallocated_encoding()
] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:09 +0000 (20:12 +0100)]
target-arm: Prepare translation for AArch64 code
This patch adds all the prerequisites for AArch64 support that didn't
fit into split up patches. It extends important bits in the core cpu
headers to also take AArch64 mode into account.
Add new ARM_TBFLAG_AARCH64_STATE translation buffer flag
indicate an ARMv8 cpu running in aarch64 mode vs aarch32 mode.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-10-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-4-git-send-email-john.rigby@linaro.org
[PMM:
* rearranged tbflags so AArch64? is bit 31 and if it is set then
30..0 are freely available for whatever makes most sense for that mode
* added version bump since we change VFP migration state
* added a comment about how VFP/Neon register state works
* physical address space is 48 bits, not 64
* added ARM_FEATURE_AARCH64 flag to identify 64-bit capable CPUs
] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 3 Sep 2013 19:12:08 +0000 (20:12 +0100)]
target-arm: Disable 32 bit CPUs in 64 bit linux-user builds
If we're building aarch64-linux-user then the 32 bit CPUs are
all unwanted, because they can't possibly execute the 64 bit
binaries we will be running; disable them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-9-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 3 Sep 2013 19:12:06 +0000 (20:12 +0100)]
target-arm: Pass DisasContext* to gen_set_pc_im()
We want gen_set_pc_im() to work for both AArch64 and AArch32, but
to do this we'll need the DisasContext* so we can tell which mode
we're in, so pass it in as a parameter.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-7-git-send-email-peter.maydell@linaro.org
Alexander Graf [Tue, 3 Sep 2013 19:12:05 +0000 (20:12 +0100)]
target-arm: Fix target_ulong/uint32_t confusions
Correct a few places that were using uint32_t or a 32 bit
only format string to handle something that should be a target_ulong.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-6-git-send-email-peter.maydell@linaro.org
[PMM: split out to separate patch; added gen_goto_tb() and
gen_set_pc_im() dest params to list of things to change.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:04 +0000 (20:12 +0100)]
target-arm: Export cpu_env
The cpu_env tcg variable will be used by both the AArch32 and AArch64
handling code. Unstaticify it, so that both sides can make use of it.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-5-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-3-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Tue, 3 Sep 2013 19:12:03 +0000 (20:12 +0100)]
target-arm: Extract the disas struct to a header file
We will need to share the disassembly status struct between AArch32 and
AArch64 modes. So put it into a header file that both sides can use.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-4-git-send-email-peter.maydell@linaro.org
Message-id: 1368505980-17151-2-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 3 Sep 2013 19:12:02 +0000 (20:12 +0100)]
target-arm: Abstract out load/store from a vaddr in AArch32
AArch32 code (ie traditional 32 bit world) expects to be
able to pass a vaddr in a TCGv_i32. However when QEMU is
compiled with TARGET_LONG_BITS=32 the TCG load/store
functions take a TCGv_i64. Abstract out load/store with
a 32 bit vaddr so we have a place to put the zero extension
of the vaddr and the extension/truncation of the data value.
Apart from the function definitions most of this patch is
a simple s/tcg_gen_qemu_/gen_aa32_/.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 10 Sep 2013 18:09:33 +0000 (19:09 +0100)]
abitypes.h: Remove incorrect ARM ABI_LLONG_ALIGNMENT
The ARM EABI specifies that 64 bit integers should be
8 aligned; remove our incorrect setting of 4 alignment.
This has no actual effect since it only set the alignment
for the 'abi_ullong' and 'abi_llong' types, which are used
only inside code which is MIPS-specific, but it will
avoid problems later if we use the types elsewhere.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 10 Sep 2013 18:09:33 +0000 (19:09 +0100)]
pl110: Clarify comment about PL110 ID on VersatilePB
Clarify a comment about the ID register value presented by
the PL110 variant present on the VersatilePB board (based
on testing what the actual hardware does), to indicate that
this is not an error in our emulation, and to remove an #if-0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sebastian Ottlik [Tue, 10 Sep 2013 18:09:32 +0000 (19:09 +0100)]
target-arm: fix ARMv7M stack alignment on reset
When the initial SP is loaded from the vector table on ARMv7M systems the two
least significant bits are ignored as the stack is always aligned at a four byte
boundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore
these bits leading to a stack alignment inconsitent with real hardware for
binaries that rely on this behaviour. This patch fixes this issue by masking the
two least significant bits when loading the SP.
Signed-off-by: Sebastian Ottlik <ottlik@fzi.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378286595-27072-1-git-send-email-ottlik@fzi.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 10 Sep 2013 18:09:32 +0000 (19:09 +0100)]
target-arm: Avoid "1 << 31" undefined behaviour
Avoid the undefined behaviour of "1 << 31" by using 1U to make
the shift be of an unsigned value rather than shifting into the
sign bit of a signed integer. For consistency, we make all the
CPSR_* constants unsigned, though the only one which triggers
undefined behaviour is CPSR_N.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1378391908-22137-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 10 Sep 2013 18:09:32 +0000 (19:09 +0100)]
target-arm: Use sextract32() in branch decode
In the decode of ARM B and BL insns, swap the order of the
"append 2 implicit zeros to imm24" and the sign extend, and
use the new sextract32() utility function to do the latter.
This avoids a direct dependency on the undefined C behaviour
of shifting into the sign bit of an integer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1378391908-22137-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 10 Sep 2013 18:09:32 +0000 (19:09 +0100)]
target-arm: Make '-cpu any' available in linux-user mode only
Make the 'any' CPU for target-arm available only in linux-user mode.
The ARM target provides a CPU named "any", which turns on support for
all user-level instruction set extensions we know about. This is
intended for linux-user emulation mode, where it is the default CPU type.
It makes no sense to try to use this for system emulation, since we don't
initialize it with any system-level information like feature register
values or implementation specific cp15 registers. (Unsurprisingly, some
boards won't boot at all, though you might get lucky in some cases where
the guest doesn't happen to prod things that aren't there.)
Prevent users from making this command line error by removing the
CPU definition from the softmmu build.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
Message-id: 1378213995-12945-1-git-send-email-peter.maydell@linaro.org
Cole Robinson [Sat, 31 Aug 2013 22:36:17 +0000 (18:36 -0400)]
qapi-types.py: Fix enum struct sizes on i686
Unlike other list types, enum wasn't adding any padding, which caused
a mismatch between the generated struct size and GenericList struct
size. More details in a678e26cbe89f7a27cbce794c2c2784571ee9d21
This crashed qemu if calling qmp query-tpm-types for example, which
upsets libvirt capabilities probing. Reproducer on i686:
To allow disable usb-bt-dongle device using CONFIG_BLUETOOTH option, some of
functions in vl.c file has to be made accessible in dev-bluetooth.c. This is
pure code moving.
Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
The local spice renderer assumes the primary surface is located at the
start of the "ram" bar. This used to be a requirement in qxl hardware
revision 1. In revision 2+ this is relaxed. Nevertheless guest drivers
continued to use the traditional location, for historical and backward
compatibility reasons. The qxl kms driver doesn't though as it depends
on qxl revision 4+ anyway.
Result is that local rendering is hosed for recent linux guests, you'll
get pixel garbage with non-spice ui (gtk, sdl, vnc) and when doing
screendumps. Fix that by doing a proper mapping of the guest-specified
memory location.
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:39 +0000 (11:40 -0400)]
QMP/qemu-ga-client: Make timeout longer for guest-fsfreeze-freeze command
guest-fsfreeze-freeze command can take longer than 3 seconds when heavy
disk I/O is running. To avoid unexpected timeout, this changes the timeout
to 60 seconds (timeout of pre-commit phase of VSS).
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:32 +0000 (11:40 -0400)]
qemu-ga: Install Windows VSS provider on `qemu-ga -s install'
Register QGA VSS provider library into Windows when qemu-ga is installed as
Windows service ('-s install' option). It is deregistered when the service
is uninstalled ('-s uninstall' option).
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:25 +0000 (11:40 -0400)]
qemu-ga: Call Windows VSS requester in fsfreeze command handler
Support guest-fsfreeze-freeze and guest-fsfreeze-thaw commands for Windows
guests. When fsfreeze command is issued, it calls the VSS requester to
freeze filesystems and applications. On thaw command, it again tells the VSS
requester to thaw them.
This also adds calling of initialize functions for the VSS requester.
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:18 +0000 (11:40 -0400)]
qemu-ga: Add Windows VSS provider and requester as DLL
Adds VSS provider and requester as a qga-vss.dll, which is loaded by
Windows VSS service as well as by qemu-ga.
"provider.cpp" implements a basic stub of a software VSS provider.
Currently, this module only relays a frozen event from VSS service to the
agent, and thaw event from the agent to VSS service, to block VSS process
to keep the system frozen while snapshots are taken at the host.
To register the provider to the guest system as COM+ application, the type
library (.tlb) for qga-vss.dll is required. To build it from COM IDL (.idl),
VisualC++, MIDL and stdole2.tlb in Windows SDK are required. This patch also
adds pre-compiled .tlb file in the repository in order to enable
cross-compile qemu-ga.exe for Windows with VSS support.
"requester.cpp" provides the VSS requester to kick the VSS snapshot process.
Qemu-ga.exe works without the DLL, although fsfreeze features are disabled.
These functions are only supported in Windows 2003 or later. In older
systems, fsfreeze features are disabled.
In several versions of Windows which don't support attribute
VSS_VOLSNAP_ATTR_NO_AUTORECOVERY, DoSnapshotSet fails with error
VSS_E_OBJECT_NOT_FOUND. In this patch, we just ignore this error.
To solve this fundamentally, we need a framework to handle mount writable
snapshot on guests, which is required by VSS auto-recovery feature
(cleanup phase after a snapshot is taken).
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:11 +0000 (11:40 -0400)]
error: Add error_set_win32 and error_setg_win32
These functions help maintaining homogeneous formatting of error messages
with Windows error code and description (generated by
g_win32_error_message()).
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:40:03 +0000 (11:40 -0400)]
qemu-ga: Add configure options to specify path to Windows/VSS SDK
To enable VSS support in qemu-ga for Windows, header files included in
VSS SDK are required.
The VSS support is enabled by the configure option like below:
./configure --with-vss-sdk="/path/to/VSS SDK"
If the path is omitted, it tries to search the headers from default paths
and VSS support is enabled only if the SDK is found.
VSS support is disabled if --without-vss-sdk or --with-vss-sdk=no is
specified.
VSS SDK is available from:
http://www.microsoft.com/en-us/download/details.aspx?id=23490
To cross-compile using mingw, you need to setup the SDK on Windows
environments to extract headers. You can also extract the SDK headers on
POSIX environments using scripts/extract-vss-headers and msitools.
In addition, --with-win-sdk="/path/to/Windows SDK" option is also added to
specify path to Windows SDK, which may be used for native-compile of .tlb
file of qemu-ga VSS provider. However, this is usually unnecessary because
pre-compiled .tlb file is included.
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:39:50 +0000 (11:39 -0400)]
checkpatch.pl: Check .cpp files
Enable checkpatch.pl to apply the same checks as C source files for
C++ files with .cpp extensions. It also adds some exceptions for C++
sources to suppress errors for:
- <> used in C++ template arguments (e.g. template <class T>)
- :: used to represent namespaces (e.g. SomeClass::method())
- : used in class declaration (e.g. class T : public Super)
- ~ used in destructor method name (e.g. T::~T())
- spacing around 'catch' (e.g. catch (...))
Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tomoki Sekiyama [Wed, 7 Aug 2013 15:39:36 +0000 (11:39 -0400)]
configure: Support configuring C++ compiler
Add configuration for C++ compiler in configure and Makefiles.
The C++ compiler is choosed as following:
- ${CXX}, if it is specified.
- ${cross_prefix}g++, if ${cross_prefix} is specified.
- Otherwise, c++ is used.
Currently, usage of C++ language is only for access to Windows VSS
using COM+ services in qemu-guest-agent for Windows.
Paul Burton [Fri, 6 Sep 2013 12:57:44 +0000 (13:57 +0100)]
mips_malta: support up to 2GiB RAM
A Malta board can support up to 2GiB of RAM. Since the unmapped kseg0/1
regions are only 512MiB large & the latter 256MiB of those are taken up
by the IO region, access to RAM beyond 256MiB must be done through a
mapped region. In the case of a Linux guest this means we need to use
highmem.
The mainline Linux kernel does not support highmem for Malta at this
time, however this can be tested using the linux-mti-3.8 kernel branch
available from:
git://git.linux-mips.org/pub/scm/linux-mti.git
You should be able to boot a Linux kernel built from the linux-mti-3.8
branch, with CONFIG_HIGHMEM enabled, using 2GiB RAM by passing "-m 2G"
to QEMU and appending the following kernel parameters:
Note that the upper half of the physical address space of a Malta
mirrors the lower half (hence the 2GiB limit) except that the IO region
(0x10000000-0x1fffffff in the lower half) is not mirrored in the upper
half. That is, physical addresses 0x90000000-0x9fffffff access RAM
rather than the IO region, resulting in a physical address space
resembling the following:
The second mem parameter provided to the kernel above accesses the
second 256MiB of RAM through the upper half of the physical address
space, making use of the aliasing described above in order to avoid
the IO region and use the whole 2GiB RAM.
The memory setup may be seen as 'backwards' in this commit since the
'real' memory is mapped in the upper half of the physical address space
and the lower half contains the aliases. On real hardware it would be
typical to see the upper half of the physical address space as the alias
since the bus addresses generated match the lower half of the physical
address space. However since the memory accessible in the upper half of
the physical address space is uninterrupted by the IO region it is
easiest to map the RAM as a whole there, and functionally it makes no
difference to the target code.
Due to the requirements of accessing the second 256MiB of RAM through
a mapping to the upper half of the physical address space it is usual
for the bootloader to indicate a maximum of 256MiB memory to a kernel.
This allows kernels which do not support such access to boot on systems
with more than 256MiB of RAM. It is also the behaviour assumed by Linux.
QEMUs small generated bootloader is modified to provide this behaviour.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Anthony PERARD [Mon, 9 Sep 2013 16:15:53 +0000 (16:15 +0000)]
pc_q35: Initialize Xen.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
Anthony PERARD [Mon, 9 Sep 2013 16:15:52 +0000 (16:15 +0000)]
pc: Initializing ram_memory under Xen.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> CC: qemu-stable@nongnu.org
Now that the memory subsystem is propagating the endianness correctly,
the ne2000 device should have its I/O ports marked as LITTLE_ENDIAN, as
PCI devices are little endian.
This makes the ne2000 NIC to work again on PowerPC.
Cc: qemu-stable@nongnu.org Cc: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Brad Smith [Fri, 23 Aug 2013 16:28:25 +0000 (12:28 -0400)]
vmxnet3: Eliminate __packed redefined warning
This eliminates a warning about __packed being redefined as exposed by the
vmxnet3 code. __packed is not used anywhere in the vmxnet3 code.
CC hw/net/vmxnet3.o
In file included from hw/net/vmxnet3.c:29:
hw/net/vmxnet3.h:37:1: warning: "__packed" redefined
In file included from /usr/include/stdlib.h:38,
from /buildbot-qemu/default_openbsd_current/build/include/qemu-common.h:26,
from /buildbot-qemu/default_openbsd_current/build/include/hw/hw.h:5,
from hw/net/vmxnet3.c:18:
/usr/include/sys/cdefs.h:209:1: warning: this is the location of the previous definition
Signed-off-by: Brad Smith <brad@comstyle.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines) Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Jan Kiszka [Fri, 2 Aug 2013 19:47:08 +0000 (21:47 +0200)]
net: Rename send_queue to incoming_queue
Each networking client has a queue for packets that could not yet be
delivered to that client. Calling this queue "send_queue" is highly
confusing as it has nothing to to with packets send from this client but
to it. Avoid this confusing by renaming it to "incoming_queue".
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Brad Smith [Sun, 4 Aug 2013 02:20:41 +0000 (22:20 -0400)]
tap: Use numbered tap/tun devices on all *BSD OS's
The following patch simplifies the *BSD tap/tun code and makes use of numbered
tap/tun interfaces on all *BSD OS's. NetBSD has a patch in their pkgsrc tree
to make use of this feature and DragonFly also supports this as well.
Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Kevin Wolf [Wed, 4 Sep 2013 11:16:05 +0000 (13:16 +0200)]
qemu-iotests: Fixed test case 026
The reference output for test case 026 hasn't been updated in a long
time and it's one of the "known failing" cases. This patch updates the
reference output so that unintentional changes can be reliably detected
again.
The problem with this test case is that it produces different output
depending on whether -nocache is used or not. The solution of this patch
is to actually have two different reference outputs. If nnn.out.nocache
exists, it is used as the reference output for -nocache; otherwise,
nnn.out stays valid for both cases.
Signed-off-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:29 +0000 (19:00 +0200)]
block: define get_block_status return value
Define the return value of get_block_status. Bits 0, 1, 2 and 9-62
are valid; bit 63 (the sign bit) is reserved for errors. Bits 3-8
are left for future extensions.
The return code is compatible with the old is_allocated API: if a driver
only returns 0 or 1 (aka BDRV_BLOCK_DATA) like is_allocated used to,
clients of is_allocated will not have any change in behavior. Still,
we will return more precise information in the next patches and the
new definition of bdrv_is_allocated is already prepared for this.
Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:28 +0000 (19:00 +0200)]
block: introduce bdrv_get_block_status API
For now, bdrv_get_block_status is just another name for bdrv_is_allocated.
The next patches will add more flags.
This also touches all block drivers with a mostly mechanical rename. The
sole exception is cow; because it calls cow_co_is_allocated from the read
code, we keep that function and make cow_co_get_block_status a wrapper.
Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:26 +0000 (19:00 +0200)]
qemu-img: always probe the input image for allocated sectors
qemu-img convert can assume "that sectors which are unallocated in the
input image are present in both the output's and input's base images".
However it is only doing this if the output image returns true for
bdrv_has_zero_init(). Testing bdrv_has_zero_init() does not make much
sense if the output image is copy-on-write, because a copy-on-write
image is never initialized to zero (it is initialized to the content
of the backing file).
There is nothing here that makes has_zero_init images special. The
input and output must be equal for the operation to make sense, and
that's it.
Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:25 +0000 (19:00 +0200)]
block: expect errors from bdrv_co_is_allocated
Some bdrv_is_allocated callers do not expect errors, but the fallback
in qcow2.c might make other callers trip on assertion failures or
infinite loops.
Fix the callers to always look for errors.
Cc: qemu-stable@nongnu.org Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:21 +0000 (19:00 +0200)]
block: keep bs->total_sectors up to date even for growable block devices
If a BlockDriverState is growable, after every write we need to
check if bs->total_sectors might have changed. With this change,
bdrv_getlength does not need anymore a system call.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Wed, 4 Sep 2013 17:00:20 +0000 (19:00 +0200)]
cow: do not call bdrv_co_is_allocated
As we change bdrv_is_allocated to gather more information from bs and
bs->file, it will become a bit slower. It is still appropriate for online
jobs, but not for reads/writes. Call the internal function instead.
Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Max Reitz [Tue, 3 Sep 2013 13:49:39 +0000 (15:49 +0200)]
qmp: Documentation for BLOCK_IMAGE_CORRUPTED
Add an appropriate entry describing this event and its parameters into
qmp-events.txt.
Signed-off-by: Max Reitz <mreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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