projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 1bfda055 | 1 | /** @file\r |
| 2 | *\r | |
| 793ca69f | 3 | * Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r |
| 1bfda055 | 4 | *\r |
| 793ca69f OM |
5 | * This program and the accompanying materials\r |
| 6 | * are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | * which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | * http://opensource.org/licenses/bsd-license.php\r | |
| 9 | *\r | |
| 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 1bfda055 | 12 | *\r |
| 13 | **/\r | |
| 14 | \r | |
| 92534106 | 15 | #include <Base.h>\r |
| 16 | #include <Library/DebugLib.h>\r | |
| 1bfda055 | 17 | #include <Library/IoLib.h>\r |
| 55a0d64b | 18 | #include <Library/ArmGicLib.h>\r |
| 1bfda055 | 19 | \r |
| 793ca69f | 20 | #include "GicV2/ArmGicV2Lib.h"\r |
| 1bfda055 | 21 | \r |
| 92534106 | 22 | /*\r |
| 23 | * This function configures the interrupts set by the mask to be secure.\r | |
| 24 | *\r | |
| 25 | */\r | |
| 26 | VOID\r | |
| 27 | EFIAPI\r | |
| 28 | ArmGicSetSecureInterrupts (\r | |
| 29 | IN UINTN GicDistributorBase,\r | |
| 30 | IN UINTN* GicSecureInterruptMask,\r | |
| 31 | IN UINTN GicSecureInterruptMaskSize\r | |
| 32 | )\r | |
| 33 | {\r | |
| 34 | UINTN Index;\r | |
| 35 | UINT32 InterruptStatus;\r | |
| 36 | \r | |
| 37 | // We must not have more interrupts defined by the mask than the number of available interrupts\r | |
| e9f7c58f | 38 | ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));\r |
| 92534106 | 39 | \r |
| 40 | // Set all the interrupts defined by the mask as Secure\r | |
| 41 | for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {\r | |
| 42 | InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));\r | |
| 43 | MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));\r | |
| 44 | }\r | |
| 45 | }\r | |
| 46 | \r | |
| 1bfda055 | 47 | VOID\r |
| 48 | EFIAPI\r | |
| 793ca69f OM |
49 | ArmGicEnableDistributor (\r |
| 50 | IN INTN GicDistributorBase\r | |
| 1bfda055 | 51 | )\r |
| 52 | {\r | |
| 793ca69f OM |
53 | // Turn on the GIC distributor\r |
| 54 | MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);\r | |
| 1bfda055 | 55 | }\r |
| 56 | \r | |
| 9736c297 | 57 | VOID\r |
| 58 | EFIAPI\r | |
| 793ca69f OM |
59 | ArmGicSetupNonSecure (\r |
| 60 | IN UINTN MpId,\r | |
| 61 | IN INTN GicDistributorBase,\r | |
| 9736c297 | 62 | IN INTN GicInterruptInterfaceBase\r |
| 63 | )\r | |
| 64 | {\r | |
| 793ca69f | 65 | ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);\r |
| 1bfda055 | 66 | }\r |