]>
Commit | Line | Data |
---|---|---|
1e57a462 | 1 | /** @file\r |
2 | Timer Architecture Protocol driver of the ARM flavor\r | |
3 | \r | |
e703b085 OM |
4 | Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>\r |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
1e57a462 | 10 | \r |
e703b085 OM |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
1e57a462 | 13 | \r |
14 | **/\r | |
15 | \r | |
16 | \r | |
17 | #include <PiDxe.h>\r | |
18 | \r | |
19 | #include <Library/ArmLib.h>\r | |
20 | #include <Library/BaseLib.h>\r | |
21 | #include <Library/DebugLib.h>\r | |
22 | #include <Library/BaseMemoryLib.h>\r | |
23 | #include <Library/UefiBootServicesTableLib.h>\r | |
24 | #include <Library/UefiLib.h>\r | |
25 | #include <Library/PcdLib.h>\r | |
26 | #include <Library/IoLib.h>\r | |
4f6d34b4 | 27 | #include <Library/ArmGenericTimerCounterLib.h>\r |
1e57a462 | 28 | \r |
29 | #include <Protocol/Timer.h>\r | |
30 | #include <Protocol/HardwareInterrupt.h>\r | |
31 | \r | |
32 | // The notification function to call on every timer interrupt.\r | |
33 | EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;\r | |
34 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r | |
35 | \r | |
36 | // The current period of the timer interrupt\r | |
37 | UINT64 mTimerPeriod = 0;\r | |
c6c4df80 OM |
38 | // The latest Timer Tick calculated for mTimerPeriod\r |
39 | UINT64 mTimerTicks = 0;\r | |
40 | // Number of elapsed period since the last Timer interrupt\r | |
41 | UINT64 mElapsedPeriod = 1;\r | |
1e57a462 | 42 | \r |
43 | // Cached copy of the Hardware Interrupt protocol instance\r | |
44 | EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;\r | |
45 | \r | |
46 | /**\r | |
3402aac7 RC |
47 | This function registers the handler NotifyFunction so it is called every time\r |
48 | the timer interrupt fires. It also passes the amount of time since the last\r | |
49 | handler call to the NotifyFunction. If NotifyFunction is NULL, then the\r | |
50 | handler is unregistered. If the handler is registered, then EFI_SUCCESS is\r | |
51 | returned. If the CPU does not support registering a timer interrupt handler,\r | |
52 | then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler\r | |
53 | when a handler is already registered, then EFI_ALREADY_STARTED is returned.\r | |
54 | If an attempt is made to unregister a handler when a handler is not registered,\r | |
55 | then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to\r | |
56 | register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR\r | |
1e57a462 | 57 | is returned.\r |
58 | \r | |
59 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
60 | @param NotifyFunction The function to call when a timer interrupt fires. This\r | |
61 | function executes at TPL_HIGH_LEVEL. The DXE Core will\r | |
62 | register a handler for the timer interrupt, so it can know\r | |
63 | how much time has passed. This information is used to\r | |
64 | signal timer based events. NULL will unregister the handler.\r | |
65 | @retval EFI_SUCCESS The timer handler was registered.\r | |
66 | @retval EFI_UNSUPPORTED The platform does not support timer interrupts.\r | |
67 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already\r | |
68 | registered.\r | |
69 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not\r | |
70 | previously registered.\r | |
71 | @retval EFI_DEVICE_ERROR The timer handler could not be registered.\r | |
72 | \r | |
73 | **/\r | |
74 | EFI_STATUS\r | |
75 | EFIAPI\r | |
76 | TimerDriverRegisterHandler (\r | |
77 | IN EFI_TIMER_ARCH_PROTOCOL *This,\r | |
78 | IN EFI_TIMER_NOTIFY NotifyFunction\r | |
79 | )\r | |
80 | {\r | |
81 | if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {\r | |
82 | return EFI_INVALID_PARAMETER;\r | |
83 | }\r | |
84 | \r | |
85 | if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {\r | |
86 | return EFI_ALREADY_STARTED;\r | |
87 | }\r | |
88 | \r | |
89 | mTimerNotifyFunction = NotifyFunction;\r | |
90 | \r | |
91 | return EFI_SUCCESS;\r | |
92 | }\r | |
93 | \r | |
94 | /**\r | |
95 | Disable the timer\r | |
96 | **/\r | |
97 | VOID\r | |
98 | EFIAPI\r | |
99 | ExitBootServicesEvent (\r | |
100 | IN EFI_EVENT Event,\r | |
101 | IN VOID *Context\r | |
102 | )\r | |
103 | {\r | |
4f6d34b4 | 104 | ArmGenericTimerDisableTimer ();\r |
1e57a462 | 105 | }\r |
106 | \r | |
107 | /**\r | |
108 | \r | |
3402aac7 RC |
109 | This function adjusts the period of timer interrupts to the value specified\r |
110 | by TimerPeriod. If the timer period is updated, then the selected timer\r | |
111 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If\r | |
112 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.\r | |
113 | If an error occurs while attempting to update the timer period, then the\r | |
114 | timer hardware will be put back in its state prior to this call, and\r | |
115 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt\r | |
116 | is disabled. This is not the same as disabling the CPU's interrupts.\r | |
117 | Instead, it must either turn off the timer hardware, or it must adjust the\r | |
118 | interrupt controller so that a CPU interrupt is not generated when the timer\r | |
119 | interrupt fires.\r | |
1e57a462 | 120 | \r |
121 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
122 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If\r | |
123 | the timer hardware is not programmable, then EFI_UNSUPPORTED is\r | |
124 | returned. If the timer is programmable, then the timer period\r | |
125 | will be rounded up to the nearest timer period that is supported\r | |
126 | by the timer hardware. If TimerPeriod is set to 0, then the\r | |
127 | timer interrupts will be disabled.\r | |
128 | \r | |
129 | \r | |
130 | @retval EFI_SUCCESS The timer period was changed.\r | |
131 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.\r | |
132 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.\r | |
133 | \r | |
134 | **/\r | |
135 | EFI_STATUS\r | |
136 | EFIAPI\r | |
137 | TimerDriverSetTimerPeriod (\r | |
138 | IN EFI_TIMER_ARCH_PROTOCOL *This,\r | |
139 | IN UINT64 TimerPeriod\r | |
140 | )\r | |
141 | {\r | |
c6c4df80 | 142 | UINT64 CounterValue;\r |
1e57a462 | 143 | UINT64 TimerTicks;\r |
c6c4df80 | 144 | EFI_TPL OriginalTPL;\r |
3402aac7 | 145 | \r |
1e57a462 | 146 | // Always disable the timer\r |
4f6d34b4 | 147 | ArmGenericTimerDisableTimer ();\r |
1e57a462 | 148 | \r |
149 | if (TimerPeriod != 0) {\r | |
c6c4df80 OM |
150 | // mTimerTicks = TimerPeriod in 1ms unit x Frequency.10^-3\r |
151 | // = TimerPeriod.10^-4 x Frequency.10^-3\r | |
152 | // = (TimerPeriod x Frequency) x 10^-7\r | |
7a1e861e | 153 | TimerTicks = MultU64x32 (TimerPeriod, ArmGenericTimerGetTimerFreq ());\r |
33292af5 | 154 | TimerTicks = DivU64x32 (TimerTicks, 10000000U);\r |
1e57a462 | 155 | \r |
c6c4df80 OM |
156 | // Raise TPL to update the mTimerTicks and mTimerPeriod to ensure these values\r |
157 | // are coherent in the interrupt handler\r | |
158 | OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r | |
159 | \r | |
160 | mTimerTicks = TimerTicks;\r | |
161 | mTimerPeriod = TimerPeriod;\r | |
162 | mElapsedPeriod = 1;\r | |
163 | \r | |
164 | gBS->RestoreTPL (OriginalTPL);\r | |
165 | \r | |
4f6d34b4 AB |
166 | // Get value of the current timer\r |
167 | CounterValue = ArmGenericTimerGetSystemCount ();\r | |
c6c4df80 | 168 | // Set the interrupt in Current Time + mTimerTick\r |
4f6d34b4 | 169 | ArmGenericTimerSetCompareVal (CounterValue + mTimerTicks);\r |
1e57a462 | 170 | \r |
171 | // Enable the timer\r | |
4f6d34b4 | 172 | ArmGenericTimerEnableTimer ();\r |
c6c4df80 OM |
173 | } else {\r |
174 | // Save the new timer period\r | |
175 | mTimerPeriod = TimerPeriod;\r | |
176 | // Reset the elapsed period\r | |
177 | mElapsedPeriod = 1;\r | |
1e57a462 | 178 | }\r |
179 | \r | |
1e57a462 | 180 | return EFI_SUCCESS;\r |
181 | }\r | |
182 | \r | |
183 | /**\r | |
3402aac7 RC |
184 | This function retrieves the period of timer interrupts in 100 ns units,\r |
185 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod\r | |
186 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is\r | |
1e57a462 | 187 | returned, then the timer is currently disabled.\r |
188 | \r | |
189 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
190 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If\r | |
191 | 0 is returned, then the timer is currently disabled.\r | |
192 | \r | |
193 | \r | |
194 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod.\r | |
195 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.\r | |
196 | \r | |
197 | **/\r | |
198 | EFI_STATUS\r | |
199 | EFIAPI\r | |
200 | TimerDriverGetTimerPeriod (\r | |
201 | IN EFI_TIMER_ARCH_PROTOCOL *This,\r | |
202 | OUT UINT64 *TimerPeriod\r | |
203 | )\r | |
204 | {\r | |
205 | if (TimerPeriod == NULL) {\r | |
206 | return EFI_INVALID_PARAMETER;\r | |
207 | }\r | |
208 | \r | |
209 | *TimerPeriod = mTimerPeriod;\r | |
210 | return EFI_SUCCESS;\r | |
211 | }\r | |
212 | \r | |
213 | /**\r | |
3402aac7 RC |
214 | This function generates a soft timer interrupt. If the platform does not support soft\r |
215 | timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.\r | |
216 | If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()\r | |
217 | service, then a soft timer interrupt will be generated. If the timer interrupt is\r | |
218 | enabled when this service is called, then the registered handler will be invoked. The\r | |
219 | registered handler should not be able to distinguish a hardware-generated timer\r | |
1e57a462 | 220 | interrupt from a software-generated timer interrupt.\r |
221 | \r | |
222 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
223 | \r | |
224 | @retval EFI_SUCCESS The soft timer interrupt was generated.\r | |
225 | @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.\r | |
226 | \r | |
227 | **/\r | |
228 | EFI_STATUS\r | |
229 | EFIAPI\r | |
230 | TimerDriverGenerateSoftInterrupt (\r | |
231 | IN EFI_TIMER_ARCH_PROTOCOL *This\r | |
232 | )\r | |
233 | {\r | |
234 | return EFI_UNSUPPORTED;\r | |
235 | }\r | |
236 | \r | |
237 | /**\r | |
238 | Interface structure for the Timer Architectural Protocol.\r | |
239 | \r | |
240 | @par Protocol Description:\r | |
241 | This protocol provides the services to initialize a periodic timer\r | |
242 | interrupt, and to register a handler that is called each time the timer\r | |
243 | interrupt fires. It may also provide a service to adjust the rate of the\r | |
244 | periodic timer interrupt. When a timer interrupt occurs, the handler is\r | |
245 | passed the amount of time that has passed since the previous timer\r | |
246 | interrupt.\r | |
247 | \r | |
248 | @param RegisterHandler\r | |
249 | Registers a handler that will be called each time the\r | |
250 | timer interrupt fires. TimerPeriod defines the minimum\r | |
251 | time between timer interrupts, so TimerPeriod will also\r | |
252 | be the minimum time between calls to the registered\r | |
253 | handler.\r | |
254 | \r | |
255 | @param SetTimerPeriod\r | |
256 | Sets the period of the timer interrupt in 100 nS units.\r | |
257 | This function is optional, and may return EFI_UNSUPPORTED.\r | |
258 | If this function is supported, then the timer period will\r | |
259 | be rounded up to the nearest supported timer period.\r | |
260 | \r | |
261 | \r | |
262 | @param GetTimerPeriod\r | |
263 | Retrieves the period of the timer interrupt in 100 nS units.\r | |
264 | \r | |
265 | @param GenerateSoftInterrupt\r | |
266 | Generates a soft timer interrupt that simulates the firing of\r | |
267 | the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for\r | |
268 | a period of time.\r | |
269 | \r | |
270 | **/\r | |
271 | EFI_TIMER_ARCH_PROTOCOL gTimer = {\r | |
272 | TimerDriverRegisterHandler,\r | |
273 | TimerDriverSetTimerPeriod,\r | |
274 | TimerDriverGetTimerPeriod,\r | |
275 | TimerDriverGenerateSoftInterrupt\r | |
276 | };\r | |
277 | \r | |
278 | /**\r | |
279 | \r | |
280 | C Interrupt Handler called in the interrupt context when Source interrupt is active.\r | |
281 | \r | |
282 | \r | |
283 | @param Source Source of the interrupt. Hardware routing off a specific platform defines\r | |
284 | what source means.\r | |
285 | \r | |
286 | @param SystemContext Pointer to system register context. Mostly used by debuggers and will\r | |
287 | update the system context after the return from the interrupt if\r | |
288 | modified. Don't change these values unless you know what you are doing\r | |
289 | \r | |
290 | **/\r | |
291 | VOID\r | |
292 | EFIAPI\r | |
293 | TimerInterruptHandler (\r | |
294 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
295 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
296 | )\r | |
297 | {\r | |
298 | EFI_TPL OriginalTPL;\r | |
c6c4df80 OM |
299 | UINT64 CurrentValue;\r |
300 | UINT64 CompareValue;\r | |
1e57a462 | 301 | \r |
302 | //\r | |
303 | // DXE core uses this callback for the EFI timer tick. The DXE core uses locks\r | |
304 | // that raise to TPL_HIGH and then restore back to current level. Thus we need\r | |
305 | // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.\r | |
306 | //\r | |
307 | OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r | |
308 | \r | |
5e3719ae MZ |
309 | // Signal end of interrupt early to help avoid losing subsequent ticks\r |
310 | // from long duration handlers\r | |
311 | gInterrupt->EndOfInterrupt (gInterrupt, Source);\r | |
312 | \r | |
1e57a462 | 313 | // Check if the timer interrupt is active\r |
4f6d34b4 | 314 | if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {\r |
1e57a462 | 315 | \r |
1e57a462 | 316 | if (mTimerNotifyFunction) {\r |
c6c4df80 | 317 | mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);\r |
1e57a462 | 318 | }\r |
319 | \r | |
c6c4df80 | 320 | //\r |
1e57a462 | 321 | // Reload the Timer\r |
c6c4df80 OM |
322 | //\r |
323 | \r | |
324 | // Get current counter value\r | |
4f6d34b4 | 325 | CurrentValue = ArmGenericTimerGetSystemCount ();\r |
c6c4df80 | 326 | // Get the counter value to compare with\r |
4f6d34b4 | 327 | CompareValue = ArmGenericTimerGetCompareVal ();\r |
c6c4df80 OM |
328 | \r |
329 | // This loop is needed in case we missed interrupts (eg: case when the interrupt handling\r | |
330 | // has taken longer than mTickPeriod).\r | |
331 | // Note: Physical Counter is counting up\r | |
332 | mElapsedPeriod = 0;\r | |
333 | do {\r | |
334 | CompareValue += mTimerTicks;\r | |
335 | mElapsedPeriod++;\r | |
336 | } while (CompareValue < CurrentValue);\r | |
337 | \r | |
338 | // Set next compare value\r | |
4f6d34b4 | 339 | ArmGenericTimerSetCompareVal (CompareValue);\r |
5853e2e4 | 340 | ArmGenericTimerReenableTimer ();\r |
ac9b530e | 341 | ArmInstructionSynchronizationBarrier ();\r |
1e57a462 | 342 | }\r |
343 | \r | |
1e57a462 | 344 | gBS->RestoreTPL (OriginalTPL);\r |
345 | }\r | |
346 | \r | |
347 | \r | |
348 | /**\r | |
349 | Initialize the state information for the Timer Architectural Protocol and\r | |
350 | the Timer Debug support protocol that allows the debugger to break into a\r | |
351 | running program.\r | |
352 | \r | |
353 | @param ImageHandle of the loaded driver\r | |
354 | @param SystemTable Pointer to the System Table\r | |
355 | \r | |
356 | @retval EFI_SUCCESS Protocol registered\r | |
357 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r | |
358 | @retval EFI_DEVICE_ERROR Hardware problems\r | |
359 | \r | |
360 | **/\r | |
361 | EFI_STATUS\r | |
362 | EFIAPI\r | |
363 | TimerInitialize (\r | |
364 | IN EFI_HANDLE ImageHandle,\r | |
365 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
366 | )\r | |
367 | {\r | |
368 | EFI_HANDLE Handle = NULL;\r | |
369 | EFI_STATUS Status;\r | |
967efdcd AB |
370 | UINTN TimerCtrlReg;\r |
371 | UINT32 TimerHypIntrNum;\r | |
1e57a462 | 372 | \r |
373 | if (ArmIsArchTimerImplemented () == 0) {\r | |
374 | DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence cann't use this Driver \n"));\r | |
375 | ASSERT (0);\r | |
376 | }\r | |
377 | \r | |
378 | // Find the interrupt controller protocol. ASSERT if not found.\r | |
379 | Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);\r | |
380 | ASSERT_EFI_ERROR (Status);\r | |
381 | \r | |
382 | // Disable the timer\r | |
4f6d34b4 | 383 | TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg ();\r |
e703b085 OM |
384 | TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;\r |
385 | TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;\r | |
4f6d34b4 | 386 | ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);\r |
1e57a462 | 387 | Status = TimerDriverSetTimerPeriod (&gTimer, 0);\r |
388 | ASSERT_EFI_ERROR (Status);\r | |
389 | \r | |
390 | // Install secure and Non-secure interrupt handlers\r | |
391 | // Note: Because it is not possible to determine the security state of the\r | |
392 | // CPU dynamically, we just install interrupt handler for both sec and non-sec\r | |
393 | // timer PPI\r | |
2785509b AB |
394 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler);\r |
395 | ASSERT_EFI_ERROR (Status);\r | |
396 | \r | |
967efdcd AB |
397 | //\r |
398 | // The hypervisor timer interrupt may be omitted by implementations that\r | |
399 | // execute under virtualization.\r | |
400 | //\r | |
401 | TimerHypIntrNum = PcdGet32 (PcdArmArchTimerHypIntrNum);\r | |
402 | if (TimerHypIntrNum != 0) {\r | |
403 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, TimerHypIntrNum, TimerInterruptHandler);\r | |
404 | ASSERT_EFI_ERROR (Status);\r | |
405 | }\r | |
2785509b | 406 | \r |
1e57a462 | 407 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum), TimerInterruptHandler);\r |
408 | ASSERT_EFI_ERROR (Status);\r | |
409 | \r | |
410 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler);\r | |
411 | ASSERT_EFI_ERROR (Status);\r | |
412 | \r | |
1e57a462 | 413 | // Set up default timer\r |
414 | Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD\r | |
415 | ASSERT_EFI_ERROR (Status);\r | |
416 | \r | |
417 | // Install the Timer Architectural Protocol onto a new handle\r | |
418 | Status = gBS->InstallMultipleProtocolInterfaces(\r | |
419 | &Handle,\r | |
420 | &gEfiTimerArchProtocolGuid, &gTimer,\r | |
421 | NULL\r | |
422 | );\r | |
423 | ASSERT_EFI_ERROR(Status);\r | |
424 | \r | |
e703b085 OM |
425 | // Everything is ready, unmask and enable timer interrupts\r |
426 | TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;\r | |
4f6d34b4 | 427 | ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);\r |
1e57a462 | 428 | \r |
429 | // Register for an ExitBootServicesEvent\r | |
430 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);\r | |
431 | ASSERT_EFI_ERROR (Status);\r | |
432 | \r | |
433 | return Status;\r | |
434 | }\r |