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44788bae | 1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
4 | * \r | |
5 | * This program and the accompanying materials \r | |
6 | * are licensed and made available under the terms and conditions of the BSD License \r | |
7 | * which accompanies this distribution. The full text of the license may be found at \r | |
8 | * http://opensource.org/licenses/bsd-license.php \r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef __ARM_MP_CORE_INFO_GUID_H_\r | |
16 | #define __ARM_MP_CORE_INFO_GUID_H_\r | |
17 | \r | |
18 | #define MAX_CPUS_PER_MPCORE_SYSTEM 0x04\r | |
19 | #define SCU_CONFIG_REG_OFFSET 0x04\r | |
20 | #define MPIDR_U_BIT_MASK 0x40000000\r | |
21 | \r | |
22 | typedef struct {\r | |
23 | UINT32 ClusterId;\r | |
24 | UINT32 CoreId;\r | |
25 | \r | |
26 | // MP Core Mailbox\r | |
27 | EFI_PHYSICAL_ADDRESS MailboxSetAddress;\r | |
28 | EFI_PHYSICAL_ADDRESS MailboxGetAddress;\r | |
29 | EFI_PHYSICAL_ADDRESS MailboxClearAddress;\r | |
30 | UINT64 MailboxClearValue;\r | |
31 | } ARM_CORE_INFO;\r | |
32 | \r | |
33 | typedef struct{\r | |
34 | UINT64 Signature;\r | |
35 | UINT32 Length;\r | |
36 | UINT32 Revision;\r | |
37 | UINT64 OemId;\r | |
38 | UINT64 OemTableId;\r | |
39 | UINTN OemRevision;\r | |
40 | UINTN CreatorId;\r | |
41 | UINTN CreatorRevision;\r | |
42 | EFI_GUID Identifier;\r | |
43 | UINTN DataLen;\r | |
44 | } ARM_PROCESSOR_TABLE_HEADER;\r | |
45 | \r | |
46 | typedef struct {\r | |
47 | ARM_PROCESSOR_TABLE_HEADER Header;\r | |
48 | UINTN NumberOfEntries;\r | |
49 | ARM_CORE_INFO *ArmCpus;\r | |
50 | } ARM_PROCESSOR_TABLE;\r | |
51 | \r | |
52 | \r | |
53 | #define ARM_MP_CORE_INFO_GUID \\r | |
54 | { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r | |
55 | \r | |
56 | #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')\r | |
57 | #define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0\r | |
58 | #define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')\r | |
59 | #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')\r | |
60 | #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001\r | |
61 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5\r | |
62 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001\r | |
63 | \r | |
64 | extern EFI_GUID gArmMpCoreInfoGuid;\r | |
65 | \r | |
66 | #endif /* MPCOREINFO_H_ */\r |