| 782d3d4a |
1 | /** @file\r |
| 2 | *\r |
| 3 | * Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r |
| 4 | *\r |
| 5 | * This program and the accompanying materials\r |
| 6 | * are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | * which accompanies this distribution. The full text of the license may be found at\r |
| 8 | * http://opensource.org/licenses/bsd-license.php\r |
| 9 | *\r |
| 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 12 | *\r |
| 13 | **/\r |
| 14 | \r |
| 15 | #ifndef __ARM_SMC_H__\r |
| 16 | #define __ARM_SMC_H__\r |
| 17 | \r |
| 18 | #include <IndustryStandard/ArmTrustZoneSmc.h>\r |
| 19 | \r |
| 20 | #define ARM_SMC_ID_PRESENCE ARM_TRUSTZONE_ARM_FAST_SMC_ID_PRESENCE\r |
| 21 | #define ARM_SMC_ID_UID ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID\r |
| 22 | #define ARM_SMC_ID_REVISION ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION\r |
| 23 | #define ARM_SMC_ARM_CPU_SUSPEND 0x80100001\r |
| 24 | #define ARM_SMC_ARM_CPU_OFF 0x80100002\r |
| 25 | #define ARM_SMC_ARM_CPU_ON 0x80100003\r |
| 26 | #define ARM_SMC_ARM_MIGRATE 0x80100004\r |
| 27 | \r |
| 28 | #define ARM_SMC_ARM_CPU_SUSPEND_STANDBY_STATE (0 << 16)\r |
| 29 | #define ARM_SMC_ARM_CPU_SUSPEND_POWER_DOWN_STATE (1 << 16)\r |
| 30 | \r |
| 31 | #define ARM_SMC_ARM_CPU_SUSPEND_CURRENT_CPU (0 << 24)\r |
| 32 | #define ARM_SMC_ARM_CPU_SUSPEND_CLUSTER_AFFINITY_1 (1 << 24)\r |
| 33 | #define ARM_SMC_ARM_CPU_SUSPEND_CLUSTER_AFFINITY_2 (2 << 24)\r |
| 34 | #define ARM_SMC_ARM_CPU_SUSPEND_CLUSTER_AFFINITY_3 (3 << 24)\r |
| 35 | \r |
| 36 | #define ARM_SMC_ARM_CPU_OFF_MASK_STATE (1 << 16)\r |
| 37 | #define ARM_SMC_ARM_CPU_OFF_STANDBY_STATE (0 << 16)\r |
| 38 | #define ARM_SMC_ARM_CPU_OFF_POWER_DOWN_STATE (1 << 16)\r |
| 39 | \r |
| 40 | #define ARM_SMC_ARM_CPU_OFF_CURRENT_CPU (0 << 24)\r |
| 41 | #define ARM_SMC_ARM_CPU_OFF_CLUSTER_AFFINITY_1 (1 << 24)\r |
| 42 | #define ARM_SMC_ARM_CPU_OFF_CLUSTER_AFFINITY_2 (2 << 24)\r |
| 43 | #define ARM_SMC_ARM_CPU_OFF_CLUSTER_AFFINITY_3 (3 << 24)\r |
| 44 | \r |
| 45 | \r |
| 46 | #define ARM_SMC_ARM_RETURN_SUCCESS (UINTN)(0)\r |
| 47 | #define ARM_SMC_ARM_RETURN_NOT_IMPLEMENTED (UINTN)(-1)\r |
| 48 | #define ARM_SMC_ARM_RETURN_INVALID_PARAMETER (UINTN)(-2)\r |
| 49 | #define ARM_SMC_ARM_RETURN_DENIED (UINTN)(-3)\r |
| 50 | #define ARM_SMC_ARM_RETURN_CORE_NOT_AVAILABLE (UINTN)(-3)\r |
| 51 | \r |
| 52 | #endif\r |
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