]> git.proxmox.com Git - mirror_edk2.git/blame - ArmPkg/Include/IndustryStandard/ArmStdSmc.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / ArmPkg / Include / IndustryStandard / ArmStdSmc.h
CommitLineData
9a9dd4e8
OM		 1/** @file\r
2*\r
9e7621c0 3* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>\r
351fe776 4* Copyright (c) 2012 - 2022, Arm Limited. All rights reserved.\r
9a9dd4e8 5*\r
4059386c 6* SPDX-License-Identifier: BSD-2-Clause-Patent\r
9a9dd4e8 7*\r
9e7621c0 8* @par Revision Reference:\r
351fe776 9* - [1] SMC Calling Convention version 1.2\r
9e7621c0 10* (https://developer.arm.com/documentation/den0028/c/?lang=en)\r
351fe776
SM		 11* - [2] Arm True Random Number Generator Firmware, Interface 1.0,\r
12* Platform Design Document.\r
13* (https://developer.arm.com/documentation/den0098/latest/)\r
14*\r
15* @par Glossary:\r
16* - TRNG - True Random Number Generator\r
17*\r
9a9dd4e8
OM		 18**/\r
19\r
cc15a619
PG		 20#ifndef ARM_STD_SMC_H_\r
21#define ARM_STD_SMC_H_\r
9a9dd4e8
OM		 22\r
23/*\r
24 * SMC function IDs for Standard Service queries\r
25 */\r
26\r
429309e0
MK		 27#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00\r
28#define ARM_SMC_ID_STD_UID 0x8400ff01\r
9a9dd4e8 29/* 0x8400ff02 is reserved */\r
429309e0 30#define ARM_SMC_ID_STD_REVISION 0x8400ff03\r
9a9dd4e8
OM		 31\r
32/*\r
33 * The 'Standard Service Call UID' is supposed to return the Standard\r
34 * Service UUID. This is a 128-bit value.\r
35 */\r
429309e0
MK		 36#define ARM_SMC_STD_UUID0 0x108d905b\r
37#define ARM_SMC_STD_UUID1 0x47e8f863\r
38#define ARM_SMC_STD_UUID2 0xfbc02dae\r
39#define ARM_SMC_STD_UUID3 0xe2f64156\r
9a9dd4e8
OM		 40\r
41/*\r
42 * ARM Standard Service Calls revision numbers\r
43 * The current revision is: 0.1\r
44 */\r
429309e0
MK		 45#define ARM_SMC_STD_REVISION_MAJOR 0x0\r
46#define ARM_SMC_STD_REVISION_MINOR 0x1\r
9a9dd4e8 47\r
542bc11a
SV		 48/*\r
49 * Management Mode (MM) calls cover a subset of the Standard Service Call range.\r
50 * The list below is not exhaustive.\r
51 */\r
429309e0
MK		 52#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040\r
53#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040\r
542bc11a
SV		 54\r
55// Request service from secure standalone MM environment\r
429309e0
MK		 56#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041\r
57#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041\r
542bc11a 58\r
03e19e6b
EC		 59/* Generic ID when using AArch32 or AArch64 execution state */\r
60#ifdef MDE_CPU_AARCH64\r
429309e0 61#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64\r
03e19e6b
EC		 62#endif\r
63#ifdef MDE_CPU_ARM\r
429309e0 64#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32\r
03e19e6b
EC		 65#endif\r
66\r
542bc11a 67/* MM return error codes */\r
429309e0
MK		 68#define ARM_SMC_MM_RET_SUCCESS 0\r
69#define ARM_SMC_MM_RET_NOT_SUPPORTED -1\r
70#define ARM_SMC_MM_RET_INVALID_PARAMS -2\r
71#define ARM_SMC_MM_RET_DENIED -3\r
72#define ARM_SMC_MM_RET_NO_MEMORY -4\r
542bc11a 73\r
9e7621c0 74// ARM Architecture Calls\r
429309e0
MK		 75#define SMCCC_VERSION 0x80000000\r
76#define SMCCC_ARCH_FEATURES 0x80000001\r
77#define SMCCC_ARCH_SOC_ID 0x80000002\r
78#define SMCCC_ARCH_WORKAROUND_1 0x80008000\r
79#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF\r
9e7621c0
RC		 80\r
81#define SMC_ARCH_CALL_SUCCESS 0\r
429309e0
MK		 82#define SMC_ARCH_CALL_NOT_SUPPORTED -1\r
83#define SMC_ARCH_CALL_NOT_REQUIRED -2\r
84#define SMC_ARCH_CALL_INVALID_PARAMETER -3\r
9e7621c0 85\r
9a9dd4e8
OM		 86/*\r
87 * Power State Coordination Interface (PSCI) calls cover a subset of the\r
88 * Standard Service Call range.\r
89 * The list below is not exhaustive.\r
90 */\r
91#define ARM_SMC_ID_PSCI_VERSION 0x84000000\r
92#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001\r
93#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001\r
94#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002\r
95#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003\r
96#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003\r
97#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004\r
98#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004\r
99#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005\r
100#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005\r
ae9bc057
AB		 101#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008\r
102#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009\r
52bf4eba
PM		 103#define ARM_SMC_ID_PSCI_FEATURES 0x8400000A\r
104#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xC4000012\r
9a9dd4e8
OM		 105\r
106/* The current PSCI version is: 0.2 */\r
107#define ARM_SMC_PSCI_VERSION_MAJOR 0\r
108#define ARM_SMC_PSCI_VERSION_MINOR 2\r
109#define ARM_SMC_PSCI_VERSION \\r
110 ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)\r
111\r
112/* PSCI return error codes */\r
429309e0
MK		 113#define ARM_SMC_PSCI_RET_SUCCESS 0\r
114#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1\r
115#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2\r
116#define ARM_SMC_PSCI_RET_DENIED -3\r
117#define ARM_SMC_PSCI_RET_ALREADY_ON -4\r
118#define ARM_SMC_PSCI_RET_ON_PENDING -5\r
119#define ARM_SMC_PSCI_RET_INTERN_FAIL -6\r
120#define ARM_SMC_PSCI_RET_NOT_PRESENT -7\r
121#define ARM_SMC_PSCI_RET_DISABLED -8\r
9a9dd4e8
OM		 122\r
123#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \\r
124 ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))\r
125\r
126#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \\r
127 ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))\r
128\r
129#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)\r
130#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)\r
131\r
429309e0
MK		 132#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0\r
133#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1\r
134#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2\r
135#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3\r
9a9dd4e8
OM		 136\r
137#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0\r
138#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1\r
139#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2\r
140\r
d65b78f1
SG		 141/*\r
142 * SMC function IDs for Trusted OS Service queries\r
143 */\r
429309e0
MK		 144#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00\r
145#define ARM_SMC_ID_TOS_UID 0xbf00ff01\r
d65b78f1 146/* 0xbf00ff02 is reserved */\r
429309e0 147#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03\r
d65b78f1 148\r
351fe776
SM		 149// Firmware TRNG interface Function IDs\r
150\r
151/*\r
152 SMC/HVC call to get the version of the TRNG backend,\r
153 Cf. [2], 2.1 TRNG_VERSION\r
154 Input values:\r
155 W0 0x8400_0050\r
156 W1-W7 Reserved (MBZ)\r
157 Return values:\r
158 Success (W0 > 0) W0[31] MBZ\r
159 W0[30:16] Major revision\r
160 W0[15:0] Minor revision\r
161 W1 - W3 Reserved (MBZ)\r
162 Error (W0 < 0)\r
163 NOT_SUPPORTED Function not implemented\r
164*/\r
165#define ARM_SMC_ID_TRNG_VERSION 0x84000050\r
166\r
167/*\r
168 SMC/HVC call to check if a TRNG function ID is implemented by the backend,\r
169 Cf. [2], Section 2.2 TRNG_FEATURES\r
170 Input Values\r
171 W0 0x8400_0051\r
172 W1 trng_func_id\r
173 W2-W7 Reserved (MBZ)\r
174 Return values:\r
175 Success (W0 >= 0):\r
176 SUCCESS Function is implemented.\r
177 > 0 Function is implemented and\r
178 has specific capabilities,\r
179 see function definition.\r
180 Error (W0 < 0)\r
181 NOT_SUPPORTED Function with FID=trng_func_id\r
182 is not implemented\r
183*/\r
184#define ARM_SMC_ID_TRNG_FEATURES 0x84000051\r
185\r
186/*\r
187 SMC/HVC call to get the UUID of the TRNG backend,\r
188 Cf. [2], Section 2.3 TRNG_GET_UUID\r
189 Input Values:\r
190 W0 0x8400_0052\r
191 W1-W7 Reserved (MBZ)\r
192 Return Values:\r
193 Success (W0 != -1)\r
194 W0 UUID[31:0]\r
195 W1 UUID[63:32]\r
196 W2 UUID[95:64]\r
197 W3 UUID[127:96]\r
198 Error (W0 = -1)\r
199 W0 NOT_SUPPORTED\r
200*/\r
201#define ARM_SMC_ID_TRNG_GET_UUID 0x84000052\r
202\r
203/*\r
204 AARCH32 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.\r
205 Input values:\r
206 W0 0x8400_0053\r
207 W2-W7 Reserved (MBZ)\r
208 Return values:\r
209 Success (W0 = 0):\r
210 W0 MBZ\r
211 W1 Entropy[95:64]\r
212 W2 Entropy[63:32]\r
213 W3 Entropy[31:0]\r
214 Error (W0 < 0)\r
215 W0 NOT_SUPPORTED\r
216 NO_ENTROPY\r
217 INVALID_PARAMETERS\r
218 W1 - W3 Reserved (MBZ)\r
219*/\r
220#define ARM_SMC_ID_TRNG_RND_AARCH32 0x84000053\r
221\r
222/*\r
223 AARCH64 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.\r
224 Input values:\r
225 X0 0xC400_0053\r
226 X2-X7 Reserved (MBZ)\r
227 Return values:\r
228 Success (X0 = 0):\r
229 X0 MBZ\r
230 X1 Entropy[191:128]\r
231 X2 Entropy[127:64]\r
232 X3 Entropy[63:0]\r
233 Error (X0 < 0)\r
234 X0 NOT_SUPPORTED\r
235 NO_ENTROPY\r
236 INVALID_PARAMETERS\r
237 X1 - X3 Reserved (MBZ)\r
238*/\r
239#define ARM_SMC_ID_TRNG_RND_AARCH64 0xC4000053\r
240\r
241// Firmware TRNG status codes\r
242#define TRNG_STATUS_SUCCESS (INT32)(0)\r
243#define TRNG_STATUS_NOT_SUPPORTED (INT32)(-1)\r
244#define TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)\r
245#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)\r
246\r
cc15a619 247#endif // ARM_STD_SMC_H_\r
EFI Development Kit II mirror for PVE