]>
Commit | Line | Data |
---|---|---|
2ef2b01e A |
1 | /** @file\r |
2 | \r | |
d6ebcab7 | 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
52d44f77 | 4 | Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r |
3402aac7 | 5 | \r |
d6ebcab7 | 6 | This program and the accompanying materials\r |
2ef2b01e A |
7 | are licensed and made available under the terms and conditions of the BSD License\r |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #include <Base.h>\r | |
17 | \r | |
18 | #include <Library/ArmLib.h>\r | |
19 | #include <Library/DebugLib.h>\r | |
20 | #include <Library/PcdLib.h>\r | |
21 | \r | |
22 | #include "ArmLibPrivate.h"\r | |
23 | \r | |
bd6b9799 | 24 | VOID\r |
25 | EFIAPI\r | |
26 | ArmSetAuxCrBit (\r | |
27 | IN UINT32 Bits\r | |
28 | )\r | |
29 | {\r | |
30 | UINT32 val = ArmReadAuxCr();\r | |
31 | val |= Bits;\r | |
32 | ArmWriteAuxCr(val);\r | |
33 | }\r | |
34 | \r | |
836c3500 | 35 | VOID\r |
36 | EFIAPI\r | |
37 | ArmUnsetAuxCrBit (\r | |
38 | IN UINT32 Bits\r | |
39 | )\r | |
40 | {\r | |
41 | UINT32 val = ArmReadAuxCr();\r | |
42 | val &= ~Bits;\r | |
43 | ArmWriteAuxCr(val);\r | |
44 | }\r | |
52d44f77 OM |
45 | \r |
46 | //\r | |
47 | // Helper functions for accessing CPUACTLR\r | |
48 | //\r | |
49 | \r | |
50 | VOID\r | |
51 | EFIAPI\r | |
52 | ArmSetCpuActlrBit (\r | |
53 | IN UINTN Bits\r | |
54 | )\r | |
55 | {\r | |
56 | UINTN Value;\r | |
57 | Value = ArmReadCpuActlr ();\r | |
58 | Value |= Bits;\r | |
59 | ArmWriteCpuActlr (Value);\r | |
60 | }\r | |
61 | \r | |
62 | VOID\r | |
63 | EFIAPI\r | |
64 | ArmUnsetCpuActlrBit (\r | |
65 | IN UINTN Bits\r | |
66 | )\r | |
67 | {\r | |
68 | UINTN Value;\r | |
69 | Value = ArmReadCpuActlr ();\r | |
70 | Value &= ~Bits;\r | |
71 | ArmWriteCpuActlr (Value);\r | |
72 | }\r | |
fbf658eb AB |
73 | \r |
74 | UINTN\r | |
75 | EFIAPI\r | |
76 | ArmDataCacheLineLength (\r | |
77 | VOID\r | |
78 | )\r | |
79 | {\r | |
80 | return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine\r | |
81 | }\r | |
82 | \r | |
83 | UINTN\r | |
84 | EFIAPI\r | |
85 | ArmInstructionCacheLineLength (\r | |
86 | VOID\r | |
87 | )\r | |
88 | {\r | |
89 | return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine\r | |
90 | }\r | |
c653fc2a AB |
91 | \r |
92 | UINTN\r | |
93 | EFIAPI\r | |
94 | ArmCacheWritebackGranule (\r | |
95 | VOID\r | |
96 | )\r | |
97 | {\r | |
98 | UINTN CWG;\r | |
99 | \r | |
100 | CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG\r | |
101 | \r | |
102 | if (CWG == 0) {\r | |
103 | return SIZE_2KB;\r | |
104 | }\r | |
105 | \r | |
106 | return 4 << CWG;\r | |
107 | }\r |