]>
Commit | Line | Data |
---|---|---|
3402aac7 | 1 | //------------------------------------------------------------------------------\r |
da9675a2 | 2 | //\r |
3 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
4 | //\r | |
5 | // This program and the accompanying materials\r | |
6 | // are licensed and made available under the terms and conditions of the BSD License\r | |
7 | // which accompanies this distribution. The full text of the license may be found at\r | |
8 | // http://opensource.org/licenses/bsd-license.php\r | |
9 | //\r | |
10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | //\r | |
13 | //------------------------------------------------------------------------------\r | |
14 | \r | |
15 | EXPORT ArmReadCntFrq\r | |
16 | EXPORT ArmWriteCntFrq\r | |
17 | EXPORT ArmReadCntPct\r | |
18 | EXPORT ArmReadCntkCtl\r | |
19 | EXPORT ArmWriteCntkCtl\r | |
20 | EXPORT ArmReadCntpTval\r | |
21 | EXPORT ArmWriteCntpTval\r | |
22 | EXPORT ArmReadCntpCtl\r | |
23 | EXPORT ArmWriteCntpCtl\r | |
24 | EXPORT ArmReadCntvTval\r | |
25 | EXPORT ArmWriteCntvTval\r | |
26 | EXPORT ArmReadCntvCtl\r | |
27 | EXPORT ArmWriteCntvCtl\r | |
28 | EXPORT ArmReadCntvCt\r | |
29 | EXPORT ArmReadCntpCval\r | |
30 | EXPORT ArmWriteCntpCval\r | |
31 | EXPORT ArmReadCntvCval\r | |
32 | EXPORT ArmWriteCntvCval\r | |
33 | EXPORT ArmReadCntvOff\r | |
34 | EXPORT ArmWriteCntvOff\r | |
35 | \r | |
36 | AREA ArmV7ArchTimerSupport, CODE, READONLY\r | |
37 | PRESERVE8\r | |
38 | \r | |
39 | ArmReadCntFrq\r | |
40 | mrc p15, 0, r0, c14, c0, 0 ; Read CNTFRQ\r | |
41 | bx lr\r | |
42 | \r | |
43 | ArmWriteCntFrq\r | |
44 | mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ\r | |
45 | bx lr\r | |
46 | \r | |
47 | ArmReadCntPct\r | |
48 | mrrc p15, 0, r0, r1, c14 ; Read CNTPT (Physical counter register)\r | |
49 | bx lr\r | |
50 | \r | |
51 | ArmReadCntkCtl\r | |
52 | mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register)\r | |
53 | bx lr\r | |
54 | \r | |
55 | ArmWriteCntkCtl\r | |
56 | mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)\r | |
57 | bx lr\r | |
58 | \r | |
59 | ArmReadCntpTval\r | |
60 | mrc p15, 0, r0, c14, c2, 0 ; Read CNTP_TVAL (PL1 physical timer value register)\r | |
61 | bx lr\r | |
62 | \r | |
63 | ArmWriteCntpTval\r | |
64 | mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)\r | |
65 | bx lr\r | |
66 | \r | |
67 | ArmReadCntpCtl\r | |
68 | mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register)\r | |
69 | bx lr\r | |
70 | \r | |
71 | ArmWriteCntpCtl\r | |
72 | mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)\r | |
73 | bx lr\r | |
74 | \r | |
75 | ArmReadCntvTval\r | |
76 | mrc p15, 0, r0, c14, c3, 0 ; Read CNTV_TVAL (Virtual Timer Value register)\r | |
77 | bx lr\r | |
78 | \r | |
79 | ArmWriteCntvTval\r | |
80 | mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)\r | |
81 | bx lr\r | |
82 | \r | |
83 | ArmReadCntvCtl\r | |
84 | mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register)\r | |
85 | bx lr\r | |
86 | \r | |
87 | ArmWriteCntvCtl\r | |
88 | mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)\r | |
89 | bx lr\r | |
90 | \r | |
91 | ArmReadCntvCt\r | |
92 | mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register)\r | |
93 | bx lr\r | |
94 | \r | |
95 | ArmReadCntpCval\r | |
96 | mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register)\r | |
97 | bx lr\r | |
98 | \r | |
99 | ArmWriteCntpCval\r | |
100 | mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)\r | |
101 | bx lr\r | |
102 | \r | |
103 | ArmReadCntvCval\r | |
104 | mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)\r | |
105 | bx lr\r | |
106 | \r | |
107 | ArmWriteCntvCval\r | |
108 | mcrr p15, 3, r0, r1, c14 ; write to CNTV_CTVAL (Virtual Timer Compare Value Register)\r | |
109 | bx lr\r | |
110 | \r | |
111 | ArmReadCntvOff\r | |
112 | mrrc p15, 4, r0, r1, c14 ; Read CNTVOFF (virtual Offset register)\r | |
113 | bx lr\r | |
114 | \r | |
115 | ArmWriteCntvOff\r | |
116 | mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)\r | |
117 | bx lr\r | |
118 | \r | |
119 | END\r |