[mirror_edk2.git] / ArmPkg / Library / CompilerIntrinsicsLib / Arm / divsi3.S

#------------------------------------------------------------------------------ 
#
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution.  The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#------------------------------------------------------------------------------

	.text
	.align 2
	.globl ASM_PFX(__divsi3)
  INTERWORK_FUNC(__divsi3)\r
	
ASM_PFX(__divsi3):
	eor	r3, r0, r0, asr #31
	eor	r2, r1, r1, asr #31
	stmfd	sp!, {r4, r5, r7, lr}
	mov	r5, r0, asr #31
	add	r7, sp, #8
	mov	r4, r1, asr #31
	sub	r0, r3, r0, asr #31
	sub	r1, r2, r1, asr #31
	bl	ASM_PFX(__udivsi3)
	eor	r1, r5, r4
	eor	r0, r0, r1
	rsb	r0, r1, r0
	ldmfd	sp!, {r4, r5, r7, pc}
Commit	Line	Data
2ef2b01e A	1	#------------------------------------------------------------------------------
2ef2b01e A	2	#
d6ebcab7	3	# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
2ef2b01e	4	#
d6ebcab7	5	# This program and the accompanying materials
2ef2b01e A	6	# are licensed and made available under the terms and conditions of the BSD License
	7	# which accompanies this distribution. The full text of the license may be found at
	8	# http://opensource.org/licenses/bsd-license.php
	9	#
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
	12	#
	13	#------------------------------------------------------------------------------
	14
	15	.text
	16	.align 2
4e471bfd	17	.globl ASM_PFX(__divsi3)
63ca7402	18	INTERWORK_FUNC(__divsi3)\r
4e471bfd	19
4e471bfd	20	ASM_PFX(__divsi3):
2ef2b01e A	21	eor r3, r0, r0, asr #31
	22	eor r2, r1, r1, asr #31
	23	stmfd sp!, {r4, r5, r7, lr}
	24	mov r5, r0, asr #31
	25	add r7, sp, #8
	26	mov r4, r1, asr #31
	27	sub r0, r3, r0, asr #31
	28	sub r1, r2, r1, asr #31
4e471bfd	29	bl ASM_PFX(__udivsi3)
2ef2b01e A	30	eor r1, r5, r4
	31	eor r0, r0, r1
	32	rsb r0, r1, r0
	33	ldmfd sp!, {r4, r5, r7, pc}