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1 | /** @file\r |
2 | *\r | |
1bb1f35f | 3 | * Copyright (c) 2013-2015, ARM Limited. All rights reserved.\r |
9f38945f OM |
4 | *\r |
5 | * This program and the accompanying materials\r | |
6 | * are licensed and made available under the terms and conditions of the BSD License\r | |
7 | * which accompanies this distribution. The full text of the license may be found at\r | |
8 | * http://opensource.org/licenses/bsd-license.php\r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #include <Library/ArmPlatformLib.h>\r | |
16 | #include <Library/DebugLib.h>\r | |
17 | #include <Library/HobLib.h>\r | |
18 | #include <Library/PcdLib.h>\r | |
19 | #include <Library/IoLib.h>\r | |
20 | #include <Library/MemoryAllocationLib.h>\r | |
21 | \r | |
22 | #include <ArmPlatform.h>\r | |
23 | \r | |
24 | // The total number of descriptors, including the final "end-of-table" descriptor.\r | |
1bb1f35f | 25 | #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16\r |
9f38945f OM |
26 | \r |
27 | // DDR attributes\r | |
28 | #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r | |
29 | #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r | |
30 | \r | |
31 | /**\r | |
32 | Return the Virtual Memory Map of your platform\r | |
33 | \r | |
34 | This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r | |
35 | \r | |
36 | @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r | |
37 | Virtual Memory mapping. This array must be ended by a zero-filled\r | |
38 | entry\r | |
39 | \r | |
40 | **/\r | |
41 | VOID\r | |
42 | ArmPlatformGetVirtualMemoryMap (\r | |
43 | IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r | |
44 | )\r | |
45 | {\r | |
46 | ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r | |
47 | UINTN Index = 0;\r | |
48 | ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r | |
49 | EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;\r | |
50 | \r | |
51 | ASSERT (VirtualMemoryMap != NULL);\r | |
52 | \r | |
53 | //\r | |
54 | // Declared the additional 6GB of memory\r | |
55 | //\r | |
56 | ResourceAttributes =\r | |
57 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r | |
58 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
9f38945f OM |
59 | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r |
60 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r | |
61 | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r | |
62 | EFI_RESOURCE_ATTRIBUTE_TESTED;\r | |
63 | \r | |
64 | BuildResourceDescriptorHob (\r | |
65 | EFI_RESOURCE_SYSTEM_MEMORY,\r | |
66 | ResourceAttributes,\r | |
67 | ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE,\r | |
68 | ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ);\r | |
69 | \r | |
70 | VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r | |
71 | if (VirtualMemoryTable == NULL) {\r | |
72 | return;\r | |
73 | }\r | |
74 | \r | |
75 | if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r | |
76 | CacheAttributes = DDR_ATTRIBUTES_CACHED;\r | |
77 | } else {\r | |
78 | CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r | |
79 | }\r | |
80 | \r | |
81 | // SMB CS0 - NOR0 Flash\r | |
82 | VirtualMemoryTable[Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r | |
83 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r | |
84 | VirtualMemoryTable[Index].Length = SIZE_256KB * 255;\r | |
85 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
86 | // Environment Variables region\r | |
87 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);\r | |
88 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);\r | |
89 | VirtualMemoryTable[Index].Length = SIZE_64KB * 4;\r | |
90 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
91 | \r | |
92 | // SMB CS2 & CS3 - Off-chip (motherboard) peripherals\r | |
93 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r | |
94 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r | |
95 | VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;\r | |
96 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
97 | \r | |
98 | // Juno OnChip non-secure ROM\r | |
99 | VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_NON_SECURE_ROM_BASE;\r | |
100 | VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_NON_SECURE_ROM_BASE;\r | |
101 | VirtualMemoryTable[Index].Length = ARM_JUNO_NON_SECURE_ROM_SZ;\r | |
102 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
103 | \r | |
104 | // Juno OnChip peripherals\r | |
105 | VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_PERIPHERALS_BASE;\r | |
106 | VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_PERIPHERALS_BASE;\r | |
107 | VirtualMemoryTable[Index].Length = ARM_JUNO_PERIPHERALS_SZ;\r | |
108 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
109 | \r | |
110 | // Juno OnChip non-secure SRAM\r | |
111 | VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_NON_SECURE_SRAM_BASE;\r | |
112 | VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_NON_SECURE_SRAM_BASE;\r | |
113 | VirtualMemoryTable[Index].Length = ARM_JUNO_NON_SECURE_SRAM_SZ;\r | |
114 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
115 | \r | |
1bb1f35f OM |
116 | // PCI Root Complex\r |
117 | VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPcieControlBaseAddress);\r | |
118 | VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPcieControlBaseAddress);\r | |
119 | VirtualMemoryTable[Index].Length = SIZE_128KB;\r | |
120 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
121 | \r | |
122 | //\r | |
123 | // PCI Configuration Space\r | |
124 | //\r | |
125 | VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);\r | |
126 | VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);\r | |
127 | VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciConfigurationSpaceSize);\r | |
128 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
129 | \r | |
130 | //\r | |
131 | // PCI Memory Space\r | |
132 | //\r | |
133 | VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdPciMmio32Base);\r | |
134 | VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdPciMmio32Base);\r | |
135 | VirtualMemoryTable[Index].Length = PcdGet32 (PcdPciMmio32Size);\r | |
136 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
137 | \r | |
138 | //\r | |
139 | // 64-bit PCI Memory Space\r | |
140 | //\r | |
141 | VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciMmio64Base);\r | |
142 | VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciMmio64Base);\r | |
143 | VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciMmio64Size);\r | |
144 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
145 | \r | |
9f38945f OM |
146 | // Juno SOC peripherals\r |
147 | VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_SOC_PERIPHERALS_BASE;\r | |
148 | VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_SOC_PERIPHERALS_BASE;\r | |
149 | VirtualMemoryTable[Index].Length = ARM_JUNO_SOC_PERIPHERALS_SZ;\r | |
150 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r | |
151 | \r | |
152 | // DDR - 2GB\r | |
153 | VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);\r | |
154 | VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);\r | |
155 | VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);\r | |
156 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
157 | \r | |
158 | // DDR - 6GB\r | |
159 | VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;\r | |
160 | VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;\r | |
161 | VirtualMemoryTable[Index].Length = ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ;\r | |
162 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
163 | \r | |
164 | // End of Table\r | |
165 | VirtualMemoryTable[++Index].PhysicalBase = 0;\r | |
166 | VirtualMemoryTable[Index].VirtualBase = 0;\r | |
167 | VirtualMemoryTable[Index].Length = 0;\r | |
168 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r | |
169 | \r | |
170 | ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);\r | |
171 | \r | |
172 | *VirtualMemoryMap = VirtualMemoryTable;\r | |
173 | }\r |