ArmPlatformPkg/ArmJunoPkg: Enable PCI and SATA support

[mirror_edk2.git] / ArmPlatformPkg / ArmJunoPkg / Library / ArmJunoLib / ArmJunoMem.c

/** @file\r
*\r
*  Copyright (c) 2013-2015, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include <Library/ArmPlatformLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
\r
#include <ArmPlatform.h>\r
\r
// The total number of descriptors, including the final "end-of-table" descriptor.\r
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16\r
\r
// DDR attributes\r
#define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
#define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
\r
/**\r
  Return the Virtual Memory Map of your platform\r
\r
  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r
\r
  @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r
                                    Virtual Memory mapping. This array must be ended by a zero-filled\r
                                    entry\r
\r
**/\r
VOID\r
ArmPlatformGetVirtualMemoryMap (\r
  IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
  )\r
{\r
  ARM_MEMORY_REGION_ATTRIBUTES  CacheAttributes;\r
  UINTN                         Index = 0;\r
  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;\r
  EFI_RESOURCE_ATTRIBUTE_TYPE   ResourceAttributes;\r
\r
  ASSERT (VirtualMemoryMap != NULL);\r
\r
  //\r
  // Declared the additional 6GB of memory\r
  //\r
  ResourceAttributes =\r
      EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
      EFI_RESOURCE_ATTRIBUTE_TESTED;\r
\r
  BuildResourceDescriptorHob (\r
    EFI_RESOURCE_SYSTEM_MEMORY,\r
    ResourceAttributes,\r
    ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE,\r
    ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ);\r
\r
  VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
  if (VirtualMemoryTable == NULL) {\r
      return;\r
  }\r
\r
  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
      CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
  } else {\r
      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
  }\r
\r
  // SMB CS0 - NOR0 Flash\r
  VirtualMemoryTable[Index].PhysicalBase    = ARM_VE_SMB_NOR0_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_VE_SMB_NOR0_BASE;\r
  VirtualMemoryTable[Index].Length          = SIZE_256KB * 255;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
  // Environment Variables region\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_VE_SMB_NOR0_BASE + (SIZE_256KB * 255);\r
  VirtualMemoryTable[Index].Length          = SIZE_64KB * 4;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  // SMB CS2 & CS3 - Off-chip (motherboard) peripherals\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_VE_SMB_PERIPH_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_VE_SMB_PERIPH_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_VE_SMB_PERIPH_SZ;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  // Juno OnChip non-secure ROM\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_NON_SECURE_ROM_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_JUNO_NON_SECURE_ROM_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_JUNO_NON_SECURE_ROM_SZ;\r
  VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
\r
  // Juno OnChip peripherals\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_PERIPHERALS_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_JUNO_PERIPHERALS_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_JUNO_PERIPHERALS_SZ;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  // Juno OnChip non-secure SRAM\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_NON_SECURE_SRAM_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_JUNO_NON_SECURE_SRAM_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_JUNO_NON_SECURE_SRAM_SZ;\r
  VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
\r
  // PCI Root Complex\r
  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPcieControlBaseAddress);\r
  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPcieControlBaseAddress);\r
  VirtualMemoryTable[Index].Length          = SIZE_128KB;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  //\r
  // PCI Configuration Space\r
  //\r
  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);\r
  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);\r
  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdPciConfigurationSpaceSize);\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  //\r
  // PCI Memory Space\r
  //\r
  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciMmio32Base);\r
  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciMmio32Base);\r
  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciMmio32Size);\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  //\r
  // 64-bit PCI Memory Space\r
  //\r
  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciMmio64Base);\r
  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciMmio64Base);\r
  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdPciMmio64Size);\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  // Juno SOC peripherals\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_SOC_PERIPHERALS_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_JUNO_SOC_PERIPHERALS_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_JUNO_SOC_PERIPHERALS_SZ;\r
  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
  // DDR - 2GB\r
  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);\r
  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);\r
  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);\r
  VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
\r
  // DDR - 6GB\r
  VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;\r
  VirtualMemoryTable[Index].VirtualBase     = ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE;\r
  VirtualMemoryTable[Index].Length          = ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ;\r
  VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
\r
  // End of Table\r
  VirtualMemoryTable[++Index].PhysicalBase  = 0;\r
  VirtualMemoryTable[Index].VirtualBase     = 0;\r
  VirtualMemoryTable[Index].Length          = 0;\r
  VirtualMemoryTable[Index].Attributes      = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
\r
  ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);\r
\r
  *VirtualMemoryMap = VirtualMemoryTable;\r
}\r