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1d5d0ae9 | 1 | /** @file |
2 | * | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved. | |
4 | * | |
5 | * This program and the accompanying materials | |
6 | * are licensed and made available under the terms and conditions of the BSD License | |
7 | * which accompanies this distribution. The full text of the license may be found at | |
8 | * http://opensource.org/licenses/bsd-license.php | |
9 | * | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | * | |
13 | **/ | |
14 | ||
15 | #include <Library/IoLib.h> | |
16 | #include <Library/ArmPlatformLib.h> | |
17 | #include <Library/DebugLib.h> | |
18 | #include <Library/PcdLib.h> | |
23792dea | 19 | |
1d5d0ae9 | 20 | #include <Drivers/PL341Dmc.h> |
23792dea | 21 | #include <Drivers/SP804Timer.h> |
1d5d0ae9 | 22 | |
23 | /** | |
24 | Return if Trustzone is supported by your platform | |
25 | ||
26 | A non-zero value must be returned if you want to support a Secure World on your platform. | |
27 | ArmPlatformTrustzoneInit() will later set up the secure regions. | |
28 | This function can return 0 even if Trustzone is supported by your processor. In this case, | |
29 | the platform will continue to run in Secure World. | |
30 | ||
31 | @return A non-zero value if Trustzone supported. | |
32 | ||
33 | **/ | |
aa01abaa | 34 | UINTN |
35 | ArmPlatformTrustzoneSupported ( | |
36 | VOID | |
37 | ) | |
38 | { | |
1d5d0ae9 | 39 | // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM |
aa01abaa | 40 | return FALSE; |
1d5d0ae9 | 41 | } |
42 | ||
43 | /** | |
44 | Initialize the Secure peripherals and memory regions | |
45 | ||
46 | If Trustzone is supported by your platform then this function makes the required initialization | |
47 | of the secure peripherals and memory regions. | |
48 | ||
49 | **/ | |
aa01abaa | 50 | VOID |
51 | ArmPlatformTrustzoneInit ( | |
52 | VOID | |
53 | ) | |
54 | { | |
55 | ASSERT(FALSE); | |
1d5d0ae9 | 56 | } |
57 | ||
58 | /** | |
59 | Remap the memory at 0x0 | |
60 | ||
61 | Some platform requires or gives the ability to remap the memory at the address 0x0. | |
62 | This function can do nothing if this feature is not relevant to your platform. | |
63 | ||
64 | **/ | |
aa01abaa | 65 | VOID |
66 | ArmPlatformBootRemapping ( | |
67 | VOID | |
68 | ) | |
69 | { | |
1d5d0ae9 | 70 | // Disable memory remapping and return to normal mapping |
aa01abaa | 71 | MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE |
1d5d0ae9 | 72 | } |
73 | ||
a534d714 | 74 | /** |
75 | Return the current Boot Mode | |
76 | ||
77 | This function returns the boot reason on the platform | |
78 | ||
79 | **/ | |
80 | EFI_BOOT_MODE | |
81 | ArmPlatformGetBootMode ( | |
82 | VOID | |
83 | ) | |
84 | { | |
85 | return BOOT_WITH_FULL_CONFIGURATION; | |
86 | } | |
87 | ||
8e06b586 | 88 | /** |
89 | Initialize controllers that must setup at the early stage | |
90 | ||
91 | Some peripherals must be initialized in Secure World. | |
92 | For example, some L2x0 requires to be initialized in Secure World | |
93 | ||
94 | **/ | |
95 | VOID | |
aa01abaa | 96 | ArmPlatformSecInitialize ( |
8e06b586 | 97 | VOID |
98 | ) { | |
99 | // Do nothing yet | |
100 | } | |
101 | ||
aa01abaa | 102 | /** |
103 | Initialize controllers that must setup in the normal world | |
104 | ||
105 | This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim | |
106 | in the PEI phase. | |
107 | ||
108 | **/ | |
109 | VOID | |
110 | ArmPlatformNormalInitialize ( | |
111 | VOID | |
112 | ) | |
113 | { | |
23792dea | 114 | // Configure periodic timer (TIMER0) for 1MHz operation |
115 | MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); | |
116 | // Configure 1MHz clock | |
117 | MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK); | |
118 | // configure SP810 to use 1MHz clock and disable | |
119 | MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK); | |
120 | // Configure SP810 to use 1MHz clock and disable | |
121 | MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); | |
aa01abaa | 122 | } |
123 | ||
1d5d0ae9 | 124 | /** |
125 | Initialize the system (or sometimes called permanent) memory | |
126 | ||
127 | This memory is generally represented by the DRAM. | |
128 | ||
129 | **/ | |
aa01abaa | 130 | VOID |
131 | ArmPlatformInitializeSystemMemory ( | |
132 | VOID | |
133 | ) | |
134 | { | |
135 | // We do not need to initialize the System Memory on RTSM | |
1d5d0ae9 | 136 | } |