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66f530ed | 1 | #\r |
04f1a709 | 2 | # Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r |
66f530ed | 3 | #\r |
3402aac7 RC |
4 | # This program and the accompanying materials\r |
5 | # are licensed and made available under the terms and conditions of the BSD License\r | |
6 | # which accompanies this distribution. The full text of the license may be found at\r | |
7 | # http://opensource.org/licenses/bsd-license.php\r | |
8 | #\r | |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
66f530ed | 11 | #\r |
12 | \r | |
13 | ################################################################################\r | |
14 | #\r | |
15 | # FD Section\r | |
16 | # The [FD] Section is made up of the definition statements and a\r | |
17 | # description of what goes into the Flash Device Image. Each FD section\r | |
18 | # defines one flash "device" image. A flash device image may be one of\r | |
19 | # the following: Removable media bootable image (like a boot floppy\r | |
20 | # image,) an Option ROM image (that would be "flashed" into an add-in\r | |
21 | # card,) a System "Flash" image (that would be burned into a system's\r | |
22 | # flash) or an Update ("Capsule") image that will be used to update and\r | |
23 | # existing system flash.\r | |
24 | #\r | |
25 | ################################################################################\r | |
26 | \r | |
27 | [FD.Sec_ArmVExpress_EFI]\r | |
28 | BaseAddress = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.\r | |
29 | Size = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device\r | |
30 | ErasePolarity = 1\r | |
31 | BlockSize = 0x00001000\r | |
32 | NumBlocks = 0x80\r | |
33 | \r | |
34 | ################################################################################\r | |
35 | #\r | |
36 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
37 | # images within the flash device.\r | |
38 | #\r | |
39 | # Regions must be defined in ascending order and may not overlap.\r | |
40 | #\r | |
41 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
42 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
43 | # "0x" characters. Like:\r | |
44 | # Offset|Size\r | |
45 | # PcdOffsetCName|PcdSizeCName\r | |
46 | # RegionType <FV, DATA, or FILE>\r | |
47 | #\r | |
48 | ################################################################################\r | |
49 | \r | |
50 | 0x00000000|0x00080000\r | |
ce5ed6c8 | 51 | gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r |
66f530ed | 52 | FV = FVMAIN_SEC\r |
53 | \r | |
54 | \r | |
55 | [FD.ArmVExpress_EFI]\r | |
56 | !if $(EDK2_ARMVE_STANDALONE) == 1\r | |
57 | BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r | |
58 | !else\r | |
59 | BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.\r | |
60 | !endif\r | |
61 | Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r | |
62 | ErasePolarity = 1\r | |
63 | \r | |
64 | # This one is tricky, it must be: BlockSize * NumBlocks = Size\r | |
65 | BlockSize = 0x00001000\r | |
66 | NumBlocks = 0x200\r | |
67 | \r | |
68 | ################################################################################\r | |
69 | #\r | |
70 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
71 | # images within the flash device.\r | |
72 | #\r | |
73 | # Regions must be defined in ascending order and may not overlap.\r | |
74 | #\r | |
75 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
76 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
77 | # "0x" characters. Like:\r | |
78 | # Offset|Size\r | |
79 | # PcdOffsetCName|PcdSizeCName\r | |
80 | # RegionType <FV, DATA, or FILE>\r | |
81 | #\r | |
82 | ################################################################################\r | |
83 | \r | |
84 | 0x00000000|0x00200000\r | |
ce5ed6c8 | 85 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r |
66f530ed | 86 | FV = FVMAIN_COMPACT\r |
87 | \r | |
88 | \r | |
89 | ################################################################################\r | |
90 | #\r | |
91 | # FV Section\r | |
92 | #\r | |
93 | # [FV] section is used to define what components or modules are placed within a flash\r | |
94 | # device file. This section also defines order the components and modules are positioned\r | |
95 | # within the image. The [FV] section consists of define statements, set statements and\r | |
96 | # module statements.\r | |
97 | #\r | |
98 | ################################################################################\r | |
99 | \r | |
100 | [FV.FVMAIN_SEC]\r | |
101 | FvAlignment = 8\r | |
102 | ERASE_POLARITY = 1\r | |
103 | MEMORY_MAPPED = TRUE\r | |
104 | STICKY_WRITE = TRUE\r | |
105 | LOCK_CAP = TRUE\r | |
106 | LOCK_STATUS = TRUE\r | |
107 | WRITE_DISABLED_CAP = TRUE\r | |
108 | WRITE_ENABLED_CAP = TRUE\r | |
109 | WRITE_STATUS = TRUE\r | |
110 | WRITE_LOCK_CAP = TRUE\r | |
111 | WRITE_LOCK_STATUS = TRUE\r | |
112 | READ_DISABLED_CAP = TRUE\r | |
113 | READ_ENABLED_CAP = TRUE\r | |
114 | READ_STATUS = TRUE\r | |
115 | READ_LOCK_CAP = TRUE\r | |
116 | READ_LOCK_STATUS = TRUE\r | |
117 | \r | |
118 | INF ArmPlatformPkg/Sec/Sec.inf\r | |
119 | \r | |
120 | \r | |
121 | [FV.FvMain]\r | |
122 | BlockSize = 0x40\r | |
123 | NumBlocks = 0 # This FV gets compressed so make it just big enough\r | |
124 | FvAlignment = 8 # FV alignment and FV attributes setting.\r | |
125 | ERASE_POLARITY = 1\r | |
126 | MEMORY_MAPPED = TRUE\r | |
127 | STICKY_WRITE = TRUE\r | |
128 | LOCK_CAP = TRUE\r | |
129 | LOCK_STATUS = TRUE\r | |
130 | WRITE_DISABLED_CAP = TRUE\r | |
131 | WRITE_ENABLED_CAP = TRUE\r | |
132 | WRITE_STATUS = TRUE\r | |
133 | WRITE_LOCK_CAP = TRUE\r | |
134 | WRITE_LOCK_STATUS = TRUE\r | |
135 | READ_DISABLED_CAP = TRUE\r | |
136 | READ_ENABLED_CAP = TRUE\r | |
137 | READ_STATUS = TRUE\r | |
138 | READ_LOCK_CAP = TRUE\r | |
139 | READ_LOCK_STATUS = TRUE\r | |
140 | \r | |
3402aac7 | 141 | INF MdeModulePkg/Core/Dxe/DxeMain.inf\r |
66f530ed | 142 | \r |
143 | #\r | |
3402aac7 | 144 | # PI DXE Drivers producing Architectural Protocols (EFI Services)\r |
66f530ed | 145 | #\r |
146 | INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r | |
147 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r | |
148 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r | |
149 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r | |
150 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r | |
151 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r | |
152 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r | |
153 | INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r | |
154 | INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r | |
155 | INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r | |
156 | \r | |
157 | #\r | |
158 | # Multiple Console IO support\r | |
159 | #\r | |
160 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r | |
161 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r | |
162 | INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r | |
163 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r | |
164 | INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r | |
165 | \r | |
166 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r | |
167 | \r | |
017baa1c | 168 | INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r |
66f530ed | 169 | INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r |
170 | INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r | |
171 | INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r | |
172 | INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r | |
173 | \r | |
174 | #\r | |
a4ab7df4 OM |
175 | # Platform\r |
176 | #\r | |
177 | INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmHwDxe.inf\r | |
66f530ed | 178 | \r |
179 | !if $(EDK2_ARMVE_STANDALONE) != 1\r | |
180 | #\r | |
181 | # Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r | |
182 | #\r | |
183 | INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r | |
184 | !endif\r | |
3402aac7 | 185 | \r |
66f530ed | 186 | #\r |
187 | # FAT filesystem + GPT/MBR partitioning\r | |
188 | #\r | |
189 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r | |
190 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r | |
e1772adf | 191 | INF FatBinPkg/EnhancedFatDxe/Fat.inf\r |
66f530ed | 192 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r |
193 | \r | |
94e0955d OM |
194 | # Versatile Express FileSystem\r |
195 | INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf\r | |
196 | \r | |
04f1a709 RC |
197 | #\r |
198 | # FDT installation\r | |
199 | #\r | |
200 | INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r | |
201 | \r | |
66f530ed | 202 | #\r |
203 | # Multimedia Card Interface\r | |
204 | #\r | |
205 | INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r | |
206 | INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r | |
62d441fb RC |
207 | \r |
208 | #\r | |
4257aa4d OM |
209 | # USB support\r |
210 | #\r | |
62d441fb | 211 | INF EmbeddedPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf\r |
4257aa4d | 212 | \r |
81f29156 OM |
213 | #\r |
214 | # Android Fastboot\r | |
215 | #\r | |
216 | INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf\r | |
217 | INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf\r | |
218 | INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf\r | |
62d441fb | 219 | \r |
02944eb7 OM |
220 | #\r |
221 | # Networking stack\r | |
222 | #\r | |
223 | INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r | |
224 | INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r | |
225 | INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r | |
226 | INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf\r | |
227 | INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r | |
228 | INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r | |
229 | INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r | |
230 | INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r | |
231 | INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r | |
232 | INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r | |
233 | INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r | |
234 | INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r | |
235 | INF EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf\r | |
81f29156 | 236 | \r |
66f530ed | 237 | #\r |
4257aa4d OM |
238 | # UEFI application (Shell Embedded Boot Loader)\r |
239 | #\r | |
240 | INF ShellBinPkg/UefiShell/UefiShell.inf\r | |
241 | \r | |
66f530ed | 242 | #\r |
243 | # Bds\r | |
244 | #\r | |
245 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r | |
246 | INF ArmPlatformPkg/Bds/Bds.inf\r | |
247 | \r | |
901b4516 OM |
248 | # FV Filesystem\r |
249 | INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r | |
66f530ed | 250 | \r |
04f1a709 RC |
251 | # Example to add a Device Tree to the Firmware Volume\r |
252 | #FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressHwA9x4) {\r | |
253 | # SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/vexpress-v2p-ca9.dtb\r | |
254 | #}\r | |
255 | \r | |
66f530ed | 256 | [FV.FVMAIN_COMPACT]\r |
257 | FvAlignment = 8\r | |
258 | ERASE_POLARITY = 1\r | |
259 | MEMORY_MAPPED = TRUE\r | |
260 | STICKY_WRITE = TRUE\r | |
261 | LOCK_CAP = TRUE\r | |
262 | LOCK_STATUS = TRUE\r | |
263 | WRITE_DISABLED_CAP = TRUE\r | |
264 | WRITE_ENABLED_CAP = TRUE\r | |
265 | WRITE_STATUS = TRUE\r | |
266 | WRITE_LOCK_CAP = TRUE\r | |
267 | WRITE_LOCK_STATUS = TRUE\r | |
268 | READ_DISABLED_CAP = TRUE\r | |
269 | READ_ENABLED_CAP = TRUE\r | |
270 | READ_STATUS = TRUE\r | |
271 | READ_LOCK_CAP = TRUE\r | |
272 | READ_LOCK_STATUS = TRUE\r | |
273 | \r | |
274 | !if $(EDK2_SKIP_PEICORE) == 1\r | |
275 | INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r | |
276 | !else\r | |
277 | INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r | |
278 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r | |
279 | INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r | |
280 | INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r | |
281 | INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r | |
282 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
283 | INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r | |
284 | INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r | |
285 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r | |
286 | !endif\r | |
3402aac7 | 287 | \r |
66f530ed | 288 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r |
289 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r | |
290 | SECTION FV_IMAGE = FVMAIN\r | |
291 | }\r | |
292 | }\r | |
293 | \r | |
294 | \r | |
295 | ################################################################################\r | |
296 | #\r | |
297 | # Rules are use with the [FV] section's module INF type to define\r | |
298 | # how an FFS file is created for a given INF file. The following Rule are the default\r | |
299 | # rules for the different module type. User can add the customized rules to define the\r | |
300 | # content of the FFS file.\r | |
301 | #\r | |
302 | ################################################################################\r | |
303 | \r | |
304 | \r | |
305 | ############################################################################\r | |
3402aac7 | 306 | # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r |
66f530ed | 307 | ############################################################################\r |
308 | #\r | |
309 | #[Rule.Common.DXE_DRIVER]\r | |
310 | # FILE DRIVER = $(NAMED_GUID) {\r | |
311 | # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
312 | # COMPRESS PI_STD {\r | |
313 | # GUIDED {\r | |
314 | # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
315 | # UI STRING="$(MODULE_NAME)" Optional\r | |
316 | # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
317 | # }\r | |
318 | # }\r | |
319 | # }\r | |
320 | #\r | |
321 | ############################################################################\r | |
322 | \r | |
323 | [Rule.Common.SEC]\r | |
324 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r | |
325 | TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
326 | }\r | |
327 | \r | |
328 | [Rule.Common.PEI_CORE]\r | |
329 | FILE PEI_CORE = $(NAMED_GUID) {\r | |
330 | TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
3402aac7 | 331 | UI STRING ="$(MODULE_NAME)" Optional\r |
66f530ed | 332 | }\r |
333 | \r | |
334 | [Rule.Common.PEIM]\r | |
335 | FILE PEIM = $(NAMED_GUID) {\r | |
336 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
337 | TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
3402aac7 | 338 | UI STRING="$(MODULE_NAME)" Optional\r |
66f530ed | 339 | }\r |
340 | \r | |
341 | [Rule.Common.PEIM.TIANOCOMPRESSED]\r | |
342 | FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r | |
343 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
344 | GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r | |
345 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
346 | UI STRING="$(MODULE_NAME)" Optional\r | |
347 | }\r | |
348 | }\r | |
349 | \r | |
350 | [Rule.Common.DXE_CORE]\r | |
351 | FILE DXE_CORE = $(NAMED_GUID) {\r | |
352 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
353 | UI STRING="$(MODULE_NAME)" Optional\r | |
354 | }\r | |
355 | \r | |
356 | [Rule.Common.UEFI_DRIVER]\r | |
357 | FILE DRIVER = $(NAMED_GUID) {\r | |
358 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
359 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
360 | UI STRING="$(MODULE_NAME)" Optional\r | |
361 | }\r | |
362 | \r | |
363 | [Rule.Common.DXE_DRIVER]\r | |
364 | FILE DRIVER = $(NAMED_GUID) {\r | |
365 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
366 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
367 | UI STRING="$(MODULE_NAME)" Optional\r | |
368 | }\r | |
369 | \r | |
370 | [Rule.Common.DXE_RUNTIME_DRIVER]\r | |
371 | FILE DRIVER = $(NAMED_GUID) {\r | |
372 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
373 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
374 | UI STRING="$(MODULE_NAME)" Optional\r | |
375 | }\r | |
376 | \r | |
377 | [Rule.Common.UEFI_APPLICATION]\r | |
378 | FILE APPLICATION = $(NAMED_GUID) {\r | |
3402aac7 | 379 | UI STRING ="$(MODULE_NAME)" Optional\r |
66f530ed | 380 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
381 | }\r | |
e1772adf | 382 | \r |
383 | [Rule.Common.UEFI_DRIVER.BINARY]\r | |
384 | FILE DRIVER = $(NAMED_GUID) {\r | |
385 | DXE_DEPEX DXE_DEPEX Optional |.depex\r | |
386 | PE32 PE32 |.efi\r | |
387 | UI STRING="$(MODULE_NAME)" Optional\r | |
388 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
389 | }\r | |
390 | \r | |
391 | [Rule.Common.UEFI_APPLICATION.BINARY]\r | |
392 | FILE APPLICATION = $(NAMED_GUID) {\r | |
393 | PE32 PE32 |.efi\r | |
394 | UI STRING="$(MODULE_NAME)" Optional\r | |
395 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
396 | }\r |