projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 295c2eb8 | 1 | //\r |
| bebda7ce | 2 | // Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r |
| 295c2eb8 | 3 | //\r |
| 4 | // This program and the accompanying materials\r | |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | // http://opensource.org/licenses/bsd-license.php\r | |
| 8 | //\r | |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | //\r | |
| 12 | //\r | |
| 13 | \r | |
| 14 | #include <Library/ArmLib.h>\r | |
| 15 | \r | |
| bebda7ce | 16 | #include <ArmPlatform.h>\r |
| 17 | \r | |
| 295c2eb8 | 18 | INCLUDE AsmMacroIoLib.inc\r |
| 19 | \r | |
| b5a57223 | 20 | EXPORT ArmPlatformPeiBootAction\r |
| 295c2eb8 | 21 | EXPORT ArmPlatformGetCorePosition\r |
| bebda7ce | 22 | EXPORT ArmPlatformIsPrimaryCore\r |
| 99267097 | 23 | EXPORT ArmPlatformGetPrimaryCoreMpId\r |
| 295c2eb8 | 24 | \r |
| 25 | PRESERVE8\r | |
| 26 | AREA CTA15A7Helper, CODE, READONLY\r | |
| b5a57223 | 27 | \r |
| 28 | ArmPlatformPeiBootAction FUNCTION\r | |
| 29 | bx lr\r | |
| 30 | ENDFUNC\r | |
| 295c2eb8 | 31 | \r |
| 32 | //UINTN\r | |
| 33 | //ArmPlatformGetCorePosition (\r | |
| 34 | // IN UINTN MpId\r | |
| 35 | // );\r | |
| 36 | ArmPlatformGetCorePosition FUNCTION\r | |
| 91c38d4e RC |
37 | and r1, r0, #ARM_CORE_MASK\r |
| 38 | and r0, r0, #ARM_CLUSTER_MASK\r | |
| 39 | add r0, r1, r0, LSR #7\r | |
| 40 | bx lr\r | |
| 295c2eb8 | 41 | ENDFUNC\r |
| 42 | \r | |
| bebda7ce | 43 | //UINTN\r |
| 44 | //ArmPlatformIsPrimaryCore (\r | |
| 45 | // IN UINTN MpId\r | |
| 46 | // );\r | |
| 47 | ArmPlatformIsPrimaryCore FUNCTION\r | |
| 48 | // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r | |
| 49 | // with cpu_id[0:3] and cluster_id[4:7]\r | |
| 66edb631 | 50 | mov32 r1, ARM_CTA15A7_SCC_CFGREG48\r |
| bebda7ce | 51 | ldr r1, [r1]\r |
| 52 | lsr r1, #24\r | |
| 53 | \r | |
| 54 | // Shift the SCC value to get the cluster ID at the offset #8\r | |
| 55 | lsl r2, r1, #4\r | |
| 56 | and r2, r2, #0xF00\r | |
| 57 | \r | |
| 58 | // Keep only the cpu ID from the original SCC\r | |
| 59 | and r1, r1, #0x0F\r | |
| 60 | // Add the Cluster ID to the Cpu ID\r | |
| 61 | orr r1, r1, r2\r | |
| 62 | \r | |
| 63 | // Keep the Cluster ID and Core ID from the MPID\r | |
| 66edb631 | 64 | mov32 r2, ARM_CLUSTER_MASK :OR: ARM_CORE_MASK\r |
| bebda7ce | 65 | and r0, r0, r2\r |
| 66 | \r | |
| 67 | // Compare mpid and boot cpu from ARM_SCC_CFGREG48\r | |
| 68 | cmp r0, r1\r | |
| 69 | moveq r0, #1\r | |
| 70 | movne r0, #0\r | |
| 71 | bx lr\r | |
| 72 | ENDFUNC\r | |
| 73 | \r | |
| 99267097 OM |
74 | //UINTN\r |
| 75 | //ArmPlatformGetPrimaryCoreMpId (\r | |
| 76 | // VOID\r | |
| 77 | // );\r | |
| 78 | ArmPlatformGetPrimaryCoreMpId FUNCTION\r | |
| 79 | // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r | |
| 80 | // with cpu_id[0:3] and cluster_id[4:7]\r | |
| 66edb631 | 81 | mov32 r0, ARM_CTA15A7_SCC_CFGREG48\r |
| 99267097 OM |
82 | ldr r0, [r0]\r |
| 83 | lsr r0, #24\r | |
| 84 | \r | |
| 85 | // Shift the SCC value to get the cluster ID at the offset #8\r | |
| 86 | lsl r1, r0, #4\r | |
| 87 | and r1, r1, #0xF00\r | |
| 88 | \r | |
| 89 | // Keep only the cpu ID from the original SCC\r | |
| 90 | and r0, r0, #0x0F\r | |
| 91 | // Add the Cluster ID to the Cpu ID\r | |
| 92 | orr r0, r0, r1\r | |
| 93 | bx lr\r | |
| 94 | ENDFUNC\r | |
| 95 | \r | |
| 295c2eb8 | 96 | END\r |