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1d5d0ae9 1/** @file\r
2*\r
3* Copyright (c) 2011, ARM Limited. All rights reserved.\r
4* \r
5* This program and the accompanying materials \r
6* are licensed and made available under the terms and conditions of the BSD License \r
7* which accompanies this distribution. The full text of the license may be found at \r
8* http://opensource.org/licenses/bsd-license.php \r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12*\r
13**/\r
14\r
15#include <Library/ArmPlatformLib.h>\r
16#include <Library/DebugLib.h>\r
17#include <Library/PcdLib.h>\r
18#include <Library/IoLib.h>\r
19#include <Library/MemoryAllocationLib.h>\r
20\r
5cc45b70 21#include <ArmPlatform.h>\r
22\r
d6b5f236 23// Number of Virtual Memory Map Descriptors without a Logic Tile\r
24#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6\r
25\r
1d5d0ae9 26// DDR attributes\r
27#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
28#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
1d5d0ae9 29\r
1d5d0ae9 30/**\r
31 Return the Virtual Memory Map of your platform\r
32\r
33 This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r
34\r
35 @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r
36 Virtual Memory mapping. This array must be ended by a zero-filled\r
37 entry\r
38\r
39**/\r
d6b5f236 40VOID\r
41ArmPlatformGetVirtualMemoryMap (\r
42 IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
43 )\r
44{\r
45 ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r
d6b5f236 46 UINTN Index = 0;\r
47 ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
48\r
49 ASSERT(VirtualMemoryMap != NULL);\r
50\r
51 VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
52 if (VirtualMemoryTable == NULL) {\r
53 return;\r
54 }\r
55\r
d6b5f236 56 if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
12c5ae23 57 CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
d6b5f236 58 } else {\r
12c5ae23 59 CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
d6b5f236 60 }\r
61\r
12c5ae23 62 if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {\r
63 // ReMap (Either NOR Flash or DRAM)\r
64 VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;\r
65 VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r
66 VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r
d6b5f236 67 VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
68 }\r
69\r
70 // DDR\r
71 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;\r
72 VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;\r
73 VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;\r
74 VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
75\r
76 // SMC CS7\r
77 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
78 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
79 VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;\r
12c5ae23 80 VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
d6b5f236 81\r
82 // SMB CS0-CS1 - NOR Flash 1 & 2\r
83 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r
84 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r
85 VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;\r
12c5ae23 86 VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
d6b5f236 87\r
88 // SMB CS2 - SRAM\r
89 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;\r
90 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;\r
91 VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;\r
92 VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
93\r
94 // SMB CS3-CS6 - Motherboard Peripherals\r
95 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r
96 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r
97 VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;\r
12c5ae23 98 VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
d6b5f236 99\r
100 // If a Logic Tile is connected to The ARM Versatile Express Motherboard\r
101 if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {\r
102 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;\r
103 VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;\r
104 VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;\r
12c5ae23 105 VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
d6b5f236 106\r
107 ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));\r
108 } else {\r
109 ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);\r
110 }\r
111\r
112 // End of Table\r
113 VirtualMemoryTable[++Index].PhysicalBase = 0;\r
114 VirtualMemoryTable[Index].VirtualBase = 0;\r
115 VirtualMemoryTable[Index].Length = 0;\r
116 VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
117\r
118 *VirtualMemoryMap = VirtualMemoryTable;\r
1d5d0ae9 119}\r
120\r
121/**\r
d6b5f236 122 Return the EFI Memory Map provided by extension memory on your platform\r
1d5d0ae9 123\r
124 This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource\r
125 Descriptor HOBs used by DXE core.\r
126\r
127 @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an\r
128 EFI Memory region. This array must be ended by a zero-filled entry\r
129\r
130**/\r
964680c1 131EFI_STATUS\r
132ArmPlatformGetAdditionalSystemMemory (\r
133 OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap\r
134 )\r
135{\r
136 return EFI_UNSUPPORTED;\r
1d5d0ae9 137}\r