]>
Commit | Line | Data |
---|---|---|
7d0f2f23 | 1 | /** @file PL111Lcd.c\r |
2 | \r | |
3f305c06 | 3 | Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r |
4 | \r | |
7d0f2f23 | 5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
7d0f2f23 | 15 | #include <Library/IoLib.h>\r |
7d0f2f23 | 16 | #include <Library/MemoryAllocationLib.h>\r |
7d0f2f23 | 17 | \r |
18 | #include <Drivers/PL111Lcd.h>\r | |
19 | \r | |
20 | #include "LcdGraphicsOutputDxe.h"\r | |
21 | \r | |
22 | /**********************************************************************\r | |
23 | *\r | |
24 | * This file contains all the bits of the PL111 that are\r | |
25 | * platform independent.\r | |
26 | *\r | |
27 | **********************************************************************/\r | |
28 | \r | |
7d0f2f23 | 29 | EFI_STATUS\r |
30 | LcdInitialize (\r | |
31 | IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r | |
32 | )\r | |
33 | {\r | |
7d0f2f23 | 34 | // Define start of the VRAM. This never changes for any graphics mode\r |
35 | MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);\r | |
36 | MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer\r | |
37 | \r | |
38 | // Disable all interrupts from the PL111\r | |
39 | MmioWrite32(PL111_REG_LCD_IMSC, 0);\r | |
40 | \r | |
41 | return EFI_SUCCESS;\r | |
42 | }\r | |
43 | \r | |
44 | EFI_STATUS\r | |
45 | LcdSetMode (\r | |
46 | IN UINT32 ModeNumber\r | |
47 | )\r | |
48 | {\r | |
49 | EFI_STATUS Status;\r | |
50 | UINT32 HRes;\r | |
51 | UINT32 HSync;\r | |
52 | UINT32 HBackPorch;\r | |
53 | UINT32 HFrontPorch;\r | |
54 | UINT32 VRes;\r | |
55 | UINT32 VSync;\r | |
56 | UINT32 VBackPorch;\r | |
57 | UINT32 VFrontPorch;\r | |
58 | UINT32 LcdControl;\r | |
59 | LCD_BPP LcdBpp;\r | |
60 | \r | |
61 | // Set the video mode timings and other relevant information\r | |
62 | Status = LcdPlatformGetTimings (ModeNumber,\r | |
63 | &HRes,&HSync,&HBackPorch,&HFrontPorch,\r | |
64 | &VRes,&VSync,&VBackPorch,&VFrontPorch);\r | |
65 | ASSERT_EFI_ERROR (Status);\r | |
66 | if (EFI_ERROR( Status )) {\r | |
67 | return EFI_DEVICE_ERROR;\r | |
68 | }\r | |
69 | \r | |
70 | Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);\r | |
71 | ASSERT_EFI_ERROR (Status);\r | |
72 | if (EFI_ERROR( Status )) {\r | |
73 | return EFI_DEVICE_ERROR;\r | |
74 | }\r | |
75 | \r | |
76 | // Disable the CLCD_LcdEn bit\r | |
77 | LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);\r | |
78 | MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl & ~1);\r | |
79 | \r | |
80 | // Set Timings\r | |
81 | MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));\r | |
82 | MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));\r | |
83 | MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));\r | |
84 | MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);\r | |
85 | \r | |
86 | // PL111_REG_LCD_CONTROL\r | |
87 | LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;\r | |
88 | MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);\r | |
89 | \r | |
90 | // Turn on power to the LCD Panel\r | |
91 | LcdControl |= PL111_CTRL_LCD_PWR;\r | |
92 | MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);\r | |
93 | \r | |
94 | return EFI_SUCCESS;\r | |
95 | }\r | |
96 | \r | |
97 | VOID\r | |
98 | LcdShutdown (\r | |
99 | VOID\r | |
100 | )\r | |
101 | {\r | |
102 | // Nothing to do in terms of hardware.\r | |
103 | // We could switch off the monitor display if required\r | |
104 | \r | |
105 | //TODO: ImplementMe\r | |
106 | }\r |