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f598bf12 1/** @file\r
2* Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
3*\r
4* Copyright (c) 2011, ARM Limited. All rights reserved.\r
5*\r
f4dfad05 6* SPDX-License-Identifier: BSD-2-Clause-Patent\r
f598bf12 7*\r
8**/\r
9#ifndef __PREPEICORE_H_\r
10#define __PREPEICORE_H_\r
11\r
8fc38a3f 12#include <Library/ArmLib.h>\r
13#include <Library/ArmPlatformLib.h>\r
14#include <Library/BaseMemoryLib.h>\r
5cc45b70 15#include <Library/DebugLib.h>\r
8fc38a3f 16#include <Library/IoLib.h>\r
5cc45b70 17#include <Library/PcdLib.h>\r
18\r
f598bf12 19#include <PiPei.h>\r
20#include <Ppi/TemporaryRamSupport.h>\r
21\r
77de7e53 22VOID\r
23CreatePpiList (\r
24 OUT UINTN *PpiListSize,\r
25 OUT EFI_PEI_PPI_DESCRIPTOR **PpiList\r
26 );\r
f598bf12 27\r
28EFI_STATUS\r
29EFIAPI\r
77de7e53 30PrePeiCoreTemporaryRamSupport (\r
f598bf12 31 IN CONST EFI_PEI_SERVICES **PeiServices,\r
32 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
33 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
34 IN UINTN CopySize\r
35 );\r
36\r
37VOID\r
38SecSwitchStack (\r
39 INTN StackDelta\r
40 );\r
41\r
42// Vector Table for Pei Phase\r
43VOID PeiVectorTable (VOID);\r
44\r
45VOID\r
46EFIAPI\r
47PrimaryMain (\r
48 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
49 );\r
50\r
51/*\r
52 * This is the main function for secondary cores. They loop around until a non Null value is written to\r
53 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.\r
54 * Note:The secondary cores, while executing secondary_main, assumes that:\r
55 * : SGI 0 is configured as Non-secure interrupt\r
56 * : Priority Mask is configured to allow SGI 0\r
57 * : Interrupt Distributor and CPU interfaces are enabled\r
58 *\r
59 */\r
60VOID\r
61EFIAPI\r
62SecondaryMain (\r
0787bc61 63 IN UINTN MpId\r
f598bf12 64 );\r
65\r
a9d7090f 66VOID\r
67PeiCommonExceptionEntry (\r
68 IN UINT32 Entry,\r
69 IN UINTN LR\r
70 );\r
71\r
f598bf12 72#endif\r