]>
Commit | Line | Data |
---|---|---|
1d5d0ae9 | 1 | // |
2 | // Copyright (c) 2011, ARM Limited. All rights reserved. | |
3 | // | |
4 | # This program and the accompanying materials | |
5 | # are licensed and made available under the terms and conditions of the BSD License | |
6 | # which accompanies this distribution. The full text of the license may be found at | |
7 | # http:#opensource.org/licenses/bsd-license.php | |
8 | # | |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
11 | # | |
12 | # | |
13 | ||
14 | #include <AsmMacroIoLib.h> | |
15 | #include <Base.h> | |
16 | #include <Library/PcdLib.h> | |
17 | #include <AutoGen.h> | |
18 | ||
19 | #start of the code section | |
20 | .text | |
21 | .align 3 | |
22 | ||
23 | #global symbols referenced by this module | |
24 | GCC_ASM_IMPORT(CEntryPoint) | |
25 | ||
26 | StartupAddr: .word CEntryPoint | |
27 | ||
28 | #make _ModuleEntryPoint as global | |
29 | GCC_ASM_EXPORT(_ModuleEntryPoint) | |
30 | ||
31 | ||
32 | ASM_PFX(_ModuleEntryPoint): | |
33 | # Identify CPU ID | |
34 | mrc p15, 0, r0, c0, c0, 5 | |
35 | and r0, #0xf | |
36 | ||
37 | _SetupStack: | |
38 | # Setup Stack for the 4 CPU cores | |
39 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1) | |
40 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2) | |
41 | ||
42 | mov r3,r0 @ r3 = core_id | |
43 | mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base | |
44 | add r3,r3,r1 @ r3 = stack_base + offset | |
45 | add r3,r3,r2,LSR #1 @ r3 = stack_offset + (stack_size/2) <-- the top half is for the heap | |
46 | mov sp, r3 | |
47 | ||
48 | # lr points to area in reset vector block containing PEI core address. lr needs to | |
49 | # be saved from the beginning as the _ModuleEntryPoint could call helper functions | |
50 | # that will overwrite 'lr' | |
51 | LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2) | |
52 | add r2, r2, #4 | |
53 | ldr r1, [r2] | |
54 | ||
55 | # move sec startup address into a data register | |
56 | # ensure we're jumping to FV version of the code (not boot remapped alias) | |
57 | ldr r2, StartupAddr | |
58 | ||
59 | # jump to SEC C code | |
60 | # r0 = core_id | |
61 | # r1 = pei_core_address | |
62 | blx r2 | |
63 | ||
64 | #end of the file | |
65 | .end |