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cd872e40 | 1 | //\r |
2569b068 | 2 | // Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r |
cd872e40 | 3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
cd872e40 | 19 | .text\r |
20 | .align 3\r | |
21 | \r | |
cd872e40 | 22 | GCC_ASM_IMPORT(CEntryPoint)\r |
0787bc61 | 23 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
886f97c8 | 24 | GCC_ASM_IMPORT(ArmIsMpCore)\r |
d269095b | 25 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
cd872e40 | 26 | \r |
27 | StartupAddr: .word CEntryPoint\r | |
28 | \r | |
cd872e40 | 29 | \r |
30 | ASM_PFX(_ModuleEntryPoint):\r | |
0787bc61 | 31 | // Get ID of this CPU in Multicore system\r |
32 | bl ASM_PFX(ArmReadMpidr)\r | |
33 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
2dbcb8f0 | 34 | and r5, r0, r1\r |
cd872e40 | 35 | \r |
d269095b | 36 | _SetSVCMode:\r |
99565b88 | 37 | // Enter SVC mode, Disable FIQ and IRQ\r |
d269095b | 38 | mov r1, #0x13|0x80|0x40\r |
39 | msr CPSR_c, r1\r | |
40 | \r | |
2dbcb8f0 | 41 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 42 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
43 | // at the top of the DRAM)\r | |
44 | _SetupStackPosition:\r | |
cd872e40 | 45 | // Compute Top of System Memory\r |
46 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r | |
47 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r | |
2569b068 | 48 | sub r2, r2, #1\r |
cd872e40 | 49 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
cd872e40 | 50 | \r |
d269095b | 51 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 52 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
53 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
2569b068 | 54 | sub r3, r3, #1\r |
f92b93c9 | 55 | add r3, r3, r2 // r4 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
d269095b | 56 | \r |
57 | // UEFI Memory Size (stacks are allocated in this region)\r | |
58 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
59 | \r | |
60 | //\r | |
61 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
62 | //\r | |
63 | \r | |
64 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 65 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
66 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
67 | cmp r0, r4\r | |
d269095b | 68 | bge _SetupStack\r |
69 | \r | |
70 | // Case the top of stacks is the FdBaseAddress\r | |
71 | mov r1, r2\r | |
cd872e40 | 72 | \r |
73 | _SetupStack:\r | |
2dbcb8f0 | 74 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 75 | \r |
2569b068 | 76 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
77 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
78 | // top of the memory space)\r | |
79 | adds r6, r1, #1\r | |
80 | bcs _SetupOverflowStack\r | |
81 | \r | |
82 | _SetupAlignedStack:\r | |
83 | mov r1, r6\r | |
84 | b _GetBaseUefiMemory\r | |
85 | \r | |
86 | _SetupOverflowStack:\r | |
87 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
88 | // aligned (4KB)\r | |
89 | LoadConstantToReg (EFI_PAGE_MASK, r6)\r | |
90 | and r6, r6, r1\r | |
91 | sub r1, r1, r6\r | |
92 | \r | |
93 | _GetBaseUefiMemory:\r | |
d269095b | 94 | // Calculate the Base of the UEFI Memory\r |
2dbcb8f0 | 95 | sub r6, r1, r4\r |
cd872e40 | 96 | \r |
2dbcb8f0 | 97 | _GetStackBase:\r |
98 | // Compute Base of Normal stacks for CPU Cores\r | |
99 | // Is it MpCore system\r | |
89bbce11 | 100 | bl ASM_PFX(ArmIsMpCore)\r |
cd872e40 | 101 | cmp r0, #0\r |
2dbcb8f0 | 102 | // Case it is not an MP Core system. Just setup the primary core\r |
103 | beq _SetupUnicoreStack\r | |
104 | \r | |
105 | _GetStackBaseMpCore:\r | |
1377db63 | 106 | // r1 = The top of the Mpcore Stacks\r |
2dbcb8f0 | 107 | // Stack for the primary core = PrimaryCoreStack\r |
108 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
109 | sub r7, r1, r2\r | |
110 | // Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize\r | |
111 | LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r | |
112 | lsl r2, r2, #2\r | |
113 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r | |
114 | mul r2, r2, r3\r | |
115 | sub r7, r7, r2\r | |
116 | \r | |
1377db63 | 117 | // The base of the secondary Stacks = Top of Primary stack\r |
118 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
119 | add r1, r7, r2\r | |
120 | \r | |
121 | // r7 = The base of the MpCore Stacks\r | |
122 | // r1 = The base of the secondary Stacks = Top of the Primary stack\r | |
2dbcb8f0 | 123 | \r |
124 | // Is it the Primary Core ?\r | |
125 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r | |
99565b88 | 126 | cmp r5, r4\r |
2dbcb8f0 | 127 | beq _SetupPrimaryCoreStack\r |
128 | \r | |
129 | _SetupSecondaryCoreStack:\r | |
1377db63 | 130 | // r1 = The base of the secondary Stacks\r |
2dbcb8f0 | 131 | \r |
132 | // Get the position of the cores (ClusterId * 4) + CoreId\r | |
133 | GetCorePositionInStack(r0, r5, r4)\r | |
134 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r | |
135 | add r0, r0, #1\r | |
136 | // Get the offset for the Secondary Stack\r | |
137 | mul r0, r0, r3\r | |
1377db63 | 138 | add sp, r1, r0\r |
2dbcb8f0 | 139 | \r |
cd872e40 | 140 | bne _PrepareArguments\r |
141 | \r | |
2dbcb8f0 | 142 | _SetupPrimaryCoreStack:\r |
1377db63 | 143 | // r1 = Top of the primary stack\r |
2dbcb8f0 | 144 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r |
1377db63 | 145 | b _PreparePrimaryStack\r |
146 | \r | |
147 | _SetupUnicoreStack:\r | |
148 | // The top of the Unicore Stack is in r1\r | |
149 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r | |
150 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r | |
2dbcb8f0 | 151 | \r |
1377db63 | 152 | // Calculate the bottom of the primary stack (StackBase)\r |
153 | sub r7, r1, r3\r | |
154 | \r | |
155 | _PreparePrimaryStack:\r | |
2dbcb8f0 | 156 | // The reserved space for global variable must be 8-bytes aligned for pushing\r |
157 | // 64-bit variable on the stack\r | |
158 | SetPrimaryStack (r1, r2, r3)\r | |
159 | \r | |
cd872e40 | 160 | _PrepareArguments:\r |
c524ffbb | 161 | mov r0, r5\r |
162 | mov r1, r6\r | |
163 | mov r2, r7\r | |
164 | mov r3, sp\r | |
165 | \r | |
cd872e40 | 166 | // Move sec startup address into a data register\r |
167 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 168 | ldr r4, StartupAddr\r |
cd872e40 | 169 | \r |
d269095b | 170 | // Jump to PrePiCore C code\r |
0787bc61 | 171 | // r0 = MpId\r |
cd872e40 | 172 | // r1 = UefiMemoryBase\r |
c524ffbb | 173 | // r2 = StacksBase\r |
174 | // r3 = GlobalVariableBase\r | |
175 | blx r4\r | |
cd872e40 | 176 | \r |
2dbcb8f0 | 177 | _NeverReturn:\r |
178 | b _NeverReturn\r | |
179 | \r |