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cd872e40 | 1 | //\r |
2569b068 | 2 | // Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r |
cd872e40 | 3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
cd872e40 | 19 | .text\r |
20 | .align 3\r | |
21 | \r | |
cd872e40 | 22 | GCC_ASM_IMPORT(CEntryPoint)\r |
0787bc61 | 23 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
17839a45 | 24 | GCC_ASM_IMPORT(ArmPlatformStackSet)\r |
d269095b | 25 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
cd872e40 | 26 | \r |
27 | StartupAddr: .word CEntryPoint\r | |
28 | \r | |
cd872e40 | 29 | \r |
30 | ASM_PFX(_ModuleEntryPoint):\r | |
0787bc61 | 31 | // Get ID of this CPU in Multicore system\r |
32 | bl ASM_PFX(ArmReadMpidr)\r | |
33 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
17839a45 | 34 | and r6, r0, r1\r |
cd872e40 | 35 | \r |
d269095b | 36 | _SetSVCMode:\r |
99565b88 | 37 | // Enter SVC mode, Disable FIQ and IRQ\r |
17839a45 | 38 | //TODO: remove hardcoded values\r |
d269095b | 39 | mov r1, #0x13|0x80|0x40\r |
40 | msr CPSR_c, r1\r | |
41 | \r | |
2dbcb8f0 | 42 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 43 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
44 | // at the top of the DRAM)\r | |
45 | _SetupStackPosition:\r | |
cd872e40 | 46 | // Compute Top of System Memory\r |
47 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r | |
48 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r | |
2569b068 | 49 | sub r2, r2, #1\r |
cd872e40 | 50 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
cd872e40 | 51 | \r |
d269095b | 52 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 53 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
54 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
2569b068 | 55 | sub r3, r3, #1\r |
7defe7b3 | 56 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
d269095b | 57 | \r |
58 | // UEFI Memory Size (stacks are allocated in this region)\r | |
59 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
60 | \r | |
61 | //\r | |
62 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
63 | //\r | |
64 | \r | |
65 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 66 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
67 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
68 | cmp r0, r4\r | |
d269095b | 69 | bge _SetupStack\r |
70 | \r | |
71 | // Case the top of stacks is the FdBaseAddress\r | |
72 | mov r1, r2\r | |
cd872e40 | 73 | \r |
74 | _SetupStack:\r | |
2dbcb8f0 | 75 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 76 | \r |
2569b068 | 77 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
78 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
79 | // top of the memory space)\r | |
17839a45 | 80 | adds r7, r1, #1\r |
2569b068 | 81 | bcs _SetupOverflowStack\r |
82 | \r | |
83 | _SetupAlignedStack:\r | |
17839a45 | 84 | mov r1, r7\r |
2569b068 | 85 | b _GetBaseUefiMemory\r |
86 | \r | |
87 | _SetupOverflowStack:\r | |
88 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
89 | // aligned (4KB)\r | |
17839a45 | 90 | LoadConstantToReg (EFI_PAGE_MASK, r7)\r |
91 | and r7, r7, r1\r | |
92 | sub r1, r1, r7\r | |
2569b068 | 93 | \r |
94 | _GetBaseUefiMemory:\r | |
d269095b | 95 | // Calculate the Base of the UEFI Memory\r |
17839a45 | 96 | sub r7, r1, r4\r |
cd872e40 | 97 | \r |
2dbcb8f0 | 98 | _GetStackBase:\r |
1377db63 | 99 | // r1 = The top of the Mpcore Stacks\r |
2dbcb8f0 | 100 | // Stack for the primary core = PrimaryCoreStack\r |
101 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
17839a45 | 102 | sub r8, r1, r2\r |
103 | \r | |
104 | // Stack for the secondary core = Number of Cores - 1\r | |
105 | LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r | |
106 | sub r0, r0, #1\r | |
107 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r | |
108 | mul r1, r1, r0\r | |
109 | sub r8, r8, r1\r | |
110 | \r | |
111 | // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r | |
112 | mov r0, r8\r | |
113 | mov r1, r6\r | |
114 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r | |
1377db63 | 115 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
17839a45 | 116 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r |
117 | bl ASM_PFX(ArmPlatformStackSet)\r | |
2dbcb8f0 | 118 | \r |
119 | // Is it the Primary Core ?\r | |
120 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r | |
17839a45 | 121 | cmp r6, r4\r |
cd872e40 | 122 | bne _PrepareArguments\r |
123 | \r | |
17839a45 | 124 | _ReserveGlobalVariable:\r |
125 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r | |
126 | // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r | |
127 | InitializePrimaryStack(r0, r1)\r | |
2dbcb8f0 | 128 | \r |
cd872e40 | 129 | _PrepareArguments:\r |
17839a45 | 130 | mov r0, r6\r |
131 | mov r1, r7\r | |
132 | mov r2, r8\r | |
c524ffbb | 133 | mov r3, sp\r |
134 | \r | |
cd872e40 | 135 | // Move sec startup address into a data register\r |
136 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 137 | ldr r4, StartupAddr\r |
cd872e40 | 138 | \r |
d269095b | 139 | // Jump to PrePiCore C code\r |
0787bc61 | 140 | // r0 = MpId\r |
cd872e40 | 141 | // r1 = UefiMemoryBase\r |
c524ffbb | 142 | // r2 = StacksBase\r |
143 | // r3 = GlobalVariableBase\r | |
144 | blx r4\r | |
cd872e40 | 145 | \r |
2dbcb8f0 | 146 | _NeverReturn:\r |
147 | b _NeverReturn\r | |
148 | \r |